1 /* 2 * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_FrameMap.hpp" 28 #include "c1/c1_Instruction.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_LIRGenerator.hpp" 31 #include "c1/c1_Runtime1.hpp" 32 #include "c1/c1_ValueStack.hpp" 33 #include "ci/ciArray.hpp" 34 #include "ci/ciObjArrayKlass.hpp" 35 #include "ci/ciTypeArrayKlass.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 #include "runtime/stubRoutines.hpp" 38 #include "vmreg_x86.inline.hpp" 39 40 #ifdef ASSERT 41 #define __ gen()->lir(__FILE__, __LINE__)-> 42 #else 43 #define __ gen()->lir()-> 44 #endif 45 46 // Item will be loaded into a byte register; Intel only 47 void LIRItem::load_byte_item() { 48 load_item(); 49 LIR_Opr res = result(); 50 51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 52 // make sure that it is a byte register 53 assert(!value()->type()->is_float() && !value()->type()->is_double(), 54 "can't load floats in byte register"); 55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 56 __ move(res, reg); 57 58 _result = reg; 59 } 60 } 61 62 63 void LIRItem::load_nonconstant() { 64 LIR_Opr r = value()->operand(); 65 if (r->is_constant()) { 66 _result = r; 67 } else { 68 load_item(); 69 } 70 } 71 72 //-------------------------------------------------------------- 73 // LIRGenerator 74 //-------------------------------------------------------------- 75 76 77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 85 86 87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 88 LIR_Opr opr; 89 switch (type->tag()) { 90 case intTag: opr = FrameMap::rax_opr; break; 91 case objectTag: opr = FrameMap::rax_oop_opr; break; 92 case longTag: opr = FrameMap::long0_opr; break; 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 95 96 case addressTag: 97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 98 } 99 100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 101 return opr; 102 } 103 104 105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 106 LIR_Opr reg = new_register(T_INT); 107 set_vreg_flag(reg, LIRGenerator::byte_reg); 108 return reg; 109 } 110 111 112 //--------- loading items into registers -------------------------------- 113 114 115 // i486 instructions can inline constants 116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 117 if (type == T_SHORT || type == T_CHAR) { 118 // there is no immediate move of word values in asembler_i486.?pp 119 return false; 120 } 121 Constant* c = v->as_Constant(); 122 if (c && c->state_before() == NULL) { 123 // constants of any type can be stored directly, except for 124 // unloaded object constants. 125 return true; 126 } 127 return false; 128 } 129 130 131 bool LIRGenerator::can_inline_as_constant(Value v) const { 132 if (v->type()->tag() == longTag) return false; 133 return v->type()->tag() != objectTag || 134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 135 } 136 137 138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 139 if (c->type() == T_LONG) return false; 140 return c->type() != T_OBJECT || c->as_jobject() == NULL; 141 } 142 143 144 LIR_Opr LIRGenerator::safepoint_poll_register() { 145 return LIR_OprFact::illegalOpr; 146 } 147 148 149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 150 int shift, int disp, BasicType type) { 151 assert(base->is_register(), "must be"); 152 if (index->is_constant()) { 153 return new LIR_Address(base, 154 (index->as_constant_ptr()->as_jint() << shift) + disp, 155 type); 156 } else { 157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 158 } 159 } 160 161 162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 163 BasicType type, bool needs_card_mark) { 164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 165 166 LIR_Address* addr; 167 if (index_opr->is_constant()) { 168 int elem_size = type2aelembytes(type); 169 addr = new LIR_Address(array_opr, 170 offset_in_bytes + index_opr->as_jint() * elem_size, type); 171 } else { 172 #ifdef _LP64 173 if (index_opr->type() == T_INT) { 174 LIR_Opr tmp = new_register(T_LONG); 175 __ convert(Bytecodes::_i2l, index_opr, tmp); 176 index_opr = tmp; 177 } 178 #endif // _LP64 179 addr = new LIR_Address(array_opr, 180 index_opr, 181 LIR_Address::scale(type), 182 offset_in_bytes, type); 183 } 184 if (needs_card_mark) { 185 // This store will need a precise card mark, so go ahead and 186 // compute the full adddres instead of computing once for the 187 // store and again for the card mark. 188 LIR_Opr tmp = new_pointer_register(); 189 __ leal(LIR_OprFact::address(addr), tmp); 190 return new LIR_Address(tmp, type); 191 } else { 192 return addr; 193 } 194 } 195 196 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { 198 LIR_Opr r; 199 if (type == T_LONG) { 200 r = LIR_OprFact::longConst(x); 201 } else if (type == T_INT) { 202 r = LIR_OprFact::intConst(x); 203 } else { 204 ShouldNotReachHere(); 205 } 206 return r; 207 } 208 209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 210 LIR_Opr pointer = new_pointer_register(); 211 __ move(LIR_OprFact::intptrConst(counter), pointer); 212 LIR_Address* addr = new LIR_Address(pointer, type); 213 increment_counter(addr, step); 214 } 215 216 217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 219 } 220 221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 222 __ cmp_mem_int(condition, base, disp, c, info); 223 } 224 225 226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 228 } 229 230 231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { 232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 233 } 234 235 236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 237 if (tmp->is_valid()) { 238 if (is_power_of_2(c + 1)) { 239 __ move(left, tmp); 240 __ shift_left(left, log2_intptr(c + 1), left); 241 __ sub(left, tmp, result); 242 return true; 243 } else if (is_power_of_2(c - 1)) { 244 __ move(left, tmp); 245 __ shift_left(left, log2_intptr(c - 1), left); 246 __ add(left, tmp, result); 247 return true; 248 } 249 } 250 return false; 251 } 252 253 254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 255 BasicType type = item->type(); 256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 257 } 258 259 //---------------------------------------------------------------------- 260 // visitor functions 261 //---------------------------------------------------------------------- 262 263 264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { 265 assert(x->is_pinned(),""); 266 bool needs_range_check = x->compute_needs_range_check(); 267 bool use_length = x->length() != NULL; 268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; 269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || 270 !get_jobject_constant(x->value())->is_null_object() || 271 x->should_profile()); 272 273 LIRItem array(x->array(), this); 274 LIRItem index(x->index(), this); 275 LIRItem value(x->value(), this); 276 LIRItem length(this); 277 278 array.load_item(); 279 index.load_nonconstant(); 280 281 if (use_length && needs_range_check) { 282 length.set_instruction(x->length()); 283 length.load_item(); 284 285 } 286 if (needs_store_check) { 287 value.load_item(); 288 } else { 289 value.load_for_store(x->elt_type()); 290 } 291 292 set_no_result(x); 293 294 // the CodeEmitInfo must be duplicated for each different 295 // LIR-instruction because spilling can occur anywhere between two 296 // instructions and so the debug information must be different 297 CodeEmitInfo* range_check_info = state_for(x); 298 CodeEmitInfo* null_check_info = NULL; 299 if (x->needs_null_check()) { 300 null_check_info = new CodeEmitInfo(range_check_info); 301 } 302 303 // emit array address setup early so it schedules better 304 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); 305 306 if (GenerateRangeChecks && needs_range_check) { 307 if (use_length) { 308 __ cmp(lir_cond_belowEqual, length.result(), index.result()); 309 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 310 } else { 311 array_range_check(array.result(), index.result(), null_check_info, range_check_info); 312 // range_check also does the null check 313 null_check_info = NULL; 314 } 315 } 316 317 if (GenerateArrayStoreCheck && needs_store_check) { 318 LIR_Opr tmp1 = new_register(objectType); 319 LIR_Opr tmp2 = new_register(objectType); 320 LIR_Opr tmp3 = new_register(objectType); 321 322 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); 323 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); 324 } 325 326 if (obj_store) { 327 // Needs GC write barriers. 328 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, 329 true /* do_load */, false /* patch */, NULL); 330 __ move(value.result(), array_addr, null_check_info); 331 // Seems to be a precise 332 post_barrier(LIR_OprFact::address(array_addr), value.result()); 333 } else { 334 __ move(value.result(), array_addr, null_check_info); 335 } 336 } 337 338 339 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 340 assert(x->is_pinned(),""); 341 LIRItem obj(x->obj(), this); 342 obj.load_item(); 343 344 set_no_result(x); 345 346 // "lock" stores the address of the monitor stack slot, so this is not an oop 347 LIR_Opr lock = new_register(T_INT); 348 // Need a scratch register for biased locking on x86 349 LIR_Opr scratch = LIR_OprFact::illegalOpr; 350 if (UseBiasedLocking) { 351 scratch = new_register(T_INT); 352 } 353 354 CodeEmitInfo* info_for_exception = NULL; 355 if (x->needs_null_check()) { 356 info_for_exception = state_for(x); 357 } 358 // this CodeEmitInfo must not have the xhandlers because here the 359 // object is already locked (xhandlers expect object to be unlocked) 360 CodeEmitInfo* info = state_for(x, x->state(), true); 361 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, 362 x->monitor_no(), info_for_exception, info); 363 } 364 365 366 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 367 assert(x->is_pinned(),""); 368 369 LIRItem obj(x->obj(), this); 370 obj.dont_load_item(); 371 372 LIR_Opr lock = new_register(T_INT); 373 LIR_Opr obj_temp = new_register(T_INT); 374 set_no_result(x); 375 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 376 } 377 378 379 // _ineg, _lneg, _fneg, _dneg 380 void LIRGenerator::do_NegateOp(NegateOp* x) { 381 LIRItem value(x->x(), this); 382 value.set_destroys_register(); 383 value.load_item(); 384 LIR_Opr reg = rlock(x); 385 __ negate(value.result(), reg); 386 387 set_result(x, round_item(reg)); 388 } 389 390 391 // for _fadd, _fmul, _fsub, _fdiv, _frem 392 // _dadd, _dmul, _dsub, _ddiv, _drem 393 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 394 LIRItem left(x->x(), this); 395 LIRItem right(x->y(), this); 396 LIRItem* left_arg = &left; 397 LIRItem* right_arg = &right; 398 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 399 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 400 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 401 left.load_item(); 402 } else { 403 left.dont_load_item(); 404 } 405 406 // do not load right operand if it is a constant. only 0 and 1 are 407 // loaded because there are special instructions for loading them 408 // without memory access (not needed for SSE2 instructions) 409 bool must_load_right = false; 410 if (right.is_constant()) { 411 LIR_Const* c = right.result()->as_constant_ptr(); 412 assert(c != NULL, "invalid constant"); 413 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 414 415 if (c->type() == T_FLOAT) { 416 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 417 } else { 418 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 419 } 420 } 421 422 if (must_load_both) { 423 // frem and drem destroy also right operand, so move it to a new register 424 right.set_destroys_register(); 425 right.load_item(); 426 } else if (right.is_register() || must_load_right) { 427 right.load_item(); 428 } else { 429 right.dont_load_item(); 430 } 431 LIR_Opr reg = rlock(x); 432 LIR_Opr tmp = LIR_OprFact::illegalOpr; 433 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { 434 tmp = new_register(T_DOUBLE); 435 } 436 437 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 438 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 439 LIR_Opr fpu0, fpu1; 440 if (x->op() == Bytecodes::_frem) { 441 fpu0 = LIR_OprFact::single_fpu(0); 442 fpu1 = LIR_OprFact::single_fpu(1); 443 } else { 444 fpu0 = LIR_OprFact::double_fpu(0); 445 fpu1 = LIR_OprFact::double_fpu(1); 446 } 447 __ move(right.result(), fpu1); // order of left and right operand is important! 448 __ move(left.result(), fpu0); 449 __ rem (fpu0, fpu1, fpu0); 450 __ move(fpu0, reg); 451 452 } else { 453 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); 454 } 455 456 set_result(x, round_item(reg)); 457 } 458 459 460 // for _ladd, _lmul, _lsub, _ldiv, _lrem 461 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 462 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 463 // long division is implemented as a direct call into the runtime 464 LIRItem left(x->x(), this); 465 LIRItem right(x->y(), this); 466 467 // the check for division by zero destroys the right operand 468 right.set_destroys_register(); 469 470 BasicTypeList signature(2); 471 signature.append(T_LONG); 472 signature.append(T_LONG); 473 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 474 475 // check for division by zero (destroys registers of right operand!) 476 CodeEmitInfo* info = state_for(x); 477 478 const LIR_Opr result_reg = result_register_for(x->type()); 479 left.load_item_force(cc->at(1)); 480 right.load_item(); 481 482 __ move(right.result(), cc->at(0)); 483 484 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 485 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 486 487 address entry; 488 switch (x->op()) { 489 case Bytecodes::_lrem: 490 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 491 break; // check if dividend is 0 is done elsewhere 492 case Bytecodes::_ldiv: 493 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 494 break; // check if dividend is 0 is done elsewhere 495 case Bytecodes::_lmul: 496 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); 497 break; 498 default: 499 ShouldNotReachHere(); 500 } 501 502 LIR_Opr result = rlock_result(x); 503 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 504 __ move(result_reg, result); 505 } else if (x->op() == Bytecodes::_lmul) { 506 // missing test if instr is commutative and if we should swap 507 LIRItem left(x->x(), this); 508 LIRItem right(x->y(), this); 509 510 // right register is destroyed by the long mul, so it must be 511 // copied to a new register. 512 right.set_destroys_register(); 513 514 left.load_item(); 515 right.load_item(); 516 517 LIR_Opr reg = FrameMap::long0_opr; 518 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); 519 LIR_Opr result = rlock_result(x); 520 __ move(reg, result); 521 } else { 522 // missing test if instr is commutative and if we should swap 523 LIRItem left(x->x(), this); 524 LIRItem right(x->y(), this); 525 526 left.load_item(); 527 // don't load constants to save register 528 right.load_nonconstant(); 529 rlock_result(x); 530 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 531 } 532 } 533 534 535 536 // for: _iadd, _imul, _isub, _idiv, _irem 537 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 538 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 539 // The requirements for division and modulo 540 // input : rax,: dividend min_int 541 // reg: divisor (may not be rax,/rdx) -1 542 // 543 // output: rax,: quotient (= rax, idiv reg) min_int 544 // rdx: remainder (= rax, irem reg) 0 545 546 // rax, and rdx will be destroyed 547 548 // Note: does this invalidate the spec ??? 549 LIRItem right(x->y(), this); 550 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 551 552 // call state_for before load_item_force because state_for may 553 // force the evaluation of other instructions that are needed for 554 // correct debug info. Otherwise the live range of the fix 555 // register might be too long. 556 CodeEmitInfo* info = state_for(x); 557 558 left.load_item_force(divInOpr()); 559 560 right.load_item(); 561 562 LIR_Opr result = rlock_result(x); 563 LIR_Opr result_reg; 564 if (x->op() == Bytecodes::_idiv) { 565 result_reg = divOutOpr(); 566 } else { 567 result_reg = remOutOpr(); 568 } 569 570 if (!ImplicitDiv0Checks) { 571 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 572 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); 573 } 574 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 575 if (x->op() == Bytecodes::_irem) { 576 __ irem(left.result(), right.result(), result_reg, tmp, info); 577 } else if (x->op() == Bytecodes::_idiv) { 578 __ idiv(left.result(), right.result(), result_reg, tmp, info); 579 } else { 580 ShouldNotReachHere(); 581 } 582 583 __ move(result_reg, result); 584 } else { 585 // missing test if instr is commutative and if we should swap 586 LIRItem left(x->x(), this); 587 LIRItem right(x->y(), this); 588 LIRItem* left_arg = &left; 589 LIRItem* right_arg = &right; 590 if (x->is_commutative() && left.is_stack() && right.is_register()) { 591 // swap them if left is real stack (or cached) and right is real register(not cached) 592 left_arg = &right; 593 right_arg = &left; 594 } 595 596 left_arg->load_item(); 597 598 // do not need to load right, as we can handle stack and constants 599 if (x->op() == Bytecodes::_imul ) { 600 // check if we can use shift instead 601 bool use_constant = false; 602 bool use_tmp = false; 603 if (right_arg->is_constant()) { 604 int iconst = right_arg->get_jint_constant(); 605 if (iconst > 0) { 606 if (is_power_of_2(iconst)) { 607 use_constant = true; 608 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 609 use_constant = true; 610 use_tmp = true; 611 } 612 } 613 } 614 if (use_constant) { 615 right_arg->dont_load_item(); 616 } else { 617 right_arg->load_item(); 618 } 619 LIR_Opr tmp = LIR_OprFact::illegalOpr; 620 if (use_tmp) { 621 tmp = new_register(T_INT); 622 } 623 rlock_result(x); 624 625 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 626 } else { 627 right_arg->dont_load_item(); 628 rlock_result(x); 629 LIR_Opr tmp = LIR_OprFact::illegalOpr; 630 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 631 } 632 } 633 } 634 635 636 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 637 // when an operand with use count 1 is the left operand, then it is 638 // likely that no move for 2-operand-LIR-form is necessary 639 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 640 x->swap_operands(); 641 } 642 643 ValueTag tag = x->type()->tag(); 644 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 645 switch (tag) { 646 case floatTag: 647 case doubleTag: do_ArithmeticOp_FPU(x); return; 648 case longTag: do_ArithmeticOp_Long(x); return; 649 case intTag: do_ArithmeticOp_Int(x); return; 650 } 651 ShouldNotReachHere(); 652 } 653 654 655 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 656 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 657 // count must always be in rcx 658 LIRItem value(x->x(), this); 659 LIRItem count(x->y(), this); 660 661 ValueTag elemType = x->type()->tag(); 662 bool must_load_count = !count.is_constant() || elemType == longTag; 663 if (must_load_count) { 664 // count for long must be in register 665 count.load_item_force(shiftCountOpr()); 666 } else { 667 count.dont_load_item(); 668 } 669 value.load_item(); 670 LIR_Opr reg = rlock_result(x); 671 672 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 673 } 674 675 676 // _iand, _land, _ior, _lor, _ixor, _lxor 677 void LIRGenerator::do_LogicOp(LogicOp* x) { 678 // when an operand with use count 1 is the left operand, then it is 679 // likely that no move for 2-operand-LIR-form is necessary 680 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 681 x->swap_operands(); 682 } 683 684 LIRItem left(x->x(), this); 685 LIRItem right(x->y(), this); 686 687 left.load_item(); 688 right.load_nonconstant(); 689 LIR_Opr reg = rlock_result(x); 690 691 logic_op(x->op(), reg, left.result(), right.result()); 692 } 693 694 695 696 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 697 void LIRGenerator::do_CompareOp(CompareOp* x) { 698 LIRItem left(x->x(), this); 699 LIRItem right(x->y(), this); 700 ValueTag tag = x->x()->type()->tag(); 701 if (tag == longTag) { 702 left.set_destroys_register(); 703 } 704 left.load_item(); 705 right.load_item(); 706 LIR_Opr reg = rlock_result(x); 707 708 if (x->x()->type()->is_float_kind()) { 709 Bytecodes::Code code = x->op(); 710 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 711 } else if (x->x()->type()->tag() == longTag) { 712 __ lcmp2int(left.result(), right.result(), reg); 713 } else { 714 Unimplemented(); 715 } 716 } 717 718 719 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { 720 assert(x->number_of_arguments() == 4, "wrong type"); 721 LIRItem obj (x->argument_at(0), this); // object 722 LIRItem offset(x->argument_at(1), this); // offset of field 723 LIRItem cmp (x->argument_at(2), this); // value to compare with field 724 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp 725 726 assert(obj.type()->tag() == objectTag, "invalid type"); 727 728 // In 64bit the type can be long, sparc doesn't have this assert 729 // assert(offset.type()->tag() == intTag, "invalid type"); 730 731 assert(cmp.type()->tag() == type->tag(), "invalid type"); 732 assert(val.type()->tag() == type->tag(), "invalid type"); 733 734 // get address of field 735 obj.load_item(); 736 offset.load_nonconstant(); 737 738 if (type == objectType) { 739 cmp.load_item_force(FrameMap::rax_oop_opr); 740 val.load_item(); 741 } else if (type == intType) { 742 cmp.load_item_force(FrameMap::rax_opr); 743 val.load_item(); 744 } else if (type == longType) { 745 cmp.load_item_force(FrameMap::long0_opr); 746 val.load_item_force(FrameMap::long1_opr); 747 } else { 748 ShouldNotReachHere(); 749 } 750 751 LIR_Opr addr = new_pointer_register(); 752 LIR_Address* a; 753 if(offset.result()->is_constant()) { 754 #ifdef _LP64 755 jlong c = offset.result()->as_jlong(); 756 if ((jlong)((jint)c) == c) { 757 a = new LIR_Address(obj.result(), 758 (jint)c, 759 as_BasicType(type)); 760 } else { 761 LIR_Opr tmp = new_register(T_LONG); 762 __ move(offset.result(), tmp); 763 a = new LIR_Address(obj.result(), 764 tmp, 765 as_BasicType(type)); 766 } 767 #else 768 a = new LIR_Address(obj.result(), 769 offset.result()->as_jint(), 770 as_BasicType(type)); 771 #endif 772 } else { 773 a = new LIR_Address(obj.result(), 774 offset.result(), 775 LIR_Address::times_1, 776 0, 777 as_BasicType(type)); 778 } 779 __ leal(LIR_OprFact::address(a), addr); 780 781 if (type == objectType) { // Write-barrier needed for Object fields. 782 // Do the pre-write barrier, if any. 783 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, 784 true /* do_load */, false /* patch */, NULL); 785 } 786 787 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 788 if (type == objectType) 789 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); 790 else if (type == intType) 791 __ cas_int(addr, cmp.result(), val.result(), ill, ill); 792 else if (type == longType) 793 __ cas_long(addr, cmp.result(), val.result(), ill, ill); 794 else { 795 ShouldNotReachHere(); 796 } 797 798 // generate conditional move of boolean result 799 LIR_Opr result = rlock_result(x); 800 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 801 result, as_BasicType(type)); 802 if (type == objectType) { // Write-barrier needed for Object fields. 803 // Seems to be precise 804 post_barrier(addr, val.result()); 805 } 806 } 807 808 809 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 810 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 811 LIRItem value(x->argument_at(0), this); 812 813 bool use_fpu = false; 814 if (UseSSE >= 2) { 815 switch(x->id()) { 816 case vmIntrinsics::_dsin: 817 case vmIntrinsics::_dcos: 818 case vmIntrinsics::_dtan: 819 case vmIntrinsics::_dlog: 820 case vmIntrinsics::_dlog10: 821 case vmIntrinsics::_dexp: 822 case vmIntrinsics::_dpow: 823 use_fpu = true; 824 } 825 } else { 826 value.set_destroys_register(); 827 } 828 829 value.load_item(); 830 831 LIR_Opr calc_input = value.result(); 832 LIR_Opr calc_input2 = NULL; 833 if (x->id() == vmIntrinsics::_dpow) { 834 LIRItem extra_arg(x->argument_at(1), this); 835 if (UseSSE < 2) { 836 extra_arg.set_destroys_register(); 837 } 838 extra_arg.load_item(); 839 calc_input2 = extra_arg.result(); 840 } 841 LIR_Opr calc_result = rlock_result(x); 842 843 // sin, cos, pow and exp need two free fpu stack slots, so register 844 // two temporary operands 845 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); 846 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); 847 848 if (use_fpu) { 849 LIR_Opr tmp = FrameMap::fpu0_double_opr; 850 int tmp_start = 1; 851 if (calc_input2 != NULL) { 852 __ move(calc_input2, tmp); 853 tmp_start = 2; 854 calc_input2 = tmp; 855 } 856 __ move(calc_input, tmp); 857 858 calc_input = tmp; 859 calc_result = tmp; 860 861 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start); 862 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1); 863 } 864 865 switch(x->id()) { 866 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 867 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 868 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; 869 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; 870 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; 871 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; 872 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; 873 case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break; 874 case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break; 875 default: ShouldNotReachHere(); 876 } 877 878 if (use_fpu) { 879 __ move(calc_result, x->operand()); 880 } 881 } 882 883 void LIRGenerator::do_CryptoIntrinsic(Intrinsic* x) { 884 ShouldNotReachHere(); 885 } 886 887 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 888 assert(x->number_of_arguments() == 5, "wrong type"); 889 890 // Make all state_for calls early since they can emit code 891 CodeEmitInfo* info = state_for(x, x->state()); 892 893 LIRItem src(x->argument_at(0), this); 894 LIRItem src_pos(x->argument_at(1), this); 895 LIRItem dst(x->argument_at(2), this); 896 LIRItem dst_pos(x->argument_at(3), this); 897 LIRItem length(x->argument_at(4), this); 898 899 // operands for arraycopy must use fixed registers, otherwise 900 // LinearScan will fail allocation (because arraycopy always needs a 901 // call) 902 903 #ifndef _LP64 904 src.load_item_force (FrameMap::rcx_oop_opr); 905 src_pos.load_item_force (FrameMap::rdx_opr); 906 dst.load_item_force (FrameMap::rax_oop_opr); 907 dst_pos.load_item_force (FrameMap::rbx_opr); 908 length.load_item_force (FrameMap::rdi_opr); 909 LIR_Opr tmp = (FrameMap::rsi_opr); 910 #else 911 912 // The java calling convention will give us enough registers 913 // so that on the stub side the args will be perfect already. 914 // On the other slow/special case side we call C and the arg 915 // positions are not similar enough to pick one as the best. 916 // Also because the java calling convention is a "shifted" version 917 // of the C convention we can process the java args trivially into C 918 // args without worry of overwriting during the xfer 919 920 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 921 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 922 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 923 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 924 length.load_item_force (FrameMap::as_opr(j_rarg4)); 925 926 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 927 #endif // LP64 928 929 set_no_result(x); 930 931 int flags; 932 ciArrayKlass* expected_type; 933 arraycopy_helper(x, &flags, &expected_type); 934 935 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 936 } 937 938 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 939 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support"); 940 // Make all state_for calls early since they can emit code 941 LIR_Opr result = rlock_result(x); 942 int flags = 0; 943 switch (x->id()) { 944 case vmIntrinsics::_updateCRC32: { 945 LIRItem crc(x->argument_at(0), this); 946 LIRItem val(x->argument_at(1), this); 947 // val is destroyed by update_crc32 948 val.set_destroys_register(); 949 crc.load_item(); 950 val.load_item(); 951 __ update_crc32(crc.result(), val.result(), result); 952 break; 953 } 954 case vmIntrinsics::_updateBytesCRC32: 955 case vmIntrinsics::_updateByteBufferCRC32: { 956 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 957 958 LIRItem crc(x->argument_at(0), this); 959 LIRItem buf(x->argument_at(1), this); 960 LIRItem off(x->argument_at(2), this); 961 LIRItem len(x->argument_at(3), this); 962 buf.load_item(); 963 off.load_nonconstant(); 964 965 LIR_Opr index = off.result(); 966 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 967 if(off.result()->is_constant()) { 968 index = LIR_OprFact::illegalOpr; 969 offset += off.result()->as_jint(); 970 } 971 LIR_Opr base_op = buf.result(); 972 973 #ifndef _LP64 974 if (!is_updateBytes) { // long b raw address 975 base_op = new_register(T_INT); 976 __ convert(Bytecodes::_l2i, buf.result(), base_op); 977 } 978 #else 979 if (index->is_valid()) { 980 LIR_Opr tmp = new_register(T_LONG); 981 __ convert(Bytecodes::_i2l, index, tmp); 982 index = tmp; 983 } 984 #endif 985 986 LIR_Address* a = new LIR_Address(base_op, 987 index, 988 LIR_Address::times_1, 989 offset, 990 T_BYTE); 991 BasicTypeList signature(3); 992 signature.append(T_INT); 993 signature.append(T_ADDRESS); 994 signature.append(T_INT); 995 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 996 const LIR_Opr result_reg = result_register_for(x->type()); 997 998 LIR_Opr addr = new_pointer_register(); 999 __ leal(LIR_OprFact::address(a), addr); 1000 1001 crc.load_item_force(cc->at(0)); 1002 __ move(addr, cc->at(1)); 1003 len.load_item_force(cc->at(2)); 1004 1005 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 1006 __ move(result_reg, result); 1007 1008 break; 1009 } 1010 default: { 1011 ShouldNotReachHere(); 1012 } 1013 } 1014 } 1015 1016 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 1017 // _i2b, _i2c, _i2s 1018 LIR_Opr fixed_register_for(BasicType type) { 1019 switch (type) { 1020 case T_FLOAT: return FrameMap::fpu0_float_opr; 1021 case T_DOUBLE: return FrameMap::fpu0_double_opr; 1022 case T_INT: return FrameMap::rax_opr; 1023 case T_LONG: return FrameMap::long0_opr; 1024 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 1025 } 1026 } 1027 1028 void LIRGenerator::do_Convert(Convert* x) { 1029 // flags that vary for the different operations and different SSE-settings 1030 bool fixed_input, fixed_result, round_result, needs_stub; 1031 1032 switch (x->op()) { 1033 case Bytecodes::_i2l: // fall through 1034 case Bytecodes::_l2i: // fall through 1035 case Bytecodes::_i2b: // fall through 1036 case Bytecodes::_i2c: // fall through 1037 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1038 1039 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 1040 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 1041 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 1042 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1043 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1044 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1045 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 1046 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 1047 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1048 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1049 default: ShouldNotReachHere(); 1050 } 1051 1052 LIRItem value(x->value(), this); 1053 value.load_item(); 1054 LIR_Opr input = value.result(); 1055 LIR_Opr result = rlock(x); 1056 1057 // arguments of lir_convert 1058 LIR_Opr conv_input = input; 1059 LIR_Opr conv_result = result; 1060 ConversionStub* stub = NULL; 1061 1062 if (fixed_input) { 1063 conv_input = fixed_register_for(input->type()); 1064 __ move(input, conv_input); 1065 } 1066 1067 assert(fixed_result == false || round_result == false, "cannot set both"); 1068 if (fixed_result) { 1069 conv_result = fixed_register_for(result->type()); 1070 } else if (round_result) { 1071 result = new_register(result->type()); 1072 set_vreg_flag(result, must_start_in_memory); 1073 } 1074 1075 if (needs_stub) { 1076 stub = new ConversionStub(x->op(), conv_input, conv_result); 1077 } 1078 1079 __ convert(x->op(), conv_input, conv_result, stub); 1080 1081 if (result != conv_result) { 1082 __ move(conv_result, result); 1083 } 1084 1085 assert(result->is_virtual(), "result must be virtual register"); 1086 set_result(x, result); 1087 } 1088 1089 1090 void LIRGenerator::do_NewInstance(NewInstance* x) { 1091 #ifndef PRODUCT 1092 if (PrintNotLoaded && !x->klass()->is_loaded()) { 1093 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); 1094 } 1095 #endif 1096 CodeEmitInfo* info = state_for(x, x->state()); 1097 CodeEmitInfo* patching_info = NULL; 1098 if (!x->klass()->is_loaded() || PatchALot || CacheCompiledCode) { 1099 patching_info = state_for(x, x->state_before()); 1100 } 1101 1102 LIR_Opr reg = result_register_for(x->type()); 1103 new_instance(reg, x->klass(), 1104 FrameMap::rcx_oop_opr, 1105 FrameMap::rdi_oop_opr, 1106 FrameMap::rsi_oop_opr, 1107 LIR_OprFact::illegalOpr, 1108 FrameMap::rdx_metadata_opr, info, patching_info); 1109 LIR_Opr result = rlock_result(x); 1110 __ move(reg, result); 1111 } 1112 1113 1114 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1115 CodeEmitInfo* info = state_for(x, x->state()); 1116 1117 LIRItem length(x->length(), this); 1118 length.load_item_force(FrameMap::rbx_opr); 1119 1120 LIR_Opr reg = result_register_for(x->type()); 1121 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1122 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1123 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1124 LIR_Opr tmp4 = reg; 1125 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1126 LIR_Opr len = length.result(); 1127 BasicType elem_type = x->elt_type(); 1128 1129 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1130 1131 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1132 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 1133 1134 LIR_Opr result = rlock_result(x); 1135 __ move(reg, result); 1136 } 1137 1138 1139 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1140 LIRItem length(x->length(), this); 1141 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1142 // and therefore provide the state before the parameters have been consumed 1143 CodeEmitInfo* patching_info = NULL; 1144 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); 1145 if (!obj->is_loaded() || PatchALot || CacheCompiledCode) { 1146 patching_info = state_for(x, x->state_before()); 1147 } 1148 1149 CodeEmitInfo* info = state_for(x, x->state()); 1150 1151 const LIR_Opr reg = result_register_for(x->type()); 1152 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1153 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1154 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1155 LIR_Opr tmp4 = reg; 1156 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1157 1158 length.load_item_force(FrameMap::rbx_opr); 1159 LIR_Opr len = length.result(); 1160 1161 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1162 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1163 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1164 } 1165 klass2reg_with_patching(klass_reg, obj, patching_info); 1166 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1167 1168 LIR_Opr result = rlock_result(x); 1169 __ move(reg, result); 1170 } 1171 1172 1173 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1174 Values* dims = x->dims(); 1175 int i = dims->length(); 1176 LIRItemList* items = new LIRItemList(dims->length(), NULL); 1177 while (i-- > 0) { 1178 LIRItem* size = new LIRItem(dims->at(i), this); 1179 items->at_put(i, size); 1180 } 1181 1182 // Evaluate state_for early since it may emit code. 1183 CodeEmitInfo* patching_info = NULL; 1184 if (!x->klass()->is_loaded() || PatchALot || CacheCompiledCode) { 1185 patching_info = state_for(x, x->state_before()); 1186 1187 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1188 // clone all handlers (NOTE: Usually this is handled transparently 1189 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1190 // is done explicitly here because a stub isn't being used). 1191 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1192 } 1193 CodeEmitInfo* info = state_for(x, x->state()); 1194 1195 i = dims->length(); 1196 while (i-- > 0) { 1197 LIRItem* size = items->at(i); 1198 size->load_nonconstant(); 1199 1200 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1201 } 1202 1203 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1204 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1205 1206 LIR_Opr rank = FrameMap::rbx_opr; 1207 __ move(LIR_OprFact::intConst(x->rank()), rank); 1208 LIR_Opr varargs = FrameMap::rcx_opr; 1209 __ move(FrameMap::rsp_opr, varargs); 1210 LIR_OprList* args = new LIR_OprList(3); 1211 args->append(klass_reg); 1212 args->append(rank); 1213 args->append(varargs); 1214 LIR_Opr reg = result_register_for(x->type()); 1215 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1216 LIR_OprFact::illegalOpr, 1217 reg, args, info); 1218 1219 LIR_Opr result = rlock_result(x); 1220 __ move(reg, result); 1221 } 1222 1223 1224 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1225 // nothing to do for now 1226 } 1227 1228 1229 void LIRGenerator::do_CheckCast(CheckCast* x) { 1230 LIRItem obj(x->obj(), this); 1231 1232 CodeEmitInfo* patching_info = NULL; 1233 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 1234 // must do this before locking the destination register as an oop register, 1235 // and before the obj is loaded (the latter is for deoptimization) 1236 patching_info = state_for(x, x->state_before()); 1237 } 1238 obj.load_item(); 1239 1240 CodeStub* stub; 1241 1242 if (x->is_incompatible_class_change_check()) { 1243 assert(patching_info == NULL, "can't patch this"); 1244 // info for exceptions 1245 CodeEmitInfo* info_for_exception = state_for(x); 1246 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1247 } else if (x->is_profile_inlining()) { 1248 assert(patching_info == NULL, "can't patch this"); 1249 CodeEmitInfo* info = state_for(x, x->state_before()); 1250 stub = new InvalidateProfileInliningStub(obj.result(), x->klass(), info); 1251 } else { 1252 // info for exceptions 1253 CodeEmitInfo* info_for_exception = state_for(x); 1254 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1255 } 1256 LIR_Opr reg = rlock_result(x); 1257 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1258 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1259 tmp3 = new_register(objectType); 1260 } 1261 __ checkcast(reg, obj.result(), x->klass(), 1262 new_register(objectType), new_register(objectType), tmp3, 1263 x->direct_compare(), patching_info, stub, 1264 x->profiled_method(), x->profiled_bci()); 1265 } 1266 1267 1268 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1269 LIRItem obj(x->obj(), this); 1270 1271 // result and test object may not be in same register 1272 LIR_Opr reg = rlock_result(x); 1273 CodeEmitInfo* patching_info = NULL; 1274 if ((!x->klass()->is_loaded() || PatchALot)) { 1275 // must do this before locking the destination register as an oop register 1276 patching_info = state_for(x, x->state_before()); 1277 } 1278 obj.load_item(); 1279 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1280 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1281 tmp3 = new_register(objectType); 1282 } 1283 __ instanceof(reg, obj.result(), x->klass(), 1284 new_register(objectType), new_register(objectType), tmp3, 1285 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1286 } 1287 1288 1289 void LIRGenerator::do_If(If* x) { 1290 assert(x->number_of_sux() == 2, "inconsistency"); 1291 ValueTag tag = x->x()->type()->tag(); 1292 bool is_safepoint = x->is_safepoint(); 1293 1294 If::Condition cond = x->cond(); 1295 1296 LIRItem xitem(x->x(), this); 1297 LIRItem yitem(x->y(), this); 1298 LIRItem* xin = &xitem; 1299 LIRItem* yin = &yitem; 1300 1301 if (tag == longTag) { 1302 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1303 // mirror for other conditions 1304 if (cond == If::gtr || cond == If::leq) { 1305 cond = Instruction::mirror(cond); 1306 xin = &yitem; 1307 yin = &xitem; 1308 } 1309 xin->set_destroys_register(); 1310 } 1311 xin->load_item(); 1312 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1313 // inline long zero 1314 yin->dont_load_item(); 1315 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1316 // longs cannot handle constants at right side 1317 yin->load_item(); 1318 } else { 1319 yin->dont_load_item(); 1320 } 1321 1322 // add safepoint before generating condition code so it can be recomputed 1323 if (x->is_safepoint()) { 1324 // increment backedge counter if needed 1325 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); 1326 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); 1327 } 1328 set_no_result(x); 1329 1330 LIR_Opr left = xin->result(); 1331 LIR_Opr right = yin->result(); 1332 __ cmp(lir_cond(cond), left, right); 1333 // Generate branch profiling. Profiling code doesn't kill flags. 1334 profile_branch(x, cond); 1335 move_to_phi(x->state()); 1336 if (x->x()->type()->is_float_kind()) { 1337 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 1338 } else { 1339 __ branch(lir_cond(cond), right->type(), x->tsux()); 1340 } 1341 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1342 __ jump(x->default_sux()); 1343 } 1344 1345 1346 LIR_Opr LIRGenerator::getThreadPointer() { 1347 #ifdef _LP64 1348 return FrameMap::as_pointer_opr(r15_thread); 1349 #else 1350 LIR_Opr result = new_register(T_INT); 1351 __ get_thread(result); 1352 return result; 1353 #endif // 1354 } 1355 1356 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1357 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1358 LIR_OprList* args = new LIR_OprList(); 1359 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1360 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1361 } 1362 1363 1364 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1365 CodeEmitInfo* info) { 1366 if (address->type() == T_LONG) { 1367 address = new LIR_Address(address->base(), 1368 address->index(), address->scale(), 1369 address->disp(), T_DOUBLE); 1370 // Transfer the value atomically by using FP moves. This means 1371 // the value has to be moved between CPU and FPU registers. It 1372 // always has to be moved through spill slot since there's no 1373 // quick way to pack the value into an SSE register. 1374 LIR_Opr temp_double = new_register(T_DOUBLE); 1375 LIR_Opr spill = new_register(T_LONG); 1376 set_vreg_flag(spill, must_start_in_memory); 1377 __ move(value, spill); 1378 __ volatile_move(spill, temp_double, T_LONG); 1379 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1380 } else { 1381 __ store(value, address, info); 1382 } 1383 } 1384 1385 1386 1387 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1388 CodeEmitInfo* info) { 1389 if (address->type() == T_LONG) { 1390 address = new LIR_Address(address->base(), 1391 address->index(), address->scale(), 1392 address->disp(), T_DOUBLE); 1393 // Transfer the value atomically by using FP moves. This means 1394 // the value has to be moved between CPU and FPU registers. In 1395 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1396 // SSE2+ mode it can be moved directly. 1397 LIR_Opr temp_double = new_register(T_DOUBLE); 1398 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1399 __ volatile_move(temp_double, result, T_LONG); 1400 if (UseSSE < 2) { 1401 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1402 set_vreg_flag(result, must_start_in_memory); 1403 } 1404 } else { 1405 __ load(address, result, info); 1406 } 1407 } 1408 1409 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, 1410 BasicType type, bool is_volatile) { 1411 if (is_volatile && type == T_LONG) { 1412 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1413 LIR_Opr tmp = new_register(T_DOUBLE); 1414 __ load(addr, tmp); 1415 LIR_Opr spill = new_register(T_LONG); 1416 set_vreg_flag(spill, must_start_in_memory); 1417 __ move(tmp, spill); 1418 __ move(spill, dst); 1419 } else { 1420 LIR_Address* addr = new LIR_Address(src, offset, type); 1421 __ load(addr, dst); 1422 } 1423 } 1424 1425 1426 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, 1427 BasicType type, bool is_volatile) { 1428 if (is_volatile && type == T_LONG) { 1429 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1430 LIR_Opr tmp = new_register(T_DOUBLE); 1431 LIR_Opr spill = new_register(T_DOUBLE); 1432 set_vreg_flag(spill, must_start_in_memory); 1433 __ move(data, spill); 1434 __ move(spill, tmp); 1435 __ move(tmp, addr); 1436 } else { 1437 LIR_Address* addr = new LIR_Address(src, offset, type); 1438 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1439 if (is_obj) { 1440 // Do the pre-write barrier, if any. 1441 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1442 true /* do_load */, false /* patch */, NULL); 1443 __ move(data, addr); 1444 assert(src->is_register(), "must be register"); 1445 // Seems to be a precise address 1446 post_barrier(LIR_OprFact::address(addr), data); 1447 } else { 1448 __ move(data, addr); 1449 } 1450 } 1451 } 1452 1453 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) { 1454 BasicType type = x->basic_type(); 1455 LIRItem src(x->object(), this); 1456 LIRItem off(x->offset(), this); 1457 LIRItem value(x->value(), this); 1458 1459 src.load_item(); 1460 value.load_item(); 1461 off.load_nonconstant(); 1462 1463 LIR_Opr dst = rlock_result(x, type); 1464 LIR_Opr data = value.result(); 1465 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1466 LIR_Opr offset = off.result(); 1467 1468 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type"); 1469 LIR_Address* addr; 1470 if (offset->is_constant()) { 1471 #ifdef _LP64 1472 jlong c = offset->as_jlong(); 1473 if ((jlong)((jint)c) == c) { 1474 addr = new LIR_Address(src.result(), (jint)c, type); 1475 } else { 1476 LIR_Opr tmp = new_register(T_LONG); 1477 __ move(offset, tmp); 1478 addr = new LIR_Address(src.result(), tmp, type); 1479 } 1480 #else 1481 addr = new LIR_Address(src.result(), offset->as_jint(), type); 1482 #endif 1483 } else { 1484 addr = new LIR_Address(src.result(), offset, type); 1485 } 1486 1487 // Because we want a 2-arg form of xchg and xadd 1488 __ move(data, dst); 1489 1490 if (x->is_add()) { 1491 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1492 } else { 1493 if (is_obj) { 1494 // Do the pre-write barrier, if any. 1495 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1496 true /* do_load */, false /* patch */, NULL); 1497 } 1498 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1499 if (is_obj) { 1500 // Seems to be a precise address 1501 post_barrier(LIR_OprFact::address(addr), data); 1502 } 1503 } 1504 }