src/cpu/x86/vm/x86_32.ad
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src/cpu/x86/vm/x86_32.ad

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5834 
5835 // Load Byte (8bit signed) into Long Register
5836 instruct loadB2L(eRegL dst, memory mem, eFlagsReg cr) %{
5837   match(Set dst (ConvI2L (LoadB mem)));
5838   effect(KILL cr);
5839 
5840   ins_cost(375);
5841   format %{ "MOVSX8 $dst.lo,$mem\t# byte -> long\n\t"
5842             "MOV    $dst.hi,$dst.lo\n\t"
5843             "SAR    $dst.hi,7" %}
5844 
5845   ins_encode %{
5846     __ movsbl($dst$$Register, $mem$$Address);
5847     __ movl(HIGH_FROM_LOW($dst$$Register), $dst$$Register); // This is always a different register.
5848     __ sarl(HIGH_FROM_LOW($dst$$Register), 7); // 24+1 MSB are already signed extended.
5849   %}
5850 
5851   ins_pipe(ialu_reg_mem);
5852 %}
5853 

















5854 // Load Unsigned Byte (8bit UNsigned)
5855 instruct loadUB(xRegI dst, memory mem) %{
5856   match(Set dst (LoadUB mem));
5857 
5858   ins_cost(125);
5859   format %{ "MOVZX8 $dst,$mem\t# ubyte -> int" %}
5860 
5861   ins_encode %{
5862     __ movzbl($dst$$Register, $mem$$Address);
5863   %}
5864 
5865   ins_pipe(ialu_reg_mem);
5866 %}
5867 
5868 // Load Unsigned Byte (8 bit UNsigned) into Long Register
5869 instruct loadUB2L(eRegL dst, memory mem, eFlagsReg cr) %{
5870   match(Set dst (ConvI2L (LoadUB mem)));
5871   effect(KILL cr);
5872 
5873   ins_cost(250);


5928 
5929 // Load Short (16bit signed) into Long Register
5930 instruct loadS2L(eRegL dst, memory mem, eFlagsReg cr) %{
5931   match(Set dst (ConvI2L (LoadS mem)));
5932   effect(KILL cr);
5933 
5934   ins_cost(375);
5935   format %{ "MOVSX  $dst.lo,$mem\t# short -> long\n\t"
5936             "MOV    $dst.hi,$dst.lo\n\t"
5937             "SAR    $dst.hi,15" %}
5938 
5939   ins_encode %{
5940     __ movswl($dst$$Register, $mem$$Address);
5941     __ movl(HIGH_FROM_LOW($dst$$Register), $dst$$Register); // This is always a different register.
5942     __ sarl(HIGH_FROM_LOW($dst$$Register), 15); // 16+1 MSB are already signed extended.
5943   %}
5944 
5945   ins_pipe(ialu_reg_mem);
5946 %}
5947 
































5948 // Load Unsigned Short/Char (16bit unsigned)
5949 instruct loadUS(rRegI dst, memory mem) %{
5950   match(Set dst (LoadUS mem));
5951 
5952   ins_cost(125);
5953   format %{ "MOVZX  $dst,$mem\t# ushort/char -> int" %}
5954 
5955   ins_encode %{
5956     __ movzwl($dst$$Register, $mem$$Address);
5957   %}
5958 
5959   ins_pipe(ialu_reg_mem);
5960 %}
5961 















5962 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
5963 instruct loadUS2B(rRegI dst, memory mem, immI_24 twentyfour) %{
5964   match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
5965 
5966   ins_cost(125);
5967   format %{ "MOVSX  $dst, $mem\t# ushort -> byte" %}
5968   ins_encode %{
5969     __ movsbl($dst$$Register, $mem$$Address);
5970   %}
5971   ins_pipe(ialu_reg_mem);
5972 %}
5973 
5974 // Load Unsigned Short/Char (16 bit UNsigned) into Long Register
5975 instruct loadUS2L(eRegL dst, memory mem, eFlagsReg cr) %{
5976   match(Set dst (ConvI2L (LoadUS mem)));
5977   effect(KILL cr);
5978 
5979   ins_cost(250);
5980   format %{ "MOVZX  $dst.lo,$mem\t# ushort/char -> long\n\t"
5981             "XOR    $dst.hi,$dst.hi" %}




5834 
5835 // Load Byte (8bit signed) into Long Register
5836 instruct loadB2L(eRegL dst, memory mem, eFlagsReg cr) %{
5837   match(Set dst (ConvI2L (LoadB mem)));
5838   effect(KILL cr);
5839 
5840   ins_cost(375);
5841   format %{ "MOVSX8 $dst.lo,$mem\t# byte -> long\n\t"
5842             "MOV    $dst.hi,$dst.lo\n\t"
5843             "SAR    $dst.hi,7" %}
5844 
5845   ins_encode %{
5846     __ movsbl($dst$$Register, $mem$$Address);
5847     __ movl(HIGH_FROM_LOW($dst$$Register), $dst$$Register); // This is always a different register.
5848     __ sarl(HIGH_FROM_LOW($dst$$Register), 7); // 24+1 MSB are already signed extended.
5849   %}
5850 
5851   ins_pipe(ialu_reg_mem);
5852 %}
5853 
5854 // Load Byte (8 bit signed) with mask into Long Register
5855 instruct loadB2L_immI8(eRegL dst, memory mem, immI8 mask, eFlagsReg cr) %{
5856   match(Set dst (ConvI2L (AndI (LoadB mem) mask)));
5857   effect(KILL cr);
5858 
5859   format %{ "MOVZX8 $dst.lo,$mem\t# byte & 8-bit mask -> long\n\t"
5860             "XOR    $dst.hi,$dst.hi\n\t"
5861             "AND    $dst.lo,$mask" %}
5862   ins_encode %{
5863     Register Rdst = $dst$$Register;
5864     __ movzbl(Rdst, $mem$$Address);
5865     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
5866     __ andl(Rdst, $mask$$constant);
5867   %}
5868   ins_pipe(ialu_reg_mem);
5869 %}
5870 
5871 // Load Unsigned Byte (8bit UNsigned)
5872 instruct loadUB(xRegI dst, memory mem) %{
5873   match(Set dst (LoadUB mem));
5874 
5875   ins_cost(125);
5876   format %{ "MOVZX8 $dst,$mem\t# ubyte -> int" %}
5877 
5878   ins_encode %{
5879     __ movzbl($dst$$Register, $mem$$Address);
5880   %}
5881 
5882   ins_pipe(ialu_reg_mem);
5883 %}
5884 
5885 // Load Unsigned Byte (8 bit UNsigned) into Long Register
5886 instruct loadUB2L(eRegL dst, memory mem, eFlagsReg cr) %{
5887   match(Set dst (ConvI2L (LoadUB mem)));
5888   effect(KILL cr);
5889 
5890   ins_cost(250);


5945 
5946 // Load Short (16bit signed) into Long Register
5947 instruct loadS2L(eRegL dst, memory mem, eFlagsReg cr) %{
5948   match(Set dst (ConvI2L (LoadS mem)));
5949   effect(KILL cr);
5950 
5951   ins_cost(375);
5952   format %{ "MOVSX  $dst.lo,$mem\t# short -> long\n\t"
5953             "MOV    $dst.hi,$dst.lo\n\t"
5954             "SAR    $dst.hi,15" %}
5955 
5956   ins_encode %{
5957     __ movswl($dst$$Register, $mem$$Address);
5958     __ movl(HIGH_FROM_LOW($dst$$Register), $dst$$Register); // This is always a different register.
5959     __ sarl(HIGH_FROM_LOW($dst$$Register), 15); // 16+1 MSB are already signed extended.
5960   %}
5961 
5962   ins_pipe(ialu_reg_mem);
5963 %}
5964 
5965 // Load Short (16 bit signed) with mask 0xFF into Long Register
5966 instruct loadS2L_immI_255(eRegL dst, memory mem, immI_255 mask, eFlagsReg cr) %{
5967   match(Set dst (ConvI2L (AndI (LoadS mem) mask)));
5968   effect(KILL cr);
5969 
5970   format %{ "MOVZX8 $dst.lo,$mem\t# short & 0xFF -> long\n\t"
5971             "XOR    $dst.hi,$dst.hi" %}
5972   ins_encode %{
5973     Register Rdst = $dst$$Register;
5974     __ movzbl(Rdst, $mem$$Address);
5975     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
5976   %}
5977   ins_pipe(ialu_reg_mem);
5978 %}
5979 
5980 // Load Short (16 bit signed) with a 16-bit mask into Long Register
5981 instruct loadS2L_immI16(eRegL dst, memory mem, immI16 mask, eFlagsReg cr) %{
5982   match(Set dst (ConvI2L (AndI (LoadS mem) mask)));
5983   effect(KILL cr);
5984 
5985   format %{ "MOVZX  $dst.lo, $mem\t# short & 16-bit mask -> long\n\t"
5986             "XOR    $dst.hi,$dst.hi\n\t"
5987             "AND    $dst.lo,$mask" %}
5988   ins_encode %{
5989     Register Rdst = $dst$$Register;
5990     __ movzwl(Rdst, $mem$$Address);
5991     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
5992     __ andl(Rdst, $mask$$constant);
5993   %}
5994   ins_pipe(ialu_reg_mem);
5995 %}
5996 
5997 // Load Unsigned Short/Char (16bit unsigned)
5998 instruct loadUS(rRegI dst, memory mem) %{
5999   match(Set dst (LoadUS mem));
6000 
6001   ins_cost(125);
6002   format %{ "MOVZX  $dst,$mem\t# ushort/char -> int" %}
6003 
6004   ins_encode %{
6005     __ movzwl($dst$$Register, $mem$$Address);
6006   %}
6007 
6008   ins_pipe(ialu_reg_mem);
6009 %}
6010 
6011 // Load Unsigned Short/Char (16 bit UNsigned) shifting left & right by 16-bit
6012 instruct loadUS_shiftLR_16(rRegI dst, memory mem, immI_16 sixteen)
6013 %{
6014   match(Set dst (RShiftI (LShiftI (LoadUS mem) sixteen) sixteen));
6015 
6016   ins_cost(125);
6017   format %{ "MOVSX  $dst,$mem\t# (ushort/char << 16 ) >> 16" %}
6018 
6019   ins_encode %{
6020     __ movswl($dst$$Register, $mem$$Address);
6021   %}
6022 
6023   ins_pipe(ialu_reg_reg);
6024 %}
6025 
6026 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
6027 instruct loadUS2B(rRegI dst, memory mem, immI_24 twentyfour) %{
6028   match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
6029 
6030   ins_cost(125);
6031   format %{ "MOVSX  $dst, $mem\t# ushort -> byte" %}
6032   ins_encode %{
6033     __ movsbl($dst$$Register, $mem$$Address);
6034   %}
6035   ins_pipe(ialu_reg_mem);
6036 %}
6037 
6038 // Load Unsigned Short/Char (16 bit UNsigned) into Long Register
6039 instruct loadUS2L(eRegL dst, memory mem, eFlagsReg cr) %{
6040   match(Set dst (ConvI2L (LoadUS mem)));
6041   effect(KILL cr);
6042 
6043   ins_cost(250);
6044   format %{ "MOVZX  $dst.lo,$mem\t# ushort/char -> long\n\t"
6045             "XOR    $dst.hi,$dst.hi" %}


src/cpu/x86/vm/x86_32.ad
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