src/cpu/x86/vm/x86_32.ad
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*** old/src/cpu/x86/vm/x86_32.ad Sat Oct 20 02:54:21 2012
--- new/src/cpu/x86/vm/x86_32.ad Sat Oct 20 02:54:21 2012
*** 5849,5858 ****
--- 5849,5875 ----
%}
ins_pipe(ialu_reg_mem);
%}
+ // Load Byte (8 bit signed) with mask into Long Register
+ instruct loadB2L_immI8(eRegL dst, memory mem, immI8 mask, eFlagsReg cr) %{
+ match(Set dst (ConvI2L (AndI (LoadB mem) mask)));
+ effect(KILL cr);
+
+ format %{ "MOVZX8 $dst.lo,$mem\t# byte & 8-bit mask -> long\n\t"
+ "XOR $dst.hi,$dst.hi\n\t"
+ "AND $dst.lo,$mask" %}
+ ins_encode %{
+ Register Rdst = $dst$$Register;
+ __ movzbl(Rdst, $mem$$Address);
+ __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+ __ andl(Rdst, $mask$$constant);
+ %}
+ ins_pipe(ialu_reg_mem);
+ %}
+
// Load Unsigned Byte (8bit UNsigned)
instruct loadUB(xRegI dst, memory mem) %{
match(Set dst (LoadUB mem));
ins_cost(125);
*** 5943,5952 ****
--- 5960,6001 ----
%}
ins_pipe(ialu_reg_mem);
%}
+ // Load Short (16 bit signed) with mask 0xFF into Long Register
+ instruct loadS2L_immI_255(eRegL dst, memory mem, immI_255 mask, eFlagsReg cr) %{
+ match(Set dst (ConvI2L (AndI (LoadS mem) mask)));
+ effect(KILL cr);
+
+ format %{ "MOVZX8 $dst.lo,$mem\t# short & 0xFF -> long\n\t"
+ "XOR $dst.hi,$dst.hi" %}
+ ins_encode %{
+ Register Rdst = $dst$$Register;
+ __ movzbl(Rdst, $mem$$Address);
+ __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+ %}
+ ins_pipe(ialu_reg_mem);
+ %}
+
+ // Load Short (16 bit signed) with a 16-bit mask into Long Register
+ instruct loadS2L_immI16(eRegL dst, memory mem, immI16 mask, eFlagsReg cr) %{
+ match(Set dst (ConvI2L (AndI (LoadS mem) mask)));
+ effect(KILL cr);
+
+ format %{ "MOVZX $dst.lo, $mem\t# short & 16-bit mask -> long\n\t"
+ "XOR $dst.hi,$dst.hi\n\t"
+ "AND $dst.lo,$mask" %}
+ ins_encode %{
+ Register Rdst = $dst$$Register;
+ __ movzwl(Rdst, $mem$$Address);
+ __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+ __ andl(Rdst, $mask$$constant);
+ %}
+ ins_pipe(ialu_reg_mem);
+ %}
+
// Load Unsigned Short/Char (16bit unsigned)
instruct loadUS(rRegI dst, memory mem) %{
match(Set dst (LoadUS mem));
ins_cost(125);
*** 5957,5966 ****
--- 6006,6030 ----
%}
ins_pipe(ialu_reg_mem);
%}
+ // Load Unsigned Short/Char (16 bit UNsigned) shifting left & right by 16-bit
+ instruct loadUS_shiftLR_16(rRegI dst, memory mem, immI_16 sixteen)
+ %{
+ match(Set dst (RShiftI (LShiftI (LoadUS mem) sixteen) sixteen));
+
+ ins_cost(125);
+ format %{ "MOVSX $dst,$mem\t# (ushort/char << 16 ) >> 16" %}
+
+ ins_encode %{
+ __ movswl($dst$$Register, $mem$$Address);
+ %}
+
+ ins_pipe(ialu_reg_reg);
+ %}
+
// Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
instruct loadUS2B(rRegI dst, memory mem, immI_24 twentyfour) %{
match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
ins_cost(125);
src/cpu/x86/vm/x86_32.ad
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