1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/memnode.hpp"
30 #include "opto/mulnode.hpp"
31 #include "opto/phaseX.hpp"
32 #include "opto/subnode.hpp"
33
34 // Portions of code courtesy of Clifford Click
35
36
37 //=============================================================================
38 //------------------------------hash-------------------------------------------
39 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
40 // (commute) inputs to MulNodes willy-nilly so the hash function must return
41 // the same value in the presence of edge swapping.
42 uint MulNode::hash() const {
43 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
44 }
45
46 //------------------------------Identity---------------------------------------
47 // Multiplying a one preserves the other argument
48 Node *MulNode::Identity( PhaseTransform *phase ) {
49 register const Type *one = mul_id(); // The multiplicative identity
50 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
51 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
52
53 return this;
54 }
55
56 //------------------------------Ideal------------------------------------------
57 // We also canonicalize the Node, moving constants to the right input,
58 // and flatten expressions (so that 1+x+2 becomes x+3).
59 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
60 const Type *t1 = phase->type( in(1) );
61 const Type *t2 = phase->type( in(2) );
62 Node *progress = NULL; // Progress flag
63 // We are OK if right is a constant, or right is a load and
64 // left is a non-constant.
65 if( !(t2->singleton() ||
66 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
67 if( t1->singleton() || // Left input is a constant?
68 // Otherwise, sort inputs (commutativity) to help value numbering.
69 (in(1)->_idx > in(2)->_idx) ) {
70 swap_edges(1, 2);
71 const Type *t = t1;
72 t1 = t2;
73 t2 = t;
74 progress = this; // Made progress
75 }
76 }
77
78 // If the right input is a constant, and the left input is a product of a
79 // constant, flatten the expression tree.
80 uint op = Opcode();
81 if( t2->singleton() && // Right input is a constant?
82 op != Op_MulF && // Float & double cannot reassociate
83 op != Op_MulD ) {
84 if( t2 == Type::TOP ) return NULL;
85 Node *mul1 = in(1);
86 #ifdef ASSERT
87 // Check for dead loop
88 int op1 = mul1->Opcode();
89 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
90 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
91 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
92 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
93 assert(false, "dead loop in MulNode::Ideal");
94 #endif
95
96 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
97 // Mul of a constant?
98 const Type *t12 = phase->type( mul1->in(2) );
99 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
100 // Compute new constant; check for overflow
101 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
102 if( tcon01->singleton() ) {
103 // The Mul of the flattened expression
104 set_req(1, mul1->in(1));
105 set_req(2, phase->makecon( tcon01 ));
106 t2 = tcon01;
107 progress = this; // Made progress
108 }
109 }
110 }
111 // If the right input is a constant, and the left input is an add of a
112 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
113 const Node *add1 = in(1);
114 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
115 // Add of a constant?
116 const Type *t12 = phase->type( add1->in(2) );
117 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
118 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
119 // Compute new constant; check for overflow
120 const Type *tcon01 = mul_ring(t2,t12);
121 if( tcon01->singleton() ) {
122
123 // Convert (X+con1)*con0 into X*con0
124 Node *mul = clone(); // mul = ()*con0
125 mul->set_req(1,add1->in(1)); // mul = X*con0
126 mul = phase->transform(mul);
127
128 Node *add2 = add1->clone();
129 add2->set_req(1, mul); // X*con0 + con0*con1
130 add2->set_req(2, phase->makecon(tcon01) );
131 progress = add2;
132 }
133 }
134 } // End of is left input an add
135 } // End of is right input a Mul
136
137 return progress;
138 }
139
140 //------------------------------Value-----------------------------------------
141 const Type *MulNode::Value( PhaseTransform *phase ) const {
142 const Type *t1 = phase->type( in(1) );
143 const Type *t2 = phase->type( in(2) );
144 // Either input is TOP ==> the result is TOP
145 if( t1 == Type::TOP ) return Type::TOP;
146 if( t2 == Type::TOP ) return Type::TOP;
147
148 // Either input is ZERO ==> the result is ZERO.
149 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
150 int op = Opcode();
151 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
152 const Type *zero = add_id(); // The multiplicative zero
153 if( t1->higher_equal( zero ) ) return zero;
154 if( t2->higher_equal( zero ) ) return zero;
155 }
156
157 // Either input is BOTTOM ==> the result is the local BOTTOM
158 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
159 return bottom_type();
160
161 #if defined(IA32)
162 // Can't trust native compilers to properly fold strict double
163 // multiplication with round-to-zero on this platform.
164 if (op == Op_MulD && phase->C->method()->is_strict()) {
165 return TypeD::DOUBLE;
166 }
167 #endif
168
169 return mul_ring(t1,t2); // Local flavor of type multiplication
170 }
171
172
173 //=============================================================================
174 //------------------------------Ideal------------------------------------------
175 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
176 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
177 // Swap constant to right
178 jint con;
179 if ((con = in(1)->find_int_con(0)) != 0) {
180 swap_edges(1, 2);
181 // Finish rest of method to use info in 'con'
182 } else if ((con = in(2)->find_int_con(0)) == 0) {
183 return MulNode::Ideal(phase, can_reshape);
184 }
185
186 // Now we have a constant Node on the right and the constant in con
187 if( con == 0 ) return NULL; // By zero is handled by Value call
188 if( con == 1 ) return NULL; // By one is handled by Identity call
189
190 // Check for negative constant; if so negate the final result
191 bool sign_flip = false;
192 if( con < 0 ) {
193 con = -con;
194 sign_flip = true;
195 }
196
197 // Get low bit; check for being the only bit
198 Node *res = NULL;
199 jint bit1 = con & -con; // Extract low bit
200 if( bit1 == con ) { // Found a power of 2?
201 res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
202 } else {
203
204 // Check for constant with 2 bits set
205 jint bit2 = con-bit1;
206 bit2 = bit2 & -bit2; // Extract 2nd bit
207 if( bit2 + bit1 == con ) { // Found all bits in con?
208 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
209 Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
210 res = new (phase->C) AddINode( n2, n1 );
211
212 } else if (is_power_of_2(con+1)) {
213 // Sleezy: power-of-2 -1. Next time be generic.
214 jint temp = (jint) (con + 1);
215 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
216 res = new (phase->C) SubINode( n1, in(1) );
217 } else {
218 return MulNode::Ideal(phase, can_reshape);
219 }
220 }
221
222 if( sign_flip ) { // Need to negate result?
223 res = phase->transform(res);// Transform, before making the zero con
224 res = new (phase->C) SubINode(phase->intcon(0),res);
225 }
226
227 return res; // Return final result
228 }
229
230 //------------------------------mul_ring---------------------------------------
231 // Compute the product type of two integer ranges into this node.
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
233 const TypeInt *r0 = t0->is_int(); // Handy access
234 const TypeInt *r1 = t1->is_int();
235
236 // Fetch endpoints of all ranges
237 int32 lo0 = r0->_lo;
238 double a = (double)lo0;
239 int32 hi0 = r0->_hi;
240 double b = (double)hi0;
241 int32 lo1 = r1->_lo;
242 double c = (double)lo1;
243 int32 hi1 = r1->_hi;
244 double d = (double)hi1;
245
246 // Compute all endpoints & check for overflow
247 int32 A = lo0*lo1;
248 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
249 int32 B = lo0*hi1;
250 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
251 int32 C = hi0*lo1;
252 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
253 int32 D = hi0*hi1;
254 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
255
256 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
257 else { lo0 = B; hi0 = A; }
258 if( C < D ) {
259 if( C < lo0 ) lo0 = C;
260 if( D > hi0 ) hi0 = D;
261 } else {
262 if( D < lo0 ) lo0 = D;
263 if( C > hi0 ) hi0 = C;
264 }
265 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
266 }
267
268
269 //=============================================================================
270 //------------------------------Ideal------------------------------------------
271 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
272 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
273 // Swap constant to right
274 jlong con;
275 if ((con = in(1)->find_long_con(0)) != 0) {
276 swap_edges(1, 2);
277 // Finish rest of method to use info in 'con'
278 } else if ((con = in(2)->find_long_con(0)) == 0) {
279 return MulNode::Ideal(phase, can_reshape);
280 }
281
282 // Now we have a constant Node on the right and the constant in con
283 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
284 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
285
286 // Check for negative constant; if so negate the final result
287 bool sign_flip = false;
288 if( con < 0 ) {
289 con = -con;
290 sign_flip = true;
291 }
292
293 // Get low bit; check for being the only bit
294 Node *res = NULL;
295 jlong bit1 = con & -con; // Extract low bit
296 if( bit1 == con ) { // Found a power of 2?
297 res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
298 } else {
299
300 // Check for constant with 2 bits set
301 jlong bit2 = con-bit1;
302 bit2 = bit2 & -bit2; // Extract 2nd bit
303 if( bit2 + bit1 == con ) { // Found all bits in con?
304 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
305 Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
306 res = new (phase->C) AddLNode( n2, n1 );
307
308 } else if (is_power_of_2_long(con+1)) {
309 // Sleezy: power-of-2 -1. Next time be generic.
310 jlong temp = (jlong) (con + 1);
311 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
312 res = new (phase->C) SubLNode( n1, in(1) );
313 } else {
314 return MulNode::Ideal(phase, can_reshape);
315 }
316 }
317
318 if( sign_flip ) { // Need to negate result?
319 res = phase->transform(res);// Transform, before making the zero con
320 res = new (phase->C) SubLNode(phase->longcon(0),res);
321 }
322
323 return res; // Return final result
324 }
325
326 //------------------------------mul_ring---------------------------------------
327 // Compute the product type of two integer ranges into this node.
328 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
329 const TypeLong *r0 = t0->is_long(); // Handy access
330 const TypeLong *r1 = t1->is_long();
331
332 // Fetch endpoints of all ranges
333 jlong lo0 = r0->_lo;
334 double a = (double)lo0;
335 jlong hi0 = r0->_hi;
336 double b = (double)hi0;
337 jlong lo1 = r1->_lo;
338 double c = (double)lo1;
339 jlong hi1 = r1->_hi;
340 double d = (double)hi1;
341
342 // Compute all endpoints & check for overflow
343 jlong A = lo0*lo1;
344 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
345 jlong B = lo0*hi1;
346 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
347 jlong C = hi0*lo1;
348 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
349 jlong D = hi0*hi1;
350 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
351
352 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
353 else { lo0 = B; hi0 = A; }
354 if( C < D ) {
355 if( C < lo0 ) lo0 = C;
356 if( D > hi0 ) hi0 = D;
357 } else {
358 if( D < lo0 ) lo0 = D;
359 if( C > hi0 ) hi0 = C;
360 }
361 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
362 }
363
364 //=============================================================================
365 //------------------------------mul_ring---------------------------------------
366 // Compute the product type of two double ranges into this node.
367 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
368 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
369 return TypeF::make( t0->getf() * t1->getf() );
370 }
371
372 //=============================================================================
373 //------------------------------mul_ring---------------------------------------
374 // Compute the product type of two double ranges into this node.
375 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
376 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
377 // We must be multiplying 2 double constants.
378 return TypeD::make( t0->getd() * t1->getd() );
379 }
380
381 //=============================================================================
382 //------------------------------Value------------------------------------------
383 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
384 // Either input is TOP ==> the result is TOP
385 const Type *t1 = phase->type( in(1) );
386 const Type *t2 = phase->type( in(2) );
387 if( t1 == Type::TOP ) return Type::TOP;
388 if( t2 == Type::TOP ) return Type::TOP;
389
390 // Either input is BOTTOM ==> the result is the local BOTTOM
391 const Type *bot = bottom_type();
392 if( (t1 == bot) || (t2 == bot) ||
393 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
394 return bot;
395
396 // It is not worth trying to constant fold this stuff!
397 return TypeLong::LONG;
398 }
399
400 //=============================================================================
401 //------------------------------mul_ring---------------------------------------
402 // Supplied function returns the product of the inputs IN THE CURRENT RING.
403 // For the logical operations the ring's MUL is really a logical AND function.
404 // This also type-checks the inputs for sanity. Guaranteed never to
405 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
406 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
407 const TypeInt *r0 = t0->is_int(); // Handy access
408 const TypeInt *r1 = t1->is_int();
409 int widen = MAX2(r0->_widen,r1->_widen);
410
411 // If either input is a constant, might be able to trim cases
412 if( !r0->is_con() && !r1->is_con() )
413 return TypeInt::INT; // No constants to be had
414
415 // Both constants? Return bits
416 if( r0->is_con() && r1->is_con() )
417 return TypeInt::make( r0->get_con() & r1->get_con() );
418
419 if( r0->is_con() && r0->get_con() > 0 )
420 return TypeInt::make(0, r0->get_con(), widen);
421
422 if( r1->is_con() && r1->get_con() > 0 )
423 return TypeInt::make(0, r1->get_con(), widen);
424
425 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
426 return TypeInt::BOOL;
427 }
428
429 return TypeInt::INT; // No constants to be had
430 }
431
432 //------------------------------Identity---------------------------------------
433 // Masking off the high bits of an unsigned load is not required
434 Node *AndINode::Identity( PhaseTransform *phase ) {
435
436 // x & x => x
437 if (phase->eqv(in(1), in(2))) return in(1);
438
439 Node* in1 = in(1);
440 uint op = in1->Opcode();
441 const TypeInt* t2 = phase->type(in(2))->isa_int();
442 if (t2 && t2->is_con()) {
443 int con = t2->get_con();
444 // Masking off high bits which are always zero is useless.
445 const TypeInt* t1 = phase->type( in(1) )->isa_int();
446 if (t1 != NULL && t1->_lo >= 0) {
447 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
448 if ((t1_support & con) == t1_support)
449 return in1;
450 }
451 // Masking off the high bits of a unsigned-shift-right is not
452 // needed either.
453 if (op == Op_URShiftI) {
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
455 if (t12 && t12->is_con()) { // Shift is by a constant
456 int shift = t12->get_con();
457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
458 int mask = max_juint >> shift;
459 if ((mask & con) == mask) // If AND is useless, skip it
460 return in1;
461 }
462 }
463 }
464 return MulNode::Identity(phase);
465 }
466
467 //------------------------------Ideal------------------------------------------
468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
469 // Special case constant AND mask
470 const TypeInt *t2 = phase->type( in(2) )->isa_int();
471 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
472 const int mask = t2->get_con();
473 Node *load = in(1);
474 uint lop = load->Opcode();
475
476 // Masking bits off of a Character? Hi bits are already zero.
477 if( lop == Op_LoadUS &&
478 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
479 return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
480
481 // Masking bits off of a Short? Loading a Character does some masking
482 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
483 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
484 load->in(MemNode::Memory),
485 load->in(MemNode::Address),
486 load->adr_type());
487 ldus = phase->transform(ldus);
488 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
489 }
490
491 // Masking sign bits off of a Byte? Do an unsigned byte load plus
492 // an and.
493 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
494 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
495 load->in(MemNode::Memory),
496 load->in(MemNode::Address),
497 load->adr_type());
498 ldub = phase->transform(ldub);
499 return new (phase->C) AndINode(ldub, phase->intcon(mask));
500 }
501
502 // Masking off sign bits? Dont make them!
503 if( lop == Op_RShiftI ) {
504 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
505 if( t12 && t12->is_con() ) { // Shift is by a constant
506 int shift = t12->get_con();
507 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
508 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
509 // If the AND'ing of the 2 masks has no bits, then only original shifted
510 // bits survive. NO sign-extension bits survive the maskings.
511 if( (sign_bits_mask & mask) == 0 ) {
512 // Use zero-fill shift instead
513 Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
514 return new (phase->C) AndINode( zshift, in(2) );
515 }
516 }
517 }
518
519 // Check for 'negate/and-1', a pattern emitted when someone asks for
520 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
521 // plus 1) and the mask is of the low order bit. Skip the negate.
522 if( lop == Op_SubI && mask == 1 && load->in(1) &&
523 phase->type(load->in(1)) == TypeInt::ZERO )
524 return new (phase->C) AndINode( load->in(2), in(2) );
525
526 return MulNode::Ideal(phase, can_reshape);
527 }
528
529 //=============================================================================
530 //------------------------------mul_ring---------------------------------------
531 // Supplied function returns the product of the inputs IN THE CURRENT RING.
532 // For the logical operations the ring's MUL is really a logical AND function.
533 // This also type-checks the inputs for sanity. Guaranteed never to
534 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
535 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
536 const TypeLong *r0 = t0->is_long(); // Handy access
537 const TypeLong *r1 = t1->is_long();
538 int widen = MAX2(r0->_widen,r1->_widen);
539
540 // If either input is a constant, might be able to trim cases
541 if( !r0->is_con() && !r1->is_con() )
542 return TypeLong::LONG; // No constants to be had
543
544 // Both constants? Return bits
545 if( r0->is_con() && r1->is_con() )
546 return TypeLong::make( r0->get_con() & r1->get_con() );
547
548 if( r0->is_con() && r0->get_con() > 0 )
549 return TypeLong::make(CONST64(0), r0->get_con(), widen);
550
551 if( r1->is_con() && r1->get_con() > 0 )
552 return TypeLong::make(CONST64(0), r1->get_con(), widen);
553
554 return TypeLong::LONG; // No constants to be had
555 }
556
557 //------------------------------Identity---------------------------------------
558 // Masking off the high bits of an unsigned load is not required
559 Node *AndLNode::Identity( PhaseTransform *phase ) {
560
561 // x & x => x
562 if (phase->eqv(in(1), in(2))) return in(1);
563
564 Node *usr = in(1);
565 const TypeLong *t2 = phase->type( in(2) )->isa_long();
566 if( t2 && t2->is_con() ) {
567 jlong con = t2->get_con();
568 // Masking off high bits which are always zero is useless.
569 const TypeLong* t1 = phase->type( in(1) )->isa_long();
570 if (t1 != NULL && t1->_lo >= 0) {
571 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
572 if ((t1_support & con) == t1_support)
573 return usr;
574 }
575 uint lop = usr->Opcode();
576 // Masking off the high bits of a unsigned-shift-right is not
577 // needed either.
578 if( lop == Op_URShiftL ) {
579 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
580 if( t12 && t12->is_con() ) { // Shift is by a constant
581 int shift = t12->get_con();
582 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
583 jlong mask = max_julong >> shift;
584 if( (mask&con) == mask ) // If AND is useless, skip it
585 return usr;
586 }
587 }
588 }
589 return MulNode::Identity(phase);
590 }
591
592 //------------------------------Ideal------------------------------------------
593 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
594 // Special case constant AND mask
595 const TypeLong *t2 = phase->type( in(2) )->isa_long();
596 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
597 const jlong mask = t2->get_con();
598
599 Node* in1 = in(1);
600 uint op = in1->Opcode();
601
602 // Are we masking a long that was converted from an int with a mask
603 // that fits in 32-bits? Commute them and use an AndINode. Don't
604 // convert masks which would cause a sign extension of the integer
605 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
606 // would be optimized away later in Identity.
607 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
608 Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
609 andi = phase->transform(andi);
610 return new (phase->C) ConvI2LNode(andi);
611 }
612
613 // Masking off sign bits? Dont make them!
614 if (op == Op_RShiftL) {
615 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
616 if( t12 && t12->is_con() ) { // Shift is by a constant
617 int shift = t12->get_con();
618 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
619 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
620 // If the AND'ing of the 2 masks has no bits, then only original shifted
621 // bits survive. NO sign-extension bits survive the maskings.
622 if( (sign_bits_mask & mask) == 0 ) {
623 // Use zero-fill shift instead
624 Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
625 return new (phase->C) AndLNode(zshift, in(2));
626 }
627 }
628 }
629
630 return MulNode::Ideal(phase, can_reshape);
631 }
632
633 //=============================================================================
634 //------------------------------Identity---------------------------------------
635 Node *LShiftINode::Identity( PhaseTransform *phase ) {
636 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
637 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
638 }
639
640 //------------------------------Ideal------------------------------------------
641 // If the right input is a constant, and the left input is an add of a
642 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
643 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
644 const Type *t = phase->type( in(2) );
645 if( t == Type::TOP ) return NULL; // Right input is dead
646 const TypeInt *t2 = t->isa_int();
647 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
648 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
649
650 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
651
652 // Left input is an add of a constant?
653 Node *add1 = in(1);
654 int add1_op = add1->Opcode();
655 if( add1_op == Op_AddI ) { // Left input is an add?
656 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
657 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
658 if( t12 && t12->is_con() ){ // Left input is an add of a con?
659 // Transform is legal, but check for profit. Avoid breaking 'i2s'
660 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
661 if( con < 16 ) {
662 // Compute X << con0
663 Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
664 // Compute X<<con0 + (con1<<con0)
665 return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
666 }
667 }
668 }
669
670 // Check for "(x>>c0)<<c0" which just masks off low bits
671 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
672 add1->in(2) == in(2) )
673 // Convert to "(x & -(1<<c0))"
674 return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
675
676 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
677 if( add1_op == Op_AndI ) {
678 Node *add2 = add1->in(1);
679 int add2_op = add2->Opcode();
680 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
681 add2->in(2) == in(2) ) {
682 // Convert to "(x & (Y<<c0))"
683 Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
684 return new (phase->C) AndINode( add2->in(1), y_sh );
685 }
686 }
687
688 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
689 // before shifting them away.
690 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
691 if( add1_op == Op_AndI &&
692 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
693 return new (phase->C) LShiftINode( add1->in(1), in(2) );
694
695 return NULL;
696 }
697
698 //------------------------------Value------------------------------------------
699 // A LShiftINode shifts its input2 left by input1 amount.
700 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
701 const Type *t1 = phase->type( in(1) );
702 const Type *t2 = phase->type( in(2) );
703 // Either input is TOP ==> the result is TOP
704 if( t1 == Type::TOP ) return Type::TOP;
705 if( t2 == Type::TOP ) return Type::TOP;
706
707 // Left input is ZERO ==> the result is ZERO.
708 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
709 // Shift by zero does nothing
710 if( t2 == TypeInt::ZERO ) return t1;
711
712 // Either input is BOTTOM ==> the result is BOTTOM
713 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
714 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
715 return TypeInt::INT;
716
717 const TypeInt *r1 = t1->is_int(); // Handy access
718 const TypeInt *r2 = t2->is_int(); // Handy access
719
720 if (!r2->is_con())
721 return TypeInt::INT;
722
723 uint shift = r2->get_con();
724 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
725 // Shift by a multiple of 32 does nothing:
726 if (shift == 0) return t1;
727
728 // If the shift is a constant, shift the bounds of the type,
729 // unless this could lead to an overflow.
730 if (!r1->is_con()) {
731 jint lo = r1->_lo, hi = r1->_hi;
732 if (((lo << shift) >> shift) == lo &&
733 ((hi << shift) >> shift) == hi) {
734 // No overflow. The range shifts up cleanly.
735 return TypeInt::make((jint)lo << (jint)shift,
736 (jint)hi << (jint)shift,
737 MAX2(r1->_widen,r2->_widen));
738 }
739 return TypeInt::INT;
740 }
741
742 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
743 }
744
745 //=============================================================================
746 //------------------------------Identity---------------------------------------
747 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
748 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
749 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
750 }
751
752 //------------------------------Ideal------------------------------------------
753 // If the right input is a constant, and the left input is an add of a
754 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
755 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
756 const Type *t = phase->type( in(2) );
757 if( t == Type::TOP ) return NULL; // Right input is dead
758 const TypeInt *t2 = t->isa_int();
759 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
760 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
761
762 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
763
764 // Left input is an add of a constant?
765 Node *add1 = in(1);
766 int add1_op = add1->Opcode();
767 if( add1_op == Op_AddL ) { // Left input is an add?
768 // Avoid dead data cycles from dead loops
769 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
770 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
771 if( t12 && t12->is_con() ){ // Left input is an add of a con?
772 // Compute X << con0
773 Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
774 // Compute X<<con0 + (con1<<con0)
775 return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
776 }
777 }
778
779 // Check for "(x>>c0)<<c0" which just masks off low bits
780 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
781 add1->in(2) == in(2) )
782 // Convert to "(x & -(1<<c0))"
783 return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
784
785 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
786 if( add1_op == Op_AndL ) {
787 Node *add2 = add1->in(1);
788 int add2_op = add2->Opcode();
789 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
790 add2->in(2) == in(2) ) {
791 // Convert to "(x & (Y<<c0))"
792 Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
793 return new (phase->C) AndLNode( add2->in(1), y_sh );
794 }
795 }
796
797 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
798 // before shifting them away.
799 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
800 if( add1_op == Op_AndL &&
801 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
802 return new (phase->C) LShiftLNode( add1->in(1), in(2) );
803
804 return NULL;
805 }
806
807 //------------------------------Value------------------------------------------
808 // A LShiftLNode shifts its input2 left by input1 amount.
809 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
810 const Type *t1 = phase->type( in(1) );
811 const Type *t2 = phase->type( in(2) );
812 // Either input is TOP ==> the result is TOP
813 if( t1 == Type::TOP ) return Type::TOP;
814 if( t2 == Type::TOP ) return Type::TOP;
815
816 // Left input is ZERO ==> the result is ZERO.
817 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
818 // Shift by zero does nothing
819 if( t2 == TypeInt::ZERO ) return t1;
820
821 // Either input is BOTTOM ==> the result is BOTTOM
822 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
823 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
824 return TypeLong::LONG;
825
826 const TypeLong *r1 = t1->is_long(); // Handy access
827 const TypeInt *r2 = t2->is_int(); // Handy access
828
829 if (!r2->is_con())
830 return TypeLong::LONG;
831
832 uint shift = r2->get_con();
833 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
834 // Shift by a multiple of 64 does nothing:
835 if (shift == 0) return t1;
836
837 // If the shift is a constant, shift the bounds of the type,
838 // unless this could lead to an overflow.
839 if (!r1->is_con()) {
840 jlong lo = r1->_lo, hi = r1->_hi;
841 if (((lo << shift) >> shift) == lo &&
842 ((hi << shift) >> shift) == hi) {
843 // No overflow. The range shifts up cleanly.
844 return TypeLong::make((jlong)lo << (jint)shift,
845 (jlong)hi << (jint)shift,
846 MAX2(r1->_widen,r2->_widen));
847 }
848 return TypeLong::LONG;
849 }
850
851 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
852 }
853
854 //=============================================================================
855 //------------------------------Identity---------------------------------------
856 Node *RShiftINode::Identity( PhaseTransform *phase ) {
857 const TypeInt *t2 = phase->type(in(2))->isa_int();
858 if( !t2 ) return this;
859 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
860 return in(1);
861
862 // Check for useless sign-masking
863 if( in(1)->Opcode() == Op_LShiftI &&
864 in(1)->req() == 3 &&
865 in(1)->in(2) == in(2) &&
866 t2->is_con() ) {
867 uint shift = t2->get_con();
868 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
869 // Compute masks for which this shifting doesn't change
870 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
871 int hi = ~lo; // 00007FFF
872 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
873 if( !t11 ) return this;
874 // Does actual value fit inside of mask?
875 if( lo <= t11->_lo && t11->_hi <= hi )
876 return in(1)->in(1); // Then shifting is a nop
877 }
878
879 return this;
880 }
881
882 //------------------------------Ideal------------------------------------------
883 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
884 // Inputs may be TOP if they are dead.
885 const TypeInt *t1 = phase->type( in(1) )->isa_int();
886 if( !t1 ) return NULL; // Left input is an integer
887 const TypeInt *t2 = phase->type( in(2) )->isa_int();
888 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
889 const TypeInt *t3; // type of in(1).in(2)
890 int shift = t2->get_con();
891 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
892
893 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
894
895 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
896 // Such expressions arise normally from shift chains like (byte)(x >> 24).
897 const Node *mask = in(1);
898 if( mask->Opcode() == Op_AndI &&
899 (t3 = phase->type(mask->in(2))->isa_int()) &&
900 t3->is_con() ) {
901 Node *x = mask->in(1);
902 jint maskbits = t3->get_con();
903 // Convert to "(x >> shift) & (mask >> shift)"
904 Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
905 return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
906 }
907
908 // Check for "(short[i] <<16)>>16" which simply sign-extends
909 const Node *shl = in(1);
910 if( shl->Opcode() != Op_LShiftI ) return NULL;
911
912 if( shift == 16 &&
913 (t3 = phase->type(shl->in(2))->isa_int()) &&
914 t3->is_con(16) ) {
915 Node *ld = shl->in(1);
916 if( ld->Opcode() == Op_LoadS ) {
917 // Sign extension is just useless here. Return a RShiftI of zero instead
918 // returning 'ld' directly. We cannot return an old Node directly as
919 // that is the job of 'Identity' calls and Identity calls only work on
920 // direct inputs ('ld' is an extra Node removed from 'this'). The
921 // combined optimization requires Identity only return direct inputs.
922 set_req(1, ld);
923 set_req(2, phase->intcon(0));
924 return this;
925 }
926 else if( ld->Opcode() == Op_LoadUS )
927 // Replace zero-extension-load with sign-extension-load
928 return new (phase->C) LoadSNode( ld->in(MemNode::Control),
929 ld->in(MemNode::Memory),
930 ld->in(MemNode::Address),
931 ld->adr_type());
932 }
933
934 // Check for "(byte[i] <<24)>>24" which simply sign-extends
935 if( shift == 24 &&
936 (t3 = phase->type(shl->in(2))->isa_int()) &&
937 t3->is_con(24) ) {
938 Node *ld = shl->in(1);
939 if( ld->Opcode() == Op_LoadB ) {
940 // Sign extension is just useless here
941 set_req(1, ld);
942 set_req(2, phase->intcon(0));
943 return this;
944 }
945 }
946
947 return NULL;
948 }
949
950 //------------------------------Value------------------------------------------
951 // A RShiftINode shifts its input2 right by input1 amount.
952 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
953 const Type *t1 = phase->type( in(1) );
954 const Type *t2 = phase->type( in(2) );
955 // Either input is TOP ==> the result is TOP
956 if( t1 == Type::TOP ) return Type::TOP;
957 if( t2 == Type::TOP ) return Type::TOP;
958
959 // Left input is ZERO ==> the result is ZERO.
960 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
961 // Shift by zero does nothing
962 if( t2 == TypeInt::ZERO ) return t1;
963
964 // Either input is BOTTOM ==> the result is BOTTOM
965 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
966 return TypeInt::INT;
967
968 if (t2 == TypeInt::INT)
969 return TypeInt::INT;
970
971 const TypeInt *r1 = t1->is_int(); // Handy access
972 const TypeInt *r2 = t2->is_int(); // Handy access
973
974 // If the shift is a constant, just shift the bounds of the type.
975 // For example, if the shift is 31, we just propagate sign bits.
976 if (r2->is_con()) {
977 uint shift = r2->get_con();
978 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
979 // Shift by a multiple of 32 does nothing:
980 if (shift == 0) return t1;
981 // Calculate reasonably aggressive bounds for the result.
982 // This is necessary if we are to correctly type things
983 // like (x<<24>>24) == ((byte)x).
984 jint lo = (jint)r1->_lo >> (jint)shift;
985 jint hi = (jint)r1->_hi >> (jint)shift;
986 assert(lo <= hi, "must have valid bounds");
987 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
988 #ifdef ASSERT
989 // Make sure we get the sign-capture idiom correct.
990 if (shift == BitsPerJavaInteger-1) {
991 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
992 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
993 }
994 #endif
995 return ti;
996 }
997
998 if( !r1->is_con() || !r2->is_con() )
999 return TypeInt::INT;
1000
1001 // Signed shift right
1002 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1003 }
1004
1005 //=============================================================================
1006 //------------------------------Identity---------------------------------------
1007 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1008 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1009 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1010 }
1011
1012 //------------------------------Value------------------------------------------
1013 // A RShiftLNode shifts its input2 right by input1 amount.
1014 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1015 const Type *t1 = phase->type( in(1) );
1016 const Type *t2 = phase->type( in(2) );
1017 // Either input is TOP ==> the result is TOP
1018 if( t1 == Type::TOP ) return Type::TOP;
1019 if( t2 == Type::TOP ) return Type::TOP;
1020
1021 // Left input is ZERO ==> the result is ZERO.
1022 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1023 // Shift by zero does nothing
1024 if( t2 == TypeInt::ZERO ) return t1;
1025
1026 // Either input is BOTTOM ==> the result is BOTTOM
1027 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1028 return TypeLong::LONG;
1029
1030 if (t2 == TypeInt::INT)
1031 return TypeLong::LONG;
1032
1033 const TypeLong *r1 = t1->is_long(); // Handy access
1034 const TypeInt *r2 = t2->is_int (); // Handy access
1035
1036 // If the shift is a constant, just shift the bounds of the type.
1037 // For example, if the shift is 63, we just propagate sign bits.
1038 if (r2->is_con()) {
1039 uint shift = r2->get_con();
1040 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1041 // Shift by a multiple of 64 does nothing:
1042 if (shift == 0) return t1;
1043 // Calculate reasonably aggressive bounds for the result.
1044 // This is necessary if we are to correctly type things
1045 // like (x<<24>>24) == ((byte)x).
1046 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1047 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1048 assert(lo <= hi, "must have valid bounds");
1049 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1050 #ifdef ASSERT
1051 // Make sure we get the sign-capture idiom correct.
1052 if (shift == (2*BitsPerJavaInteger)-1) {
1053 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1054 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1055 }
1056 #endif
1057 return tl;
1058 }
1059
1060 return TypeLong::LONG; // Give up
1061 }
1062
1063 //=============================================================================
1064 //------------------------------Identity---------------------------------------
1065 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1066 const TypeInt *ti = phase->type( in(2) )->isa_int();
1067 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1068
1069 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1070 // Happens during new-array length computation.
1071 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1072 Node *add = in(1);
1073 if( add->Opcode() == Op_AddI ) {
1074 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1075 if( t2 && t2->is_con(wordSize - 1) &&
1076 add->in(1)->Opcode() == Op_LShiftI ) {
1077 // Check that shift_counts are LogBytesPerWord
1078 Node *lshift_count = add->in(1)->in(2);
1079 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1080 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1081 t_lshift_count == phase->type(in(2)) ) {
1082 Node *x = add->in(1)->in(1);
1083 const TypeInt *t_x = phase->type(x)->isa_int();
1084 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1085 return x;
1086 }
1087 }
1088 }
1089 }
1090
1091 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1092 }
1093
1094 //------------------------------Ideal------------------------------------------
1095 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1096 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1097 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1098 const int con = t2->get_con() & 31; // Shift count is always masked
1099 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1100 // We'll be wanting the right-shift amount as a mask of that many bits
1101 const int mask = right_n_bits(BitsPerJavaInteger - con);
1102
1103 int in1_op = in(1)->Opcode();
1104
1105 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1106 if( in1_op == Op_URShiftI ) {
1107 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1108 if( t12 && t12->is_con() ) { // Right input is a constant
1109 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1110 const int con2 = t12->get_con() & 31; // Shift count is always masked
1111 const int con3 = con+con2;
1112 if( con3 < 32 ) // Only merge shifts if total is < 32
1113 return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1114 }
1115 }
1116
1117 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1118 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1119 // If Q is "X << z" the rounding is useless. Look for patterns like
1120 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1121 Node *add = in(1);
1122 if( in1_op == Op_AddI ) {
1123 Node *lshl = add->in(1);
1124 if( lshl->Opcode() == Op_LShiftI &&
1125 phase->type(lshl->in(2)) == t2 ) {
1126 Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
1127 Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
1128 return new (phase->C) AndINode( sum, phase->intcon(mask) );
1129 }
1130 }
1131
1132 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1133 // This shortens the mask. Also, if we are extracting a high byte and
1134 // storing it to a buffer, the mask will be removed completely.
1135 Node *andi = in(1);
1136 if( in1_op == Op_AndI ) {
1137 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1138 if( t3 && t3->is_con() ) { // Right input is a constant
1139 jint mask2 = t3->get_con();
1140 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1141 Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
1142 return new (phase->C) AndINode(newshr, phase->intcon(mask2));
1143 // The negative values are easier to materialize than positive ones.
1144 // A typical case from address arithmetic is ((x & ~15) >> 4).
1145 // It's better to change that to ((x >> 4) & ~0) versus
1146 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1147 }
1148 }
1149
1150 // Check for "(X << z ) >>> z" which simply zero-extends
1151 Node *shl = in(1);
1152 if( in1_op == Op_LShiftI &&
1153 phase->type(shl->in(2)) == t2 )
1154 return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
1155
1156 return NULL;
1157 }
1158
1159 //------------------------------Value------------------------------------------
1160 // A URShiftINode shifts its input2 right by input1 amount.
1161 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1162 // (This is a near clone of RShiftINode::Value.)
1163 const Type *t1 = phase->type( in(1) );
1164 const Type *t2 = phase->type( in(2) );
1165 // Either input is TOP ==> the result is TOP
1166 if( t1 == Type::TOP ) return Type::TOP;
1167 if( t2 == Type::TOP ) return Type::TOP;
1168
1169 // Left input is ZERO ==> the result is ZERO.
1170 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1171 // Shift by zero does nothing
1172 if( t2 == TypeInt::ZERO ) return t1;
1173
1174 // Either input is BOTTOM ==> the result is BOTTOM
1175 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1176 return TypeInt::INT;
1177
1178 if (t2 == TypeInt::INT)
1179 return TypeInt::INT;
1180
1181 const TypeInt *r1 = t1->is_int(); // Handy access
1182 const TypeInt *r2 = t2->is_int(); // Handy access
1183
1184 if (r2->is_con()) {
1185 uint shift = r2->get_con();
1186 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1187 // Shift by a multiple of 32 does nothing:
1188 if (shift == 0) return t1;
1189 // Calculate reasonably aggressive bounds for the result.
1190 jint lo = (juint)r1->_lo >> (juint)shift;
1191 jint hi = (juint)r1->_hi >> (juint)shift;
1192 if (r1->_hi >= 0 && r1->_lo < 0) {
1193 // If the type has both negative and positive values,
1194 // there are two separate sub-domains to worry about:
1195 // The positive half and the negative half.
1196 jint neg_lo = lo;
1197 jint neg_hi = (juint)-1 >> (juint)shift;
1198 jint pos_lo = (juint) 0 >> (juint)shift;
1199 jint pos_hi = hi;
1200 lo = MIN2(neg_lo, pos_lo); // == 0
1201 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1202 }
1203 assert(lo <= hi, "must have valid bounds");
1204 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1205 #ifdef ASSERT
1206 // Make sure we get the sign-capture idiom correct.
1207 if (shift == BitsPerJavaInteger-1) {
1208 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1209 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1210 }
1211 #endif
1212 return ti;
1213 }
1214
1215 //
1216 // Do not support shifted oops in info for GC
1217 //
1218 // else if( t1->base() == Type::InstPtr ) {
1219 //
1220 // const TypeInstPtr *o = t1->is_instptr();
1221 // if( t1->singleton() )
1222 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1223 // }
1224 // else if( t1->base() == Type::KlassPtr ) {
1225 // const TypeKlassPtr *o = t1->is_klassptr();
1226 // if( t1->singleton() )
1227 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1228 // }
1229
1230 return TypeInt::INT;
1231 }
1232
1233 //=============================================================================
1234 //------------------------------Identity---------------------------------------
1235 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1236 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1237 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1238 }
1239
1240 //------------------------------Ideal------------------------------------------
1241 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1242 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1243 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1244 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1245 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1246 // note: mask computation below does not work for 0 shift count
1247 // We'll be wanting the right-shift amount as a mask of that many bits
1248 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
1249
1250 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1251 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1252 // If Q is "X << z" the rounding is useless. Look for patterns like
1253 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1254 Node *add = in(1);
1255 if( add->Opcode() == Op_AddL ) {
1256 Node *lshl = add->in(1);
1257 if( lshl->Opcode() == Op_LShiftL &&
1258 phase->type(lshl->in(2)) == t2 ) {
1259 Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
1260 Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
1261 return new (phase->C) AndLNode( sum, phase->longcon(mask) );
1262 }
1263 }
1264
1265 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1266 // This shortens the mask. Also, if we are extracting a high byte and
1267 // storing it to a buffer, the mask will be removed completely.
1268 Node *andi = in(1);
1269 if( andi->Opcode() == Op_AndL ) {
1270 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1271 if( t3 && t3->is_con() ) { // Right input is a constant
1272 jlong mask2 = t3->get_con();
1273 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1274 Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
1275 return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
1276 }
1277 }
1278
1279 // Check for "(X << z ) >>> z" which simply zero-extends
1280 Node *shl = in(1);
1281 if( shl->Opcode() == Op_LShiftL &&
1282 phase->type(shl->in(2)) == t2 )
1283 return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
1284
1285 return NULL;
1286 }
1287
1288 //------------------------------Value------------------------------------------
1289 // A URShiftINode shifts its input2 right by input1 amount.
1290 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1291 // (This is a near clone of RShiftLNode::Value.)
1292 const Type *t1 = phase->type( in(1) );
1293 const Type *t2 = phase->type( in(2) );
1294 // Either input is TOP ==> the result is TOP
1295 if( t1 == Type::TOP ) return Type::TOP;
1296 if( t2 == Type::TOP ) return Type::TOP;
1297
1298 // Left input is ZERO ==> the result is ZERO.
1299 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1300 // Shift by zero does nothing
1301 if( t2 == TypeInt::ZERO ) return t1;
1302
1303 // Either input is BOTTOM ==> the result is BOTTOM
1304 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1305 return TypeLong::LONG;
1306
1307 if (t2 == TypeInt::INT)
1308 return TypeLong::LONG;
1309
1310 const TypeLong *r1 = t1->is_long(); // Handy access
1311 const TypeInt *r2 = t2->is_int (); // Handy access
1312
1313 if (r2->is_con()) {
1314 uint shift = r2->get_con();
1315 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1316 // Shift by a multiple of 64 does nothing:
1317 if (shift == 0) return t1;
1318 // Calculate reasonably aggressive bounds for the result.
1319 jlong lo = (julong)r1->_lo >> (juint)shift;
1320 jlong hi = (julong)r1->_hi >> (juint)shift;
1321 if (r1->_hi >= 0 && r1->_lo < 0) {
1322 // If the type has both negative and positive values,
1323 // there are two separate sub-domains to worry about:
1324 // The positive half and the negative half.
1325 jlong neg_lo = lo;
1326 jlong neg_hi = (julong)-1 >> (juint)shift;
1327 jlong pos_lo = (julong) 0 >> (juint)shift;
1328 jlong pos_hi = hi;
1329 //lo = MIN2(neg_lo, pos_lo); // == 0
1330 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1331 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1332 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1333 }
1334 assert(lo <= hi, "must have valid bounds");
1335 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1336 #ifdef ASSERT
1337 // Make sure we get the sign-capture idiom correct.
1338 if (shift == BitsPerJavaLong - 1) {
1339 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1340 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1341 }
1342 #endif
1343 return tl;
1344 }
1345
1346 return TypeLong::LONG; // Give up
1347 }