795   // pp 141
 796 
 797   inline void fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 798   inline void fbp( Condition c, bool a, CC cc, Predict p, Label& L );
 799 
 800   // pp 144
 801 
 802   inline void br( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
 803   inline void br( Condition c, bool a, Label& L );
 804 
 805   // pp 146
 806 
 807   inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 808   inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
 809 
 810   // pp 149
 811 
 812   inline void call( address d,  relocInfo::relocType rt = relocInfo::runtime_call_type );
 813   inline void call( Label& L,   relocInfo::relocType rt = relocInfo::runtime_call_type );
 814 


 815  public:
 816 
 817   // pp 150
 818 
 819   // These instructions compare the contents of s2 with the contents of
 820   // memory at address in s1. If the values are equal, the contents of memory
 821   // at address s1 is swapped with the data in d. If the values are not equal,
 822   // the the contents of memory at s1 is loaded into d, without the swap.
 823 
 824   void casa(  Register s1, Register s2, Register d, int ia = -1 ) { v9_only();  emit_int32( op(ldst_op) | rd(d) | op3(casa_op3 ) | rs1(s1) | (ia == -1  ? immed(true) : imm_asi(ia)) | rs2(s2)); }
 825   void casxa( Register s1, Register s2, Register d, int ia = -1 ) { v9_only();  emit_int32( op(ldst_op) | rd(d) | op3(casxa_op3) | rs1(s1) | (ia == -1  ? immed(true) : imm_asi(ia)) | rs2(s2)); }
 826 
 827   // pp 152
 828 
 829   void udiv(   Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3             ) | rs1(s1) | rs2(s2)); }
 830   void udiv(   Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3             ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
 831   void sdiv(   Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(sdiv_op3             ) | rs1(s1) | rs2(s2)); }
 832   void sdiv(   Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(sdiv_op3             ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
 833   void udivcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3 | cc_bit_op3) | rs1(s1) | rs2(s2)); }
 834   void udivcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }

 795   // pp 141
 796 
 797   inline void fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 798   inline void fbp( Condition c, bool a, CC cc, Predict p, Label& L );
 799 
 800   // pp 144
 801 
 802   inline void br( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
 803   inline void br( Condition c, bool a, Label& L );
 804 
 805   // pp 146
 806 
 807   inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 808   inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
 809 
 810   // pp 149
 811 
 812   inline void call( address d,  relocInfo::relocType rt = relocInfo::runtime_call_type );
 813   inline void call( Label& L,   relocInfo::relocType rt = relocInfo::runtime_call_type );
 814 
 815   inline void call( address d,  RelocationHolder const& rspec );
 816 
 817  public:
 818 
 819   // pp 150
 820 
 821   // These instructions compare the contents of s2 with the contents of
 822   // memory at address in s1. If the values are equal, the contents of memory
 823   // at address s1 is swapped with the data in d. If the values are not equal,
 824   // the the contents of memory at s1 is loaded into d, without the swap.
 825 
 826   void casa(  Register s1, Register s2, Register d, int ia = -1 ) { v9_only();  emit_int32( op(ldst_op) | rd(d) | op3(casa_op3 ) | rs1(s1) | (ia == -1  ? immed(true) : imm_asi(ia)) | rs2(s2)); }
 827   void casxa( Register s1, Register s2, Register d, int ia = -1 ) { v9_only();  emit_int32( op(ldst_op) | rd(d) | op3(casxa_op3) | rs1(s1) | (ia == -1  ? immed(true) : imm_asi(ia)) | rs2(s2)); }
 828 
 829   // pp 152
 830 
 831   void udiv(   Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3             ) | rs1(s1) | rs2(s2)); }
 832   void udiv(   Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3             ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
 833   void sdiv(   Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(sdiv_op3             ) | rs1(s1) | rs2(s2)); }
 834   void sdiv(   Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(sdiv_op3             ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
 835   void udivcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3 | cc_bit_op3) | rs1(s1) | rs2(s2)); }
 836   void udivcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(udiv_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }