1 /*
   2  * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/cardTableModRefBS.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_arm.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 void LIRItem::load_byte_item() {
  48   load_item();
  49 }
  50 
  51 void LIRItem::load_nonconstant() {
  52   LIR_Opr r = value()->operand();
  53   if (_gen->can_inline_as_constant(value())) {
  54     if (!r->is_constant()) {
  55       r = LIR_OprFact::value_type(value()->type());
  56     }
  57     _result = r;
  58   } else {
  59     load_item();
  60   }
  61 }
  62 
  63 //--------------------------------------------------------------
  64 //               LIRGenerator
  65 //--------------------------------------------------------------
  66 
  67 
  68 LIR_Opr LIRGenerator::exceptionOopOpr() {
  69   return FrameMap::Exception_oop_opr;
  70 }
  71 
  72 LIR_Opr LIRGenerator::exceptionPcOpr()  {
  73   return FrameMap::Exception_pc_opr;
  74 }
  75 
  76 LIR_Opr LIRGenerator::syncLockOpr()     {
  77   return new_register(T_INT);
  78 }
  79 
  80 LIR_Opr LIRGenerator::syncTempOpr()     {
  81   return new_register(T_OBJECT);
  82 }
  83 
  84 LIR_Opr LIRGenerator::getThreadTemp()   {
  85   return LIR_OprFact::illegalOpr;
  86 }
  87 
  88 LIR_Opr LIRGenerator::atomicLockOpr() {
  89   return LIR_OprFact::illegalOpr;
  90 }
  91 
  92 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  93   LIR_Opr opr;
  94   switch (type->tag()) {
  95     case intTag:     opr = FrameMap::Int_result_opr;    break;
  96     case objectTag:  opr = FrameMap::Object_result_opr; break;
  97     case longTag:    opr = FrameMap::Long_result_opr;   break;
  98     case floatTag:   opr = FrameMap::Float_result_opr;  break;
  99     case doubleTag:  opr = FrameMap::Double_result_opr; break;
 100     case addressTag:
 101     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 102   }
 103   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 104   return opr;
 105 }
 106 
 107 
 108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 109   return new_register(T_INT);
 110 }
 111 
 112 
 113 //--------- loading items into registers --------------------------------
 114 
 115 
 116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 117 #ifdef AARCH64
 118   if (v->type()->as_IntConstant() != NULL) {
 119     return v->type()->as_IntConstant()->value() == 0;
 120   } else if (v->type()->as_LongConstant() != NULL) {
 121     return v->type()->as_LongConstant()->value() == 0;
 122   } else if (v->type()->as_ObjectConstant() != NULL) {
 123     return v->type()->as_ObjectConstant()->value()->is_null_object();
 124   } else if (v->type()->as_FloatConstant() != NULL) {
 125     return jint_cast(v->type()->as_FloatConstant()->value()) == 0;
 126   } else if (v->type()->as_DoubleConstant() != NULL) {
 127     return jlong_cast(v->type()->as_DoubleConstant()->value()) == 0;
 128   }
 129 #endif // AARCH64
 130   return false;
 131 }
 132 
 133 
 134 bool LIRGenerator::can_inline_as_constant(Value v) const {
 135   if (v->type()->as_IntConstant() != NULL) {
 136     return Assembler::is_arith_imm_in_range(v->type()->as_IntConstant()->value());
 137   } else if (v->type()->as_ObjectConstant() != NULL) {
 138     return v->type()->as_ObjectConstant()->value()->is_null_object();
 139 #ifdef AARCH64
 140   } else if (v->type()->as_LongConstant() != NULL) {
 141     return Assembler::is_arith_imm_in_range(v->type()->as_LongConstant()->value());
 142 #else
 143   } else if (v->type()->as_FloatConstant() != NULL) {
 144     return v->type()->as_FloatConstant()->value() == 0.0f;
 145   } else if (v->type()->as_DoubleConstant() != NULL) {
 146     return v->type()->as_DoubleConstant()->value() == 0.0;
 147 #endif // AARCH64
 148   }
 149   return false;
 150 }
 151 
 152 
 153 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 154   ShouldNotCallThis(); // Not used on ARM
 155   return false;
 156 }
 157 
 158 
 159 #ifdef AARCH64
 160 
 161 static bool can_inline_as_constant_in_cmp(Value v) {
 162   jlong constant;
 163   if (v->type()->as_IntConstant() != NULL) {
 164     constant = v->type()->as_IntConstant()->value();
 165   } else if (v->type()->as_LongConstant() != NULL) {
 166     constant = v->type()->as_LongConstant()->value();
 167   } else if (v->type()->as_ObjectConstant() != NULL) {
 168     return v->type()->as_ObjectConstant()->value()->is_null_object();
 169   } else if (v->type()->as_FloatConstant() != NULL) {
 170     return v->type()->as_FloatConstant()->value() == 0.0f;
 171   } else if (v->type()->as_DoubleConstant() != NULL) {
 172     return v->type()->as_DoubleConstant()->value() == 0.0;
 173   } else {
 174     return false;
 175   }
 176 
 177   return Assembler::is_arith_imm_in_range(constant) || Assembler::is_arith_imm_in_range(-constant);
 178 }
 179 
 180 
 181 static bool can_inline_as_constant_in_logic(Value v) {
 182   if (v->type()->as_IntConstant() != NULL) {
 183     return Assembler::LogicalImmediate(v->type()->as_IntConstant()->value(), true).is_encoded();
 184   } else if (v->type()->as_LongConstant() != NULL) {
 185     return Assembler::LogicalImmediate(v->type()->as_LongConstant()->value(), false).is_encoded();
 186   }
 187   return false;
 188 }
 189 
 190 
 191 #endif // AARCH64
 192 
 193 
 194 LIR_Opr LIRGenerator::safepoint_poll_register() {
 195   return LIR_OprFact::illegalOpr;
 196 }
 197 
 198 
 199 static LIR_Opr make_constant(BasicType type, jlong c) {
 200   switch (type) {
 201     case T_ADDRESS:
 202     case T_OBJECT:  return LIR_OprFact::intptrConst(c);
 203     case T_LONG:    return LIR_OprFact::longConst(c);
 204     case T_INT:     return LIR_OprFact::intConst(c);
 205     default: ShouldNotReachHere();
 206     return LIR_OprFact::intConst(-1);
 207   }
 208 }
 209 
 210 #ifdef AARCH64
 211 
 212 void LIRGenerator::add_constant(LIR_Opr src, jlong c, LIR_Opr dest) {
 213   if (c == 0) {
 214     __ move(src, dest);
 215     return;
 216   }
 217 
 218   BasicType type = src->type();
 219   bool is_neg = (c < 0);
 220   c = ABS(c);
 221 
 222   if ((c >> 24) == 0) {
 223     for (int shift = 0; shift <= 12; shift += 12) {
 224       int part = ((int)c) & (right_n_bits(12) << shift);
 225       if (part != 0) {
 226         if (is_neg) {
 227           __ sub(src, make_constant(type, part), dest);
 228         } else {
 229           __ add(src, make_constant(type, part), dest);
 230         }
 231         src = dest;
 232       }
 233     }
 234   } else {
 235     __ move(make_constant(type, c), dest);
 236     if (is_neg) {
 237       __ sub(src, dest, dest);
 238     } else {
 239       __ add(src, dest, dest);
 240     }
 241   }
 242 }
 243 
 244 #endif // AARCH64
 245 
 246 
 247 void LIRGenerator::add_large_constant(LIR_Opr src, int c, LIR_Opr dest) {
 248   assert(c != 0, "must be");
 249 #ifdef AARCH64
 250   add_constant(src, c, dest);
 251 #else
 252   // Find first non-zero bit
 253   int shift = 0;
 254   while ((c & (3 << shift)) == 0) {
 255     shift += 2;
 256   }
 257   // Add the least significant part of the constant
 258   int mask = 0xff << shift;
 259   __ add(src, LIR_OprFact::intConst(c & mask), dest);
 260   // Add up to 3 other parts of the constant;
 261   // each of them can be represented as rotated_imm
 262   if (c & (mask << 8)) {
 263     __ add(dest, LIR_OprFact::intConst(c & (mask << 8)), dest);
 264   }
 265   if (c & (mask << 16)) {
 266     __ add(dest, LIR_OprFact::intConst(c & (mask << 16)), dest);
 267   }
 268   if (c & (mask << 24)) {
 269     __ add(dest, LIR_OprFact::intConst(c & (mask << 24)), dest);
 270   }
 271 #endif // AARCH64
 272 }
 273 
 274 static LIR_Address* make_address(LIR_Opr base, LIR_Opr index, LIR_Address::Scale scale, BasicType type) {
 275   return new LIR_Address(base, index, scale, 0, type);
 276 }
 277 
 278 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 279                                             int shift, int disp, BasicType type) {
 280   assert(base->is_register(), "must be");
 281 
 282   if (index->is_constant()) {
 283     disp += index->as_constant_ptr()->as_jint() << shift;
 284     index = LIR_OprFact::illegalOpr;
 285   }
 286 
 287 #ifndef AARCH64
 288   if (base->type() == T_LONG) {
 289     LIR_Opr tmp = new_register(T_INT);
 290     __ convert(Bytecodes::_l2i, base, tmp);
 291     base = tmp;
 292   }
 293   if (index != LIR_OprFact::illegalOpr && index->type() == T_LONG) {
 294     LIR_Opr tmp = new_register(T_INT);
 295     __ convert(Bytecodes::_l2i, index, tmp);
 296     index = tmp;
 297   }
 298   // At this point base and index should be all ints and not constants
 299   assert(base->is_single_cpu() && !base->is_constant(), "base should be an non-constant int");
 300   assert(index->is_illegal() || (index->type() == T_INT && !index->is_constant()), "index should be an non-constant int");
 301 #endif
 302 
 303   int max_disp;
 304   bool disp_is_in_range;
 305   bool embedded_shift;
 306 
 307 #ifdef AARCH64
 308   int align = exact_log2(type2aelembytes(type, true));
 309   assert((disp & right_n_bits(align)) == 0, "displacement is not aligned");
 310   assert(shift == 0 || shift == align, "shift should be zero or equal to embedded align");
 311   max_disp = (1 << 12) << align;
 312 
 313   if (disp >= 0) {
 314     disp_is_in_range = Assembler::is_unsigned_imm_in_range(disp, 12, align);
 315   } else {
 316     disp_is_in_range = Assembler::is_imm_in_range(disp, 9, 0);
 317   }
 318 
 319   embedded_shift = true;
 320 #else
 321   switch (type) {
 322     case T_BYTE:
 323     case T_SHORT:
 324     case T_CHAR:
 325       max_disp = 256;          // ldrh, ldrsb encoding has 8-bit offset
 326       embedded_shift = false;
 327       break;
 328     case T_FLOAT:
 329     case T_DOUBLE:
 330       max_disp = 1024;         // flds, fldd have 8-bit offset multiplied by 4
 331       embedded_shift = false;
 332       break;
 333     case T_LONG:
 334       max_disp = 4096;
 335       embedded_shift = false;
 336       break;
 337     default:
 338       max_disp = 4096;         // ldr, ldrb allow 12-bit offset
 339       embedded_shift = true;
 340   }
 341 
 342   disp_is_in_range = (-max_disp < disp && disp < max_disp);
 343 #endif // !AARCH64
 344 
 345   if (index->is_register()) {
 346     LIR_Opr tmp = new_pointer_register();
 347     if (!disp_is_in_range) {
 348       add_large_constant(base, disp, tmp);
 349       base = tmp;
 350       disp = 0;
 351     }
 352     LIR_Address* addr = make_address(base, index, (LIR_Address::Scale)shift, type);
 353     if (disp == 0 && embedded_shift) {
 354       // can use ldr/str instruction with register index
 355       return addr;
 356     } else {
 357       LIR_Opr tmp = new_pointer_register();
 358       __ add(base, LIR_OprFact::address(addr), tmp); // add with shifted/extended register
 359       return new LIR_Address(tmp, disp, type);
 360     }
 361   }
 362 
 363   // If the displacement is too large to be inlined into LDR instruction,
 364   // generate large constant with additional sequence of ADD instructions
 365   int excess_disp = disp & ~(max_disp - 1);
 366   if (excess_disp != 0) {
 367     LIR_Opr tmp = new_pointer_register();
 368     add_large_constant(base, excess_disp, tmp);
 369     base = tmp;
 370   }
 371   return new LIR_Address(base, disp & (max_disp - 1), type);
 372 }
 373 
 374 
 375 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 376                                               BasicType type, bool needs_card_mark) {
 377   int base_offset = arrayOopDesc::base_offset_in_bytes(type);
 378   int elem_size = type2aelembytes(type);
 379 
 380   if (index_opr->is_constant()) {
 381     int offset = base_offset + index_opr->as_constant_ptr()->as_jint() * elem_size;
 382     if (needs_card_mark) {
 383       LIR_Opr base_opr = new_pointer_register();
 384       add_large_constant(array_opr, offset, base_opr);
 385       return new LIR_Address(base_opr, (intx)0, type);
 386     } else {
 387       return generate_address(array_opr, offset, type);
 388     }
 389   } else {
 390     assert(index_opr->is_register(), "must be");
 391     int scale = exact_log2(elem_size);
 392     if (needs_card_mark) {
 393       LIR_Opr base_opr = new_pointer_register();
 394       LIR_Address* addr = make_address(base_opr, index_opr, (LIR_Address::Scale)scale, type);
 395       __ add(array_opr, LIR_OprFact::intptrConst(base_offset), base_opr);
 396       __ add(base_opr, LIR_OprFact::address(addr), base_opr); // add with shifted/extended register
 397       return new LIR_Address(base_opr, type);
 398     } else {
 399       return generate_address(array_opr, index_opr, scale, base_offset, type);
 400     }
 401   }
 402 }
 403 
 404 
 405 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 406   assert(type == T_LONG || type == T_INT, "should be");
 407   LIR_Opr r = make_constant(type, x);
 408 #ifdef AARCH64
 409   bool imm_in_range = Assembler::LogicalImmediate(x, type == T_INT).is_encoded();
 410 #else
 411   bool imm_in_range = AsmOperand::is_rotated_imm(x);
 412 #endif // AARCH64
 413   if (!imm_in_range) {
 414     LIR_Opr tmp = new_register(type);
 415     __ move(r, tmp);
 416     return tmp;
 417   }
 418   return r;
 419 }
 420 
 421 
 422 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 423   LIR_Opr pointer = new_pointer_register();
 424   __ move(LIR_OprFact::intptrConst(counter), pointer);
 425   LIR_Address* addr = new LIR_Address(pointer, type);
 426   increment_counter(addr, step);
 427 }
 428 
 429 
 430 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 431   LIR_Opr temp = new_register(addr->type());
 432   __ move(addr, temp);
 433   __ add(temp, make_constant(addr->type(), step), temp);
 434   __ move(temp, addr);
 435 }
 436 
 437 
 438 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 439   __ load(new LIR_Address(base, disp, T_INT), FrameMap::LR_opr, info);
 440   __ cmp(condition, FrameMap::LR_opr, c);
 441 }
 442 
 443 
 444 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 445   __ load(new LIR_Address(base, disp, type), FrameMap::LR_opr, info);
 446   __ cmp(condition, reg, FrameMap::LR_opr);
 447 }
 448 
 449 
 450 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 451   assert(left != result, "should be different registers");
 452   if (is_power_of_2(c + 1)) {
 453 #ifdef AARCH64
 454     __ shift_left(left, log2_intptr(c + 1), result);
 455     __ sub(result, left, result);
 456 #else
 457     LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c + 1);
 458     LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);
 459     __ sub(LIR_OprFact::address(addr), left, result); // rsb with shifted register
 460 #endif // AARCH64
 461     return true;
 462   } else if (is_power_of_2(c - 1)) {
 463     LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c - 1);
 464     LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);
 465     __ add(left, LIR_OprFact::address(addr), result); // add with shifted register
 466     return true;
 467   }
 468   return false;
 469 }
 470 
 471 
 472 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
 473   assert(item->type() == T_INT, "other types are not expected");
 474   __ store(item, new LIR_Address(FrameMap::SP_opr, in_bytes(offset_from_sp), item->type()));
 475 }
 476 
 477 void LIRGenerator::set_card(LIR_Opr value, LIR_Address* card_addr) {
 478   assert(CardTableModRefBS::dirty_card_val() == 0,
 479     "Cannot use ZR register (aarch64) or the register containing the card table base address directly (aarch32) otherwise");
 480 #ifdef AARCH64
 481   // AARCH64 has a register that is constant zero. We can use that one to set the
 482   // value in the card table to dirty.
 483   __ move(FrameMap::ZR_opr, card_addr);
 484 #else // AARCH64
 485   CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
 486   if(((intx)ct->byte_map_base & 0xff) == 0) {
 487     // If the card table base address is aligned to 256 bytes, we can use the register
 488     // that contains the card_table_base_address.
 489     __ move(value, card_addr);
 490   } else {
 491     // Otherwise we need to create a register containing that value.
 492     LIR_Opr tmp_zero = new_register(T_INT);
 493     __ move(LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val()), tmp_zero);
 494     __ move(tmp_zero, card_addr);
 495   }
 496 #endif // AARCH64
 497 }
 498 
 499 void LIRGenerator::CardTableModRef_post_barrier_helper(LIR_OprDesc* addr, LIR_Const* card_table_base) {
 500   assert(addr->is_register(), "must be a register at this point");
 501 
 502   LIR_Opr tmp = FrameMap::LR_ptr_opr;
 503 
 504   // TODO-AARCH64: check performance
 505   bool load_card_table_base_const = AARCH64_ONLY(false) NOT_AARCH64(VM_Version::supports_movw());
 506   if (load_card_table_base_const) {
 507     __ move((LIR_Opr)card_table_base, tmp);
 508   } else {
 509     __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
 510   }
 511 
 512 #ifdef AARCH64
 513   LIR_Address* shifted_reg_operand = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
 514   LIR_Opr tmp2 = tmp;
 515   __ add(tmp, LIR_OprFact::address(shifted_reg_operand), tmp2); // tmp2 = tmp + (addr >> CardTableModRefBS::card_shift)
 516   LIR_Address* card_addr = new LIR_Address(tmp2, T_BYTE);
 517 #else
 518   // Use unsigned type T_BOOLEAN here rather than (signed) T_BYTE since signed load
 519   // byte instruction does not support the addressing mode we need.
 520   LIR_Address* card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BOOLEAN);
 521 #endif
 522   if (UseCondCardMark) {
 523     if (UseConcMarkSweepGC) {
 524       __ membar_storeload();
 525     }
 526     LIR_Opr cur_value = new_register(T_INT);
 527     __ move(card_addr, cur_value);
 528 
 529     LabelObj* L_already_dirty = new LabelObj();
 530     __ cmp(lir_cond_equal, cur_value, LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val()));
 531     __ branch(lir_cond_equal, T_BYTE, L_already_dirty->label());
 532     set_card(tmp, card_addr);
 533     __ branch_destination(L_already_dirty->label());
 534   } else {
 535     if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
 536       __ membar_storestore();
 537     }
 538     set_card(tmp, card_addr);
 539   }
 540 }
 541 
 542 //----------------------------------------------------------------------
 543 //             visitor functions
 544 //----------------------------------------------------------------------
 545 
 546 
 547 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 548   assert(x->is_pinned(),"");
 549   bool needs_range_check = x->compute_needs_range_check();
 550   bool use_length = x->length() != NULL;
 551   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 552   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 553                                          !get_jobject_constant(x->value())->is_null_object() ||
 554                                          x->should_profile());
 555 
 556   LIRItem array(x->array(), this);
 557   LIRItem index(x->index(), this);
 558   LIRItem value(x->value(), this);
 559   LIRItem length(this);
 560 
 561   array.load_item();
 562   index.load_nonconstant();
 563 
 564   if (use_length && needs_range_check) {
 565     length.set_instruction(x->length());
 566     length.load_item();
 567   }
 568   if (needs_store_check || x->check_boolean()) {
 569     value.load_item();
 570   } else {
 571     value.load_for_store(x->elt_type());
 572   }
 573 
 574   set_no_result(x);
 575 
 576   // the CodeEmitInfo must be duplicated for each different
 577   // LIR-instruction because spilling can occur anywhere between two
 578   // instructions and so the debug information must be different
 579   CodeEmitInfo* range_check_info = state_for(x);
 580   CodeEmitInfo* null_check_info = NULL;
 581   if (x->needs_null_check()) {
 582     null_check_info = new CodeEmitInfo(range_check_info);
 583   }
 584 
 585   // emit array address setup early so it schedules better
 586   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 587 
 588   if (GenerateRangeChecks && needs_range_check) {
 589     if (use_length) {
 590       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 591       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 592     } else {
 593       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 594       // range_check also does the null check
 595       null_check_info = NULL;
 596     }
 597   }
 598 
 599   if (GenerateArrayStoreCheck && needs_store_check) {
 600     LIR_Opr tmp1 = FrameMap::R0_oop_opr;
 601     LIR_Opr tmp2 = FrameMap::R1_oop_opr;
 602     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 603     __ store_check(value.result(), array.result(), tmp1, tmp2,
 604                    LIR_OprFact::illegalOpr, store_check_info,
 605                    x->profiled_method(), x->profiled_bci());
 606   }
 607 
 608 #if INCLUDE_ALL_GCS
 609   if (obj_store) {
 610     // Needs GC write barriers.
 611     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 612                 true /* do_load */, false /* patch */, NULL);
 613   }
 614 #endif // INCLUDE_ALL_GCS
 615 
 616   LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 617   __ move(result, array_addr, null_check_info);
 618   if (obj_store) {
 619     post_barrier(LIR_OprFact::address(array_addr), value.result());
 620   }
 621 }
 622 
 623 
 624 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 625   assert(x->is_pinned(),"");
 626   LIRItem obj(x->obj(), this);
 627   obj.load_item();
 628   set_no_result(x);
 629 
 630   LIR_Opr lock = new_pointer_register();
 631   LIR_Opr hdr  = new_pointer_register();
 632 
 633   // Need a scratch register for biased locking on arm
 634   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 635   if(UseBiasedLocking) {
 636     scratch = new_pointer_register();
 637   } else {
 638     scratch = atomicLockOpr();
 639   }
 640 
 641   CodeEmitInfo* info_for_exception = NULL;
 642   if (x->needs_null_check()) {
 643     info_for_exception = state_for(x);
 644   }
 645 
 646   CodeEmitInfo* info = state_for(x, x->state(), true);
 647   monitor_enter(obj.result(), lock, hdr, scratch,
 648                 x->monitor_no(), info_for_exception, info);
 649 }
 650 
 651 
 652 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 653   assert(x->is_pinned(),"");
 654   LIRItem obj(x->obj(), this);
 655   obj.dont_load_item();
 656   set_no_result(x);
 657 
 658   LIR_Opr obj_temp = new_pointer_register();
 659   LIR_Opr lock     = new_pointer_register();
 660   LIR_Opr hdr      = new_pointer_register();
 661 
 662   monitor_exit(obj_temp, lock, hdr, atomicLockOpr(), x->monitor_no());
 663 }
 664 
 665 
 666 // _ineg, _lneg, _fneg, _dneg
 667 void LIRGenerator::do_NegateOp(NegateOp* x) {
 668 #ifdef __SOFTFP__
 669   address runtime_func = NULL;
 670   ValueTag tag = x->type()->tag();
 671   if (tag == floatTag) {
 672     runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fneg);
 673   } else if (tag == doubleTag) {
 674     runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dneg);
 675   }
 676   if (runtime_func != NULL) {
 677     set_result(x, call_runtime(x->x(), runtime_func, x->type(), NULL));
 678     return;
 679   }
 680 #endif // __SOFTFP__
 681   LIRItem value(x->x(), this);
 682   value.load_item();
 683   LIR_Opr reg = rlock_result(x);
 684   __ negate(value.result(), reg);
 685 }
 686 
 687 
 688 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 689 //      _dadd, _dmul, _dsub, _ddiv, _drem
 690 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 691   address runtime_func;
 692   switch (x->op()) {
 693     case Bytecodes::_frem:
 694       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 695       break;
 696     case Bytecodes::_drem:
 697       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 698       break;
 699 #ifdef __SOFTFP__
 700     // Call function compiled with -msoft-float.
 701 
 702       // __aeabi_XXXX_glibc: Imported code from glibc soft-fp bundle for calculation accuracy improvement. See CR 6757269.
 703 
 704     case Bytecodes::_fadd:
 705       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fadd_glibc);
 706       break;
 707     case Bytecodes::_fmul:
 708       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fmul);
 709       break;
 710     case Bytecodes::_fsub:
 711       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fsub_glibc);
 712       break;
 713     case Bytecodes::_fdiv:
 714       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fdiv);
 715       break;
 716     case Bytecodes::_dadd:
 717       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dadd_glibc);
 718       break;
 719     case Bytecodes::_dmul:
 720       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dmul);
 721       break;
 722     case Bytecodes::_dsub:
 723       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dsub_glibc);
 724       break;
 725     case Bytecodes::_ddiv:
 726       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_ddiv);
 727       break;
 728     default:
 729       ShouldNotReachHere();
 730 #else // __SOFTFP__
 731     default: {
 732       LIRItem left(x->x(), this);
 733       LIRItem right(x->y(), this);
 734       left.load_item();
 735       right.load_item();
 736       rlock_result(x);
 737       arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
 738       return;
 739     }
 740 #endif // __SOFTFP__
 741   }
 742 
 743   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, x->type(), NULL);
 744   set_result(x, result);
 745 }
 746 
 747 
 748 void LIRGenerator::make_div_by_zero_check(LIR_Opr right_arg, BasicType type, CodeEmitInfo* info) {
 749   assert(right_arg->is_register(), "must be");
 750   __ cmp(lir_cond_equal, right_arg, make_constant(type, 0));
 751   __ branch(lir_cond_equal, type, new DivByZeroStub(info));
 752 }
 753 
 754 
 755 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 756 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 757   CodeEmitInfo* info = NULL;
 758   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
 759     info = state_for(x);
 760   }
 761 
 762 #ifdef AARCH64
 763   LIRItem left(x->x(), this);
 764   LIRItem right(x->y(), this);
 765   LIRItem* left_arg = &left;
 766   LIRItem* right_arg = &right;
 767 
 768   // Test if instr is commutative and if we should swap
 769   if (x->is_commutative() && left.is_constant()) {
 770     left_arg = &right;
 771     right_arg = &left;
 772   }
 773 
 774   left_arg->load_item();
 775   switch (x->op()) {
 776     case Bytecodes::_ldiv:
 777       right_arg->load_item();
 778       make_div_by_zero_check(right_arg->result(), T_LONG, info);
 779       __ idiv(left_arg->result(), right_arg->result(), rlock_result(x), LIR_OprFact::illegalOpr, NULL);
 780       break;
 781 
 782     case Bytecodes::_lrem: {
 783       right_arg->load_item();
 784       make_div_by_zero_check(right_arg->result(), T_LONG, info);
 785       // a % b is implemented with 2 instructions:
 786       // tmp = a/b       (sdiv)
 787       // res = a - b*tmp (msub)
 788       LIR_Opr tmp = FrameMap::as_long_opr(Rtemp);
 789       __ irem(left_arg->result(), right_arg->result(), rlock_result(x), tmp, NULL);
 790       break;
 791     }
 792 
 793     case Bytecodes::_lmul:
 794       if (right_arg->is_constant() && is_power_of_2_long(right_arg->get_jlong_constant())) {
 795         right_arg->dont_load_item();
 796         __ shift_left(left_arg->result(), exact_log2_long(right_arg->get_jlong_constant()), rlock_result(x));
 797       } else {
 798         right_arg->load_item();
 799         __ mul(left_arg->result(), right_arg->result(), rlock_result(x));
 800       }
 801       break;
 802 
 803     case Bytecodes::_ladd:
 804     case Bytecodes::_lsub:
 805       if (right_arg->is_constant()) {
 806         jlong c = right_arg->get_jlong_constant();
 807         add_constant(left_arg->result(), (x->op() == Bytecodes::_ladd) ? c : -c, rlock_result(x));
 808       } else {
 809         right_arg->load_item();
 810         arithmetic_op_long(x->op(), rlock_result(x), left_arg->result(), right_arg->result(), NULL);
 811       }
 812       break;
 813 
 814     default:
 815       ShouldNotReachHere();
 816   }
 817 #else
 818   switch (x->op()) {
 819     case Bytecodes::_ldiv:
 820     case Bytecodes::_lrem: {
 821       LIRItem right(x->y(), this);
 822       right.load_item();
 823       make_div_by_zero_check(right.result(), T_LONG, info);
 824     }
 825     // Fall through
 826     case Bytecodes::_lmul: {
 827       address entry;
 828       switch (x->op()) {
 829       case Bytecodes::_lrem:
 830         entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 831         break;
 832       case Bytecodes::_ldiv:
 833         entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 834         break;
 835       case Bytecodes::_lmul:
 836         entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 837         break;
 838       default:
 839         ShouldNotReachHere();
 840       }
 841       LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
 842       set_result(x, result);
 843       break;
 844     }
 845     case Bytecodes::_ladd:
 846     case Bytecodes::_lsub: {
 847       LIRItem left(x->x(), this);
 848       LIRItem right(x->y(), this);
 849       left.load_item();
 850       right.load_item();
 851       rlock_result(x);
 852       arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 853       break;
 854     }
 855     default:
 856       ShouldNotReachHere();
 857   }
 858 #endif // AARCH64
 859 }
 860 
 861 
 862 // for: _iadd, _imul, _isub, _idiv, _irem
 863 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 864   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 865   LIRItem left(x->x(), this);
 866   LIRItem right(x->y(), this);
 867   LIRItem* left_arg = &left;
 868   LIRItem* right_arg = &right;
 869 
 870   // Test if instr is commutative and if we should swap
 871   if (x->is_commutative() && left.is_constant()) {
 872     left_arg = &right;
 873     right_arg = &left;
 874   }
 875 
 876   if (is_div_rem) {
 877     CodeEmitInfo* info = state_for(x);
 878     if (x->op() == Bytecodes::_idiv && right_arg->is_constant() && is_power_of_2(right_arg->get_jint_constant())) {
 879       left_arg->load_item();
 880       right_arg->dont_load_item();
 881       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 882       LIR_Opr result = rlock_result(x);
 883       __ idiv(left_arg->result(), right_arg->result(), result, tmp, info);
 884     } else {
 885 #ifdef AARCH64
 886       left_arg->load_item();
 887       right_arg->load_item();
 888       make_div_by_zero_check(right_arg->result(), T_INT, info);
 889       if (x->op() == Bytecodes::_idiv) {
 890         __ idiv(left_arg->result(), right_arg->result(), rlock_result(x), LIR_OprFact::illegalOpr, NULL);
 891       } else {
 892         // a % b is implemented with 2 instructions:
 893         // tmp = a/b       (sdiv)
 894         // res = a - b*tmp (msub)
 895         LIR_Opr tmp = FrameMap::as_opr(Rtemp);
 896         __ irem(left_arg->result(), right_arg->result(), rlock_result(x), tmp, NULL);
 897       }
 898 #else
 899       left_arg->load_item_force(FrameMap::R0_opr);
 900       right_arg->load_item_force(FrameMap::R2_opr);
 901       LIR_Opr tmp = FrameMap::R1_opr;
 902       LIR_Opr result = rlock_result(x);
 903       LIR_Opr out_reg;
 904       if (x->op() == Bytecodes::_irem) {
 905         out_reg = FrameMap::R0_opr;
 906         __ irem(left_arg->result(), right_arg->result(), out_reg, tmp, info);
 907       } else if (x->op() == Bytecodes::_idiv) {
 908         out_reg = FrameMap::R1_opr;
 909         __ idiv(left_arg->result(), right_arg->result(), out_reg, tmp, info);
 910       }
 911       __ move(out_reg, result);
 912 #endif // AARCH64
 913     }
 914 
 915 #ifdef AARCH64
 916   } else if (((x->op() == Bytecodes::_iadd) || (x->op() == Bytecodes::_isub)) && right_arg->is_constant()) {
 917     left_arg->load_item();
 918     jint c = right_arg->get_jint_constant();
 919     right_arg->dont_load_item();
 920     add_constant(left_arg->result(), (x->op() == Bytecodes::_iadd) ? c : -c, rlock_result(x));
 921 #endif // AARCH64
 922 
 923   } else {
 924     left_arg->load_item();
 925     if (x->op() == Bytecodes::_imul && right_arg->is_constant()) {
 926       int c = right_arg->get_jint_constant();
 927       if (c > 0 && (is_power_of_2(c) || is_power_of_2(c - 1) || is_power_of_2(c + 1))) {
 928         right_arg->dont_load_item();
 929       } else {
 930         right_arg->load_item();
 931       }
 932     } else {
 933       AARCH64_ONLY(assert(!right_arg->is_constant(), "constant right_arg is already handled by this moment");)
 934       right_arg->load_nonconstant();
 935     }
 936     rlock_result(x);
 937     assert(right_arg->is_constant() || right_arg->is_register(), "wrong state of right");
 938     arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), NULL);
 939   }
 940 }
 941 
 942 
 943 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 944   ValueTag tag = x->type()->tag();
 945   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 946   switch (tag) {
 947     case floatTag:
 948     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 949     case longTag:    do_ArithmeticOp_Long(x); return;
 950     case intTag:     do_ArithmeticOp_Int(x);  return;
 951   }
 952   ShouldNotReachHere();
 953 }
 954 
 955 
 956 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 957 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 958   LIRItem value(x->x(), this);
 959   LIRItem count(x->y(), this);
 960 
 961 #ifndef AARCH64
 962   if (value.type()->is_long()) {
 963     count.set_destroys_register();
 964   }
 965 #endif // !AARCH64
 966 
 967   if (count.is_constant()) {
 968     assert(count.type()->as_IntConstant() != NULL, "should be");
 969     count.dont_load_item();
 970   } else {
 971     count.load_item();
 972   }
 973   value.load_item();
 974 
 975   LIR_Opr res = rlock_result(x);
 976   shift_op(x->op(), res, value.result(), count.result(), LIR_OprFact::illegalOpr);
 977 }
 978 
 979 
 980 // _iand, _land, _ior, _lor, _ixor, _lxor
 981 void LIRGenerator::do_LogicOp(LogicOp* x) {
 982   LIRItem left(x->x(), this);
 983   LIRItem right(x->y(), this);
 984 
 985   left.load_item();
 986 
 987 #ifdef AARCH64
 988   if (right.is_constant() && can_inline_as_constant_in_logic(right.value())) {
 989     right.dont_load_item();
 990   } else {
 991     right.load_item();
 992   }
 993 #else
 994   right.load_nonconstant();
 995 #endif // AARCH64
 996 
 997   logic_op(x->op(), rlock_result(x), left.result(), right.result());
 998 }
 999 
1000 
1001 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
1002 void LIRGenerator::do_CompareOp(CompareOp* x) {
1003 #ifdef __SOFTFP__
1004   address runtime_func;
1005   switch (x->op()) {
1006     case Bytecodes::_fcmpl:
1007       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fcmpl);
1008       break;
1009     case Bytecodes::_fcmpg:
1010       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fcmpg);
1011       break;
1012     case Bytecodes::_dcmpl:
1013       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcmpl);
1014       break;
1015     case Bytecodes::_dcmpg:
1016       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcmpg);
1017       break;
1018     case Bytecodes::_lcmp: {
1019         LIRItem left(x->x(), this);
1020         LIRItem right(x->y(), this);
1021         left.load_item();
1022         right.load_nonconstant();
1023         LIR_Opr reg = rlock_result(x);
1024          __ lcmp2int(left.result(), right.result(), reg);
1025         return;
1026       }
1027     default:
1028       ShouldNotReachHere();
1029   }
1030   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, x->type(), NULL);
1031   set_result(x, result);
1032 #else // __SOFTFP__
1033   LIRItem left(x->x(), this);
1034   LIRItem right(x->y(), this);
1035   left.load_item();
1036 
1037 #ifdef AARCH64
1038   if (right.is_constant() && can_inline_as_constant_in_cmp(right.value())) {
1039     right.dont_load_item();
1040   } else {
1041     right.load_item();
1042   }
1043 #else
1044   right.load_nonconstant();
1045 #endif // AARCH64
1046 
1047   LIR_Opr reg = rlock_result(x);
1048 
1049   if (x->x()->type()->is_float_kind()) {
1050     Bytecodes::Code code = x->op();
1051     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
1052   } else if (x->x()->type()->tag() == longTag) {
1053     __ lcmp2int(left.result(), right.result(), reg);
1054   } else {
1055     ShouldNotReachHere();
1056   }
1057 #endif // __SOFTFP__
1058 }
1059 
1060 
1061 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
1062   assert(x->number_of_arguments() == 4, "wrong type");
1063   LIRItem obj   (x->argument_at(0), this);  // object
1064   LIRItem offset(x->argument_at(1), this);  // offset of field
1065   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
1066   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
1067 
1068   LIR_Opr addr = new_pointer_register();
1069   LIR_Opr tmp1 = LIR_OprFact::illegalOpr;
1070   LIR_Opr tmp2 = LIR_OprFact::illegalOpr;
1071 
1072   // get address of field
1073   obj.load_item();
1074   offset.load_item();
1075   cmp.load_item();
1076   val.load_item();
1077 
1078   __ add(obj.result(), offset.result(), addr);
1079   LIR_Opr result = rlock_result(x);
1080 
1081   if (type == objectType) {
1082 #if INCLUDE_ALL_GCS
1083     // Do the pre-write barrier, if any.
1084     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
1085                 true /* do_load */, false /* patch */, NULL);
1086 #endif // INCLUDE_ALL_GCS
1087 #ifdef AARCH64
1088     if (UseCompressedOops) {
1089       tmp1 = new_pointer_register();
1090       tmp2 = new_pointer_register();
1091     }
1092 #endif // AARCH64
1093     __ cas_obj(addr, cmp.result(), val.result(), tmp1, tmp2, result);
1094     post_barrier(addr, val.result());
1095   }
1096   else if (type == intType) {
1097     __ cas_int(addr, cmp.result(), val.result(), tmp1, tmp1, result);
1098   }
1099   else if (type == longType) {
1100 #ifndef AARCH64
1101     tmp1 = new_register(T_LONG);
1102 #endif // !AARCH64
1103     __ cas_long(addr, cmp.result(), val.result(), tmp1, tmp2, result);
1104   }
1105   else {
1106     ShouldNotReachHere();
1107   }
1108 }
1109 
1110 
1111 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
1112   address runtime_func;
1113   switch (x->id()) {
1114     case vmIntrinsics::_dabs: {
1115 #ifdef __SOFTFP__
1116       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dabs);
1117       break;
1118 #else
1119       assert(x->number_of_arguments() == 1, "wrong type");
1120       LIRItem value(x->argument_at(0), this);
1121       value.load_item();
1122       __ abs(value.result(), rlock_result(x), LIR_OprFact::illegalOpr);
1123       return;
1124 #endif // __SOFTFP__
1125     }
1126     case vmIntrinsics::_dsqrt: {
1127 #ifdef __SOFTFP__
1128       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
1129       break;
1130 #else
1131       assert(x->number_of_arguments() == 1, "wrong type");
1132       LIRItem value(x->argument_at(0), this);
1133       value.load_item();
1134       __ sqrt(value.result(), rlock_result(x), LIR_OprFact::illegalOpr);
1135       return;
1136 #endif // __SOFTFP__
1137     }
1138     case vmIntrinsics::_dsin:
1139       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
1140       break;
1141     case vmIntrinsics::_dcos:
1142       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
1143       break;
1144     case vmIntrinsics::_dtan:
1145       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
1146       break;
1147     case vmIntrinsics::_dlog:
1148       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
1149       break;
1150     case vmIntrinsics::_dlog10:
1151       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
1152       break;
1153     case vmIntrinsics::_dexp:
1154       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
1155       break;
1156     case vmIntrinsics::_dpow:
1157       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
1158       break;
1159     default:
1160       ShouldNotReachHere();
1161       return;
1162   }
1163 
1164   LIR_Opr result;
1165   if (x->number_of_arguments() == 1) {
1166     result = call_runtime(x->argument_at(0), runtime_func, x->type(), NULL);
1167   } else {
1168     assert(x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow, "unexpected intrinsic");
1169     result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_func, x->type(), NULL);
1170   }
1171   set_result(x, result);
1172 }
1173 
1174 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1175   fatal("FMA intrinsic is not implemented on this platform");
1176 }
1177 
1178 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1179   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1180 }
1181 
1182 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1183   CodeEmitInfo* info = state_for(x, x->state());
1184   assert(x->number_of_arguments() == 5, "wrong type");
1185   LIRItem src(x->argument_at(0), this);
1186   LIRItem src_pos(x->argument_at(1), this);
1187   LIRItem dst(x->argument_at(2), this);
1188   LIRItem dst_pos(x->argument_at(3), this);
1189   LIRItem length(x->argument_at(4), this);
1190 
1191   // We put arguments into the same registers which are used for a Java call.
1192   // Note: we used fixed registers for all arguments because all registers
1193   // are caller-saved, so register allocator treats them all as used.
1194   src.load_item_force    (FrameMap::R0_oop_opr);
1195   src_pos.load_item_force(FrameMap::R1_opr);
1196   dst.load_item_force    (FrameMap::R2_oop_opr);
1197   dst_pos.load_item_force(FrameMap::R3_opr);
1198   length.load_item_force (FrameMap::R4_opr);
1199   LIR_Opr tmp =          (FrameMap::R5_opr);
1200   set_no_result(x);
1201 
1202   int flags;
1203   ciArrayKlass* expected_type;
1204   arraycopy_helper(x, &flags, &expected_type);
1205   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(),
1206                tmp, expected_type, flags, info);
1207 }
1208 
1209 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1210   fatal("CRC32 intrinsic is not implemented on this platform");
1211 }
1212 
1213 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1214   Unimplemented();
1215 }
1216 
1217 void LIRGenerator::do_Convert(Convert* x) {
1218   address runtime_func;
1219   switch (x->op()) {
1220 #ifndef AARCH64
1221     case Bytecodes::_l2f:
1222       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
1223       break;
1224     case Bytecodes::_l2d:
1225       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
1226       break;
1227     case Bytecodes::_f2l:
1228       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
1229       break;
1230     case Bytecodes::_d2l:
1231       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
1232       break;
1233 #ifdef __SOFTFP__
1234     case Bytecodes::_f2d:
1235       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_f2d);
1236       break;
1237     case Bytecodes::_d2f:
1238       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_d2f);
1239       break;
1240     case Bytecodes::_i2f:
1241       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_i2f);
1242       break;
1243     case Bytecodes::_i2d:
1244       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_i2d);
1245       break;
1246     case Bytecodes::_f2i:
1247       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_f2iz);
1248       break;
1249     case Bytecodes::_d2i:
1250       // This is implemented in hard float in assembler on arm but a call
1251       // on other platforms.
1252       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
1253       break;
1254 #endif // __SOFTFP__
1255 #endif // !AARCH64
1256     default: {
1257       LIRItem value(x->value(), this);
1258       value.load_item();
1259       LIR_Opr reg = rlock_result(x);
1260       __ convert(x->op(), value.result(), reg, NULL);
1261       return;
1262     }
1263   }
1264 
1265   LIR_Opr result = call_runtime(x->value(), runtime_func, x->type(), NULL);
1266   set_result(x, result);
1267 }
1268 
1269 
1270 void LIRGenerator::do_NewInstance(NewInstance* x) {
1271   print_if_not_loaded(x);
1272 
1273   CodeEmitInfo* info = state_for(x, x->state());
1274   LIR_Opr reg = result_register_for(x->type());  // R0 is required by runtime call in NewInstanceStub::emit_code
1275   LIR_Opr klass_reg = FrameMap::R1_metadata_opr; // R1 is required by runtime call in NewInstanceStub::emit_code
1276   LIR_Opr tmp1 = new_register(objectType);
1277   LIR_Opr tmp2 = new_register(objectType);
1278   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1279 
1280   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3,
1281                LIR_OprFact::illegalOpr, klass_reg, info);
1282 
1283   LIR_Opr result = rlock_result(x);
1284   __ move(reg, result);
1285 }
1286 
1287 
1288 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1289   // Evaluate state_for() first, because it can emit code
1290   // with the same fixed registers that are used here (R1, R2)
1291   CodeEmitInfo* info = state_for(x, x->state());
1292   LIRItem length(x->length(), this);
1293 
1294   length.load_item_force(FrameMap::R2_opr);      // R2 is required by runtime call in NewTypeArrayStub::emit_code
1295   LIR_Opr len = length.result();
1296 
1297   LIR_Opr reg = result_register_for(x->type());  // R0 is required by runtime call in NewTypeArrayStub::emit_code
1298   LIR_Opr klass_reg = FrameMap::R1_metadata_opr; // R1 is required by runtime call in NewTypeArrayStub::emit_code
1299 
1300   LIR_Opr tmp1 = new_register(objectType);
1301   LIR_Opr tmp2 = new_register(objectType);
1302   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1303   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
1304 
1305   BasicType elem_type = x->elt_type();
1306   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1307 
1308   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1309   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1310 
1311   LIR_Opr result = rlock_result(x);
1312   __ move(reg, result);
1313 }
1314 
1315 
1316 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1317   // Evaluate state_for() first, because it can emit code
1318   // with the same fixed registers that are used here (R1, R2)
1319   CodeEmitInfo* info = state_for(x, x->state());
1320   LIRItem length(x->length(), this);
1321 
1322   length.load_item_force(FrameMap::R2_opr);           // R2 is required by runtime call in NewObjectArrayStub::emit_code
1323   LIR_Opr len = length.result();
1324 
1325   CodeEmitInfo* patching_info = NULL;
1326   if (!x->klass()->is_loaded() || PatchALot) {
1327     patching_info = state_for(x, x->state_before());
1328   }
1329 
1330   LIR_Opr reg = result_register_for(x->type());       // R0 is required by runtime call in NewObjectArrayStub::emit_code
1331   LIR_Opr klass_reg = FrameMap::R1_metadata_opr;      // R1 is required by runtime call in NewObjectArrayStub::emit_code
1332 
1333   LIR_Opr tmp1 = new_register(objectType);
1334   LIR_Opr tmp2 = new_register(objectType);
1335   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1336   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
1337 
1338   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1339   ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1340   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1341     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1342   }
1343   klass2reg_with_patching(klass_reg, obj, patching_info);
1344   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1345 
1346   LIR_Opr result = rlock_result(x);
1347   __ move(reg, result);
1348 }
1349 
1350 
1351 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1352   Values* dims = x->dims();
1353   int i = dims->length();
1354   LIRItemList* items = new LIRItemList(i, i, NULL);
1355   while (i-- > 0) {
1356     LIRItem* size = new LIRItem(dims->at(i), this);
1357     items->at_put(i, size);
1358   }
1359 
1360   // Need to get the info before, as the items may become invalid through item_free
1361   CodeEmitInfo* patching_info = NULL;
1362   if (!x->klass()->is_loaded() || PatchALot) {
1363     patching_info = state_for(x, x->state_before());
1364 
1365     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1366     // clone all handlers (NOTE: Usually this is handled transparently
1367     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1368     // is done explicitly here because a stub isn't being used).
1369     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1370   }
1371 
1372   i = dims->length();
1373   while (i-- > 0) {
1374     LIRItem* size = items->at(i);
1375     size->load_item();
1376     LIR_Opr sz = size->result();
1377     assert(sz->type() == T_INT, "should be");
1378     store_stack_parameter(sz, in_ByteSize(i * BytesPerInt));
1379   }
1380 
1381   CodeEmitInfo* info = state_for(x, x->state());
1382   LIR_Opr klass_reg = FrameMap::R0_metadata_opr;
1383   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1384 
1385   LIR_Opr rank = FrameMap::R2_opr;
1386   __ move(LIR_OprFact::intConst(x->rank()), rank);
1387   LIR_Opr varargs = FrameMap::SP_opr;
1388   LIR_OprList* args = new LIR_OprList(3);
1389   args->append(klass_reg);
1390   args->append(rank);
1391   args->append(varargs);
1392   LIR_Opr reg = result_register_for(x->type());
1393   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1394                   LIR_OprFact::illegalOpr, reg, args, info);
1395 
1396   LIR_Opr result = rlock_result(x);
1397   __ move(reg, result);
1398 }
1399 
1400 
1401 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1402   // nothing to do for now
1403 }
1404 
1405 
1406 void LIRGenerator::do_CheckCast(CheckCast* x) {
1407   LIRItem obj(x->obj(), this);
1408   CodeEmitInfo* patching_info = NULL;
1409   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1410     patching_info = state_for(x, x->state_before());
1411   }
1412 
1413   obj.load_item();
1414 
1415   CodeEmitInfo* info_for_exception =
1416     (x->needs_exception_state() ? state_for(x) :
1417                                   state_for(x, x->state_before(), true /*ignore_xhandler*/));
1418 
1419   CodeStub* stub;
1420   if (x->is_incompatible_class_change_check()) {
1421     assert(patching_info == NULL, "can't patch this");
1422     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1423                                    LIR_OprFact::illegalOpr, info_for_exception);
1424   } else if (x->is_invokespecial_receiver_check()) {
1425     assert(patching_info == NULL, "can't patch this");
1426     stub = new DeoptimizeStub(info_for_exception,
1427                               Deoptimization::Reason_class_check,
1428                               Deoptimization::Action_none);
1429   } else {
1430     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id,
1431                                    LIR_OprFact::illegalOpr, info_for_exception);
1432   }
1433 
1434   LIR_Opr out_reg = rlock_result(x);
1435   LIR_Opr tmp1 = FrameMap::R0_oop_opr;
1436   LIR_Opr tmp2 = FrameMap::R1_oop_opr;
1437   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1438 
1439   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, x->direct_compare(),
1440                info_for_exception, patching_info, stub, x->profiled_method(), x->profiled_bci());
1441 }
1442 
1443 
1444 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1445   LIRItem obj(x->obj(), this);
1446   CodeEmitInfo* patching_info = NULL;
1447   if (!x->klass()->is_loaded() || PatchALot) {
1448     patching_info = state_for(x, x->state_before());
1449   }
1450 
1451   obj.load_item();
1452   LIR_Opr out_reg = rlock_result(x);
1453   LIR_Opr tmp1 = FrameMap::R0_oop_opr;
1454   LIR_Opr tmp2 = FrameMap::R1_oop_opr;
1455   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1456 
1457   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1458                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1459 }
1460 
1461 
1462 #ifdef __SOFTFP__
1463 // Turn operator if (f <op> g) into runtime call:
1464 //     call _aeabi_fcmp<op>(f, g)
1465 //     cmp(eq, 1)
1466 //     branch(eq, true path).
1467 void LIRGenerator::do_soft_float_compare(If* x) {
1468   assert(x->number_of_sux() == 2, "inconsistency");
1469   ValueTag tag = x->x()->type()->tag();
1470   If::Condition cond = x->cond();
1471   address runtime_func;
1472   // unordered comparison gets the wrong answer because aeabi functions
1473   //  return false.
1474   bool unordered_is_true = x->unordered_is_true();
1475   // reverse of condition for ne
1476   bool compare_to_zero = false;
1477   switch (lir_cond(cond)) {
1478     case lir_cond_notEqual:
1479       compare_to_zero = true;  // fall through
1480     case lir_cond_equal:
1481       runtime_func = tag == floatTag ?
1482           CAST_FROM_FN_PTR(address, __aeabi_fcmpeq):
1483           CAST_FROM_FN_PTR(address, __aeabi_dcmpeq);
1484       break;
1485     case lir_cond_less:
1486       if (unordered_is_true) {
1487         runtime_func = tag == floatTag ?
1488           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmplt):
1489           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmplt);
1490       } else {
1491         runtime_func = tag == floatTag ?
1492           CAST_FROM_FN_PTR(address, __aeabi_fcmplt):
1493           CAST_FROM_FN_PTR(address, __aeabi_dcmplt);
1494       }
1495       break;
1496     case lir_cond_lessEqual:
1497       if (unordered_is_true) {
1498         runtime_func = tag == floatTag ?
1499           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmple):
1500           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmple);
1501       } else {
1502         runtime_func = tag == floatTag ?
1503           CAST_FROM_FN_PTR(address, __aeabi_fcmple):
1504           CAST_FROM_FN_PTR(address, __aeabi_dcmple);
1505       }
1506       break;
1507     case lir_cond_greaterEqual:
1508       if (unordered_is_true) {
1509         runtime_func = tag == floatTag ?
1510           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmpge):
1511           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmpge);
1512       } else {
1513         runtime_func = tag == floatTag ?
1514           CAST_FROM_FN_PTR(address, __aeabi_fcmpge):
1515           CAST_FROM_FN_PTR(address, __aeabi_dcmpge);
1516       }
1517       break;
1518     case lir_cond_greater:
1519       if (unordered_is_true) {
1520         runtime_func = tag == floatTag ?
1521           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmpgt):
1522           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmpgt);
1523       } else {
1524         runtime_func = tag == floatTag ?
1525           CAST_FROM_FN_PTR(address, __aeabi_fcmpgt):
1526           CAST_FROM_FN_PTR(address, __aeabi_dcmpgt);
1527       }
1528       break;
1529     case lir_cond_aboveEqual:
1530     case lir_cond_belowEqual:
1531       ShouldNotReachHere();  // We're not going to get these.
1532     default:
1533       assert(lir_cond(cond) == lir_cond_always, "must be");
1534       ShouldNotReachHere();
1535   }
1536   set_no_result(x);
1537 
1538   // add safepoint before generating condition code so it can be recomputed
1539   if (x->is_safepoint()) {
1540     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1541     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1542   }
1543   // Call float compare function, returns (1,0) if true or false.
1544   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, intType, NULL);
1545   __ cmp(lir_cond_equal, result,
1546          compare_to_zero ?
1547            LIR_OprFact::intConst(0) : LIR_OprFact::intConst(1));
1548   profile_branch(x, cond);
1549   move_to_phi(x->state());
1550   __ branch(lir_cond_equal, T_INT, x->tsux());
1551 }
1552 #endif // __SOFTFP__
1553 
1554 void LIRGenerator::do_If(If* x) {
1555   assert(x->number_of_sux() == 2, "inconsistency");
1556   ValueTag tag = x->x()->type()->tag();
1557 
1558 #ifdef __SOFTFP__
1559   if (tag == floatTag || tag == doubleTag) {
1560     do_soft_float_compare(x);
1561     assert(x->default_sux() == x->fsux(), "wrong destination above");
1562     __ jump(x->default_sux());
1563     return;
1564   }
1565 #endif // __SOFTFP__
1566 
1567   LIRItem xitem(x->x(), this);
1568   LIRItem yitem(x->y(), this);
1569   LIRItem* xin = &xitem;
1570   LIRItem* yin = &yitem;
1571   If::Condition cond = x->cond();
1572 
1573 #ifndef AARCH64
1574   if (tag == longTag) {
1575     if (cond == If::gtr || cond == If::leq) {
1576       cond = Instruction::mirror(cond);
1577       xin = &yitem;
1578       yin = &xitem;
1579     }
1580     xin->set_destroys_register();
1581   }
1582 #endif // !AARCH64
1583 
1584   xin->load_item();
1585   LIR_Opr left = xin->result();
1586   LIR_Opr right;
1587 
1588 #ifdef AARCH64
1589   if (yin->is_constant() && can_inline_as_constant_in_cmp(yin->value())) {
1590     yin->dont_load_item();
1591   } else {
1592     yin->load_item();
1593   }
1594   right = yin->result();
1595 #else
1596   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1597       (cond == If::eql || cond == If::neq)) {
1598     // inline long zero
1599     right = LIR_OprFact::value_type(yin->value()->type());
1600   } else {
1601     yin->load_nonconstant();
1602     right = yin->result();
1603   }
1604 #endif // AARCH64
1605 
1606   set_no_result(x);
1607 
1608   // add safepoint before generating condition code so it can be recomputed
1609   if (x->is_safepoint()) {
1610     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1611     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1612   }
1613 
1614   __ cmp(lir_cond(cond), left, right);
1615   profile_branch(x, cond);
1616   move_to_phi(x->state());
1617   if (x->x()->type()->is_float_kind()) {
1618     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1619   } else {
1620     __ branch(lir_cond(cond), right->type(), x->tsux());
1621   }
1622   assert(x->default_sux() == x->fsux(), "wrong destination above");
1623   __ jump(x->default_sux());
1624 }
1625 
1626 
1627 LIR_Opr LIRGenerator::getThreadPointer() {
1628   return FrameMap::Rthread_opr;
1629 }
1630 
1631 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1632   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::R0_opr);
1633   LIR_OprList* args = new LIR_OprList(1);
1634   args->append(FrameMap::R0_opr);
1635   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1636   __ call_runtime_leaf(func, getThreadTemp(), LIR_OprFact::illegalOpr, args);
1637 }
1638 
1639 
1640 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1641                                         CodeEmitInfo* info) {
1642 #ifndef AARCH64
1643   if (value->is_double_cpu()) {
1644     assert(address->index()->is_illegal(), "should have a constant displacement");
1645     LIR_Opr tmp = new_pointer_register();
1646     add_large_constant(address->base(), address->disp(), tmp);
1647     __ volatile_store_mem_reg(value, new LIR_Address(tmp, (intx)0, address->type()), info);
1648     return;
1649   }
1650 #endif // !AARCH64
1651   // TODO-AARCH64 implement with stlr instruction
1652   __ store(value, address, info, lir_patch_none);
1653 }
1654 
1655 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1656                                        CodeEmitInfo* info) {
1657 #ifndef AARCH64
1658   if (result->is_double_cpu()) {
1659     assert(address->index()->is_illegal(), "should have a constant displacement");
1660     LIR_Opr tmp = new_pointer_register();
1661     add_large_constant(address->base(), address->disp(), tmp);
1662     __ volatile_load_mem_reg(new LIR_Address(tmp, (intx)0, address->type()), result, info);
1663     return;
1664   }
1665 #endif // !AARCH64
1666   // TODO-AARCH64 implement with ldar instruction
1667   __ load(address, result, info, lir_patch_none);
1668 }
1669 
1670 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1671                                      BasicType type, bool is_volatile) {
1672 #ifdef AARCH64
1673   __ load(new LIR_Address(src, offset, type), dst);
1674 #else
1675   assert(offset->is_single_cpu(), "must be");
1676   if (is_volatile && dst->is_double_cpu()) {
1677     LIR_Opr tmp = new_pointer_register();
1678     __ add(src, offset, tmp);
1679     __ volatile_load_mem_reg(new LIR_Address(tmp, (intx)0, type), dst, NULL);
1680   } else if (type == T_FLOAT || type == T_DOUBLE) {
1681     // fld doesn't have indexed addressing mode
1682     LIR_Opr tmp = new_register(T_INT);
1683     __ add(src, offset, tmp);
1684     __ load(new LIR_Address(tmp, (intx)0, type), dst);
1685   } else {
1686     __ load(new LIR_Address(src, offset, type), dst);
1687   }
1688 #endif // AARCH64
1689 }
1690 
1691 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1692                                      BasicType type, bool is_volatile) {
1693 #ifdef AARCH64
1694   LIR_Address* addr = new LIR_Address(src, offset, type);
1695   if (type == T_ARRAY || type == T_OBJECT) {
1696     pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1697                 true /* do_load */, false /* patch */, NULL);
1698     __ move(data, addr);
1699     assert(src->is_register(), "must be register");
1700     post_barrier(LIR_OprFact::address(addr), data);
1701   } else {
1702     __ move(data, addr);
1703   }
1704 #else
1705   assert(offset->is_single_cpu(), "must be");
1706   if (is_volatile && data->is_double_cpu()) {
1707     LIR_Opr tmp = new_register(T_INT);
1708     __ add(src, offset, tmp);
1709     __ volatile_store_mem_reg(data, new LIR_Address(tmp, (intx)0, type), NULL);
1710   } else if (type == T_FLOAT || type == T_DOUBLE) {
1711     // fst doesn't have indexed addressing mode
1712     LIR_Opr tmp = new_register(T_INT);
1713     __ add(src, offset, tmp);
1714     __ move(data, new LIR_Address(tmp, (intx)0, type));
1715   } else {
1716     LIR_Address* addr = new LIR_Address(src, offset, type);
1717     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1718 #if INCLUDE_ALL_GCS
1719     if (is_obj) {
1720       // Do the pre-write barrier, if any.
1721       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1722                   true /* do_load */, false /* patch */, NULL);
1723     }
1724 #endif // INCLUDE_ALL_GCS
1725     __ move(data, addr);
1726     if (is_obj) {
1727       assert(src->is_register(), "must be register");
1728       post_barrier(LIR_OprFact::address(addr), data);
1729     }
1730   }
1731 #endif // AARCH64
1732 }
1733 
1734 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1735   BasicType type = x->basic_type();
1736   LIRItem src(x->object(), this);
1737   LIRItem off(x->offset(), this);
1738   LIRItem value(x->value(), this);
1739 
1740   src.load_item();
1741   if (x->is_add()) {
1742     value.load_nonconstant();
1743   } else {
1744     value.load_item();
1745   }
1746   off.load_nonconstant();
1747 
1748   LIR_Opr dst = rlock_result(x, type);
1749   LIR_Opr data = value.result();
1750   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1751 
1752   assert (type == T_INT || type == T_LONG || (!x->is_add() && is_obj), "unexpected type");
1753   LIR_Opr addr_ptr = new_pointer_register();
1754 
1755   __ add(src.result(), off.result(), addr_ptr);
1756 
1757   LIR_Address* addr = new LIR_Address(addr_ptr, (intx)0, type);
1758 
1759   if (x->is_add()) {
1760     LIR_Opr tmp = new_register(type);
1761     __ xadd(addr_ptr, data, dst, tmp);
1762   } else {
1763     LIR_Opr tmp = (UseCompressedOops && is_obj) ? new_pointer_register() : LIR_OprFact::illegalOpr;
1764     if (is_obj) {
1765       // Do the pre-write barrier, if any.
1766       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1767                   true /* do_load */, false /* patch */, NULL);
1768     }
1769     __ xchg(addr_ptr, data, dst, tmp);
1770     if (is_obj) {
1771       // Seems to be a precise address
1772       post_barrier(LIR_OprFact::address(addr), data);
1773     }
1774   }
1775 }