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src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp

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  63 
  64 LIR_Opr LIR_Assembler::osrBufferPointer() {
  65   return FrameMap::Z_R2_opr;
  66 }
  67 
  68 int LIR_Assembler::initial_frame_size_in_bytes() const {
  69   return in_bytes(frame_map()->framesize_in_bytes());
  70 }
  71 
  72 // Inline cache check: done before the frame is built.
  73 // The inline cached class is in Z_inline_cache(Z_R9).
  74 // We fetch the class of the receiver and compare it with the cached class.
  75 // If they do not match we jump to the slow case.
  76 int LIR_Assembler::check_icache() {
  77   Register receiver = receiverOpr()->as_register();
  78   int offset = __ offset();
  79   __ inline_cache_check(receiver, Z_inline_cache);
  80   return offset;
  81 }
  82 




  83 void LIR_Assembler::osr_entry() {
  84   // On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
  85   //
  86   //   1. Create a new compiled activation.
  87   //   2. Initialize local variables in the compiled activation. The expression stack must be empty
  88   //      at the osr_bci; it is not initialized.
  89   //   3. Jump to the continuation address in compiled code to resume execution.
  90 
  91   // OSR entry point
  92   offsets()->set_value(CodeOffsets::OSR_Entry, code_offset());
  93   BlockBegin* osr_entry = compilation()->hir()->osr_entry();
  94   ValueStack* entry_state = osr_entry->end()->state();
  95   int number_of_locks = entry_state->locks_size();
  96 
  97   // Create a frame for the compiled activation.
  98   __ build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
  99 
 100   // OSR buffer is
 101   //
 102   // locals[nlocals-1..0]




  63 
  64 LIR_Opr LIR_Assembler::osrBufferPointer() {
  65   return FrameMap::Z_R2_opr;
  66 }
  67 
  68 int LIR_Assembler::initial_frame_size_in_bytes() const {
  69   return in_bytes(frame_map()->framesize_in_bytes());
  70 }
  71 
  72 // Inline cache check: done before the frame is built.
  73 // The inline cached class is in Z_inline_cache(Z_R9).
  74 // We fetch the class of the receiver and compare it with the cached class.
  75 // If they do not match we jump to the slow case.
  76 int LIR_Assembler::check_icache() {
  77   Register receiver = receiverOpr()->as_register();
  78   int offset = __ offset();
  79   __ inline_cache_check(receiver, Z_inline_cache);
  80   return offset;
  81 }
  82 
  83 void LIR_Assembler::clinit_barrier(ciMethod* method) {
  84   ShouldNotReachHere(); // not implemented
  85 }
  86 
  87 void LIR_Assembler::osr_entry() {
  88   // On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
  89   //
  90   //   1. Create a new compiled activation.
  91   //   2. Initialize local variables in the compiled activation. The expression stack must be empty
  92   //      at the osr_bci; it is not initialized.
  93   //   3. Jump to the continuation address in compiled code to resume execution.
  94 
  95   // OSR entry point
  96   offsets()->set_value(CodeOffsets::OSR_Entry, code_offset());
  97   BlockBegin* osr_entry = compilation()->hir()->osr_entry();
  98   ValueStack* entry_state = osr_entry->end()->state();
  99   int number_of_locks = entry_state->locks_size();
 100 
 101   // Create a frame for the compiled activation.
 102   __ build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
 103 
 104   // OSR buffer is
 105   //
 106   // locals[nlocals-1..0]


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