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src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp

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 154 
 155 LIR_Opr LIR_Assembler::osrBufferPointer() {
 156   return FrameMap::I0_opr;
 157 }
 158 
 159 
 160 int LIR_Assembler::initial_frame_size_in_bytes() const {
 161   return in_bytes(frame_map()->framesize_in_bytes());
 162 }
 163 
 164 
 165 // inline cache check: the inline cached class is in G5_inline_cache_reg(G5);
 166 // we fetch the class of the receiver (O0) and compare it with the cached class.
 167 // If they do not match we jump to slow case.
 168 int LIR_Assembler::check_icache() {
 169   int offset = __ offset();
 170   __ inline_cache_check(O0, G5_inline_cache_reg);
 171   return offset;
 172 }
 173 



 174 
 175 void LIR_Assembler::osr_entry() {
 176   // On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
 177   //
 178   //   1. Create a new compiled activation.
 179   //   2. Initialize local variables in the compiled activation.  The expression stack must be empty
 180   //      at the osr_bci; it is not initialized.
 181   //   3. Jump to the continuation address in compiled code to resume execution.
 182 
 183   // OSR entry point
 184   offsets()->set_value(CodeOffsets::OSR_Entry, code_offset());
 185   BlockBegin* osr_entry = compilation()->hir()->osr_entry();
 186   ValueStack* entry_state = osr_entry->end()->state();
 187   int number_of_locks = entry_state->locks_size();
 188 
 189   // Create a frame for the compiled activation.
 190   __ build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
 191 
 192   // OSR buffer is
 193   //




 154 
 155 LIR_Opr LIR_Assembler::osrBufferPointer() {
 156   return FrameMap::I0_opr;
 157 }
 158 
 159 
 160 int LIR_Assembler::initial_frame_size_in_bytes() const {
 161   return in_bytes(frame_map()->framesize_in_bytes());
 162 }
 163 
 164 
 165 // inline cache check: the inline cached class is in G5_inline_cache_reg(G5);
 166 // we fetch the class of the receiver (O0) and compare it with the cached class.
 167 // If they do not match we jump to slow case.
 168 int LIR_Assembler::check_icache() {
 169   int offset = __ offset();
 170   __ inline_cache_check(O0, G5_inline_cache_reg);
 171   return offset;
 172 }
 173 
 174 void LIR_Assembler::clinit_barrier(ciMethod* method) {
 175   ShouldNotReachHere(); // not implemented
 176 }
 177 
 178 void LIR_Assembler::osr_entry() {
 179   // On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
 180   //
 181   //   1. Create a new compiled activation.
 182   //   2. Initialize local variables in the compiled activation.  The expression stack must be empty
 183   //      at the osr_bci; it is not initialized.
 184   //   3. Jump to the continuation address in compiled code to resume execution.
 185 
 186   // OSR entry point
 187   offsets()->set_value(CodeOffsets::OSR_Entry, code_offset());
 188   BlockBegin* osr_entry = compilation()->hir()->osr_entry();
 189   ValueStack* entry_state = osr_entry->end()->state();
 190   int number_of_locks = entry_state->locks_size();
 191 
 192   // Create a frame for the compiled activation.
 193   __ build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
 194 
 195   // OSR buffer is
 196   //


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