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src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp

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 342 int LIR_Assembler::check_icache() {
 343   Register receiver = FrameMap::receiver_opr->as_register();
 344   Register ic_klass = IC_Klass;
 345   const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
 346   const bool do_post_padding = VerifyOops || UseCompressedClassPointers;
 347   if (!do_post_padding) {
 348     // insert some nops so that the verified entry point is aligned on CodeEntryAlignment
 349     __ align(CodeEntryAlignment, __ offset() + ic_cmp_size);
 350   }
 351   int offset = __ offset();
 352   __ inline_cache_check(receiver, IC_Klass);
 353   assert(__ offset() % CodeEntryAlignment == 0 || do_post_padding, "alignment must be correct");
 354   if (do_post_padding) {
 355     // force alignment after the cache check.
 356     // It's been verified to be aligned if !VerifyOops
 357     __ align(CodeEntryAlignment);
 358   }
 359   return offset;
 360 }
 361 
















 362 
 363 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo* info) {
 364   jobject o = NULL;
 365   PatchingStub* patch = new PatchingStub(_masm, patching_id(info));
 366   __ movoop(reg, o);
 367   patching_epilog(patch, lir_patch_normal, reg, info);
 368 }
 369 
 370 void LIR_Assembler::klass2reg_with_patching(Register reg, CodeEmitInfo* info) {
 371   Metadata* o = NULL;
 372   PatchingStub* patch = new PatchingStub(_masm, PatchingStub::load_klass_id);
 373   __ mov_metadata(reg, o);
 374   patching_epilog(patch, lir_patch_normal, reg, info);
 375 }
 376 
 377 // This specifies the rsp decrement needed to build the frame
 378 int LIR_Assembler::initial_frame_size_in_bytes() const {
 379   // if rounding, must let FrameMap know!
 380 
 381   // The frame_map records size in slots (32bit word)




 342 int LIR_Assembler::check_icache() {
 343   Register receiver = FrameMap::receiver_opr->as_register();
 344   Register ic_klass = IC_Klass;
 345   const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
 346   const bool do_post_padding = VerifyOops || UseCompressedClassPointers;
 347   if (!do_post_padding) {
 348     // insert some nops so that the verified entry point is aligned on CodeEntryAlignment
 349     __ align(CodeEntryAlignment, __ offset() + ic_cmp_size);
 350   }
 351   int offset = __ offset();
 352   __ inline_cache_check(receiver, IC_Klass);
 353   assert(__ offset() % CodeEntryAlignment == 0 || do_post_padding, "alignment must be correct");
 354   if (do_post_padding) {
 355     // force alignment after the cache check.
 356     // It's been verified to be aligned if !VerifyOops
 357     __ align(CodeEntryAlignment);
 358   }
 359   return offset;
 360 }
 361 
 362 void LIR_Assembler::clinit_barrier(ciMethod* method) {
 363   assert(UseFastClassInitChecks, "sanity");
 364   assert(method->is_loaded(), "sanity");
 365 
 366   Label L_skip_barrier;
 367   Register klass = rscratch1;
 368   Register thread = LP64_ONLY( r15_thread ) NOT_LP64( noreg );
 369   assert(thread != noreg, "x86_32 not implemented");
 370 
 371   __ mov_metadata(klass, method->holder()->constant_encoding());
 372   __ clinit_barrier(klass, thread, &L_skip_barrier /*L_fast_path*/);
 373 
 374   __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 375 
 376   __ bind(L_skip_barrier);
 377 }
 378 
 379 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo* info) {
 380   jobject o = NULL;
 381   PatchingStub* patch = new PatchingStub(_masm, patching_id(info));
 382   __ movoop(reg, o);
 383   patching_epilog(patch, lir_patch_normal, reg, info);
 384 }
 385 
 386 void LIR_Assembler::klass2reg_with_patching(Register reg, CodeEmitInfo* info) {
 387   Metadata* o = NULL;
 388   PatchingStub* patch = new PatchingStub(_masm, PatchingStub::load_klass_id);
 389   __ mov_metadata(reg, o);
 390   patching_epilog(patch, lir_patch_normal, reg, info);
 391 }
 392 
 393 // This specifies the rsp decrement needed to build the frame
 394 int LIR_Assembler::initial_frame_size_in_bytes() const {
 395   // if rounding, must let FrameMap know!
 396 
 397   // The frame_map records size in slots (32bit word)


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