320 static const int float_pressure(int default_pressure_threshold);
321
322 // Used to determine if we have fast l2f conversion
323 // USII has it, USIII doesn't
324 static const bool convL2FSupported(void);
325
326 // Vector width in bytes
327 static const int vector_width_in_bytes(BasicType bt);
328
329 // Limits on vector size (number of elements).
330 static const int max_vector_size(const BasicType bt);
331 static const int min_vector_size(const BasicType bt);
332 static const bool vector_size_supported(const BasicType bt, int size) {
333 return (Matcher::max_vector_size(bt) >= size &&
334 Matcher::min_vector_size(bt) <= size);
335 }
336
337 // Vector ideal reg
338 static const uint vector_ideal_reg(int len);
339
340 // CPU supports misaligned vectors store/load.
341 static const bool misaligned_vectors_ok();
342
343 // Should original key array reference be passed to AES stubs
344 static const bool pass_original_key_for_aes();
345
346 // Used to determine a "low complexity" 64-bit constant. (Zero is simple.)
347 // The standard of comparison is one (StoreL ConL) vs. two (StoreI ConI).
348 // Depends on the details of 64-bit constant generation on the CPU.
349 static const bool isSimpleConstant64(jlong con);
350
351 // These calls are all generated by the ADLC
352
353 // TRUE - grows up, FALSE - grows down (Intel)
354 virtual bool stack_direction() const;
355
356 // Java-Java calling convention
357 // (what you use when Java calls Java)
358
359 // Alignment of stack in bytes, standard Intel word alignment is 4.
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320 static const int float_pressure(int default_pressure_threshold);
321
322 // Used to determine if we have fast l2f conversion
323 // USII has it, USIII doesn't
324 static const bool convL2FSupported(void);
325
326 // Vector width in bytes
327 static const int vector_width_in_bytes(BasicType bt);
328
329 // Limits on vector size (number of elements).
330 static const int max_vector_size(const BasicType bt);
331 static const int min_vector_size(const BasicType bt);
332 static const bool vector_size_supported(const BasicType bt, int size) {
333 return (Matcher::max_vector_size(bt) >= size &&
334 Matcher::min_vector_size(bt) <= size);
335 }
336
337 // Vector ideal reg
338 static const uint vector_ideal_reg(int len);
339
340 // Does the CPU supports vector variable shift instructions?
341 static bool supports_vector_variable_shifts(void);
342
343 // CPU supports misaligned vectors store/load.
344 static const bool misaligned_vectors_ok();
345
346 // Should original key array reference be passed to AES stubs
347 static const bool pass_original_key_for_aes();
348
349 // Used to determine a "low complexity" 64-bit constant. (Zero is simple.)
350 // The standard of comparison is one (StoreL ConL) vs. two (StoreI ConI).
351 // Depends on the details of 64-bit constant generation on the CPU.
352 static const bool isSimpleConstant64(jlong con);
353
354 // These calls are all generated by the ADLC
355
356 // TRUE - grows up, FALSE - grows down (Intel)
357 virtual bool stack_direction() const;
358
359 // Java-Java calling convention
360 // (what you use when Java calls Java)
361
362 // Alignment of stack in bytes, standard Intel word alignment is 4.
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