1 /*
2 * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2018 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "runtime/java.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "utilities/defaultStream.hpp"
34 #include "vm_version_ppc.hpp"
35 #ifdef TARGET_OS_FAMILY_aix
36 # include "os_aix.inline.hpp"
37 #endif
38 #ifdef TARGET_OS_FAMILY_linux
39 # include "os_linux.inline.hpp"
40 #endif
41
42 # include <sys/sysinfo.h>
43
44 int VM_Version::_features = VM_Version::unknown_m;
45 int VM_Version::_measured_cache_line_size = 128; // default value
46 const char* VM_Version::_features_str = "";
47 bool VM_Version::_is_determine_features_test_running = false;
48 uint64_t VM_Version::_dscr_val = 0;
49
50 #define MSG(flag) \
51 if (flag && !FLAG_IS_DEFAULT(flag)) \
52 jio_fprintf(defaultStream::error_stream(), \
53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
54 " -XX:+" #flag " will be disabled!\n");
55
56 void VM_Version::initialize() {
57
58 // Test which instructions are supported and measure cache line size.
59 determine_features();
60
61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
63 if (VM_Version::has_lqarx()) {
64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 8);
65 } else if (VM_Version::has_popcntw()) {
66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
67 } else if (VM_Version::has_cmpb()) {
68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
69 } else if (VM_Version::has_popcntb()) {
70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
71 } else {
72 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
73 }
74 }
75 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
76 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7 ||
77 PowerArchitecturePPC64 == 8,
78 "PowerArchitecturePPC64 should be 0, 5, 6, 7, or 8");
79
80 // Power 8: Configure Data Stream Control Register.
81 if (PowerArchitecturePPC64 >= 8) {
82 config_dscr();
83 }
84
85 if (!UseSIGTRAP) {
86 MSG(TrapBasedICMissChecks);
87 MSG(TrapBasedNotEntrantChecks);
88 MSG(TrapBasedNullChecks);
89 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
90 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
91 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
92 }
93
94 #ifdef COMPILER2
95 if (!UseSIGTRAP) {
96 MSG(TrapBasedRangeChecks);
97 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
98 }
99
100 // On Power6 test for section size.
101 if (PowerArchitecturePPC64 == 6) {
102 determine_section_size();
103 // TODO: PPC port } else {
104 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
105 }
106
107 MaxVectorSize = 8;
108 #endif
109
110 // Create and print feature-string.
111 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
112 jio_snprintf(buf, sizeof(buf),
113 "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
114 (has_fsqrt() ? " fsqrt" : ""),
115 (has_isel() ? " isel" : ""),
116 (has_lxarxeh() ? " lxarxeh" : ""),
117 (has_cmpb() ? " cmpb" : ""),
118 //(has_mftgpr()? " mftgpr" : ""),
119 (has_popcntb() ? " popcntb" : ""),
120 (has_popcntw() ? " popcntw" : ""),
121 (has_fcfids() ? " fcfids" : ""),
122 (has_vand() ? " vand" : ""),
123 (has_lqarx() ? " lqarx" : ""),
124 (has_vcipher() ? " aes" : ""),
125 (has_vpmsumb() ? " vpmsumb" : ""),
126 (has_mfdscr() ? " mfdscr" : ""),
127 (has_vsx() ? " vsx" : ""),
128 (has_vshasig() ? " sha" : "")
129 // Make sure number of %s matches num_features!
130 );
131 _features_str = strdup(buf);
132 if (Verbose) {
133 print_features();
134 }
135
136 // PPC64 supports 8-byte compare-exchange operations (see
137 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
138 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
139 _supports_cx8 = true;
140
141 UseSSE = 0; // Only on x86 and x64
142
143 intx cache_line_size = _measured_cache_line_size;
144
145 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
146
147 if (AllocatePrefetchStyle == 4) {
148 AllocatePrefetchStepSize = cache_line_size; // Need exact value.
149 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
150 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
151 } else {
152 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
153 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
154 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
155 }
156
157 assert(AllocatePrefetchLines > 0, "invalid value");
158 if (AllocatePrefetchLines < 1) { // Set valid value in product VM.
159 AllocatePrefetchLines = 1; // Conservative value.
160 }
161
162 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
163 AllocatePrefetchStyle = 1; // Fall back if inappropriate.
164 }
165
166 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
167
168 // Implementation does not use any of the vector instructions
169 // available with Power8. Their exploitation is still pending.
170 if (!UseCRC32Intrinsics) {
171 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
172 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
173 }
174 }
175
176 // The AES intrinsic stubs require AES instruction support.
177 if (has_vcipher()) {
178 if (FLAG_IS_DEFAULT(UseAES)) {
179 UseAES = true;
180 }
181 } else if (UseAES) {
182 if (!FLAG_IS_DEFAULT(UseAES))
183 warning("AES instructions are not available on this CPU");
184 FLAG_SET_DEFAULT(UseAES, false);
185 }
186
187 if (UseAES && has_vcipher()) {
188 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
189 UseAESIntrinsics = true;
190 }
191 } else if (UseAESIntrinsics) {
192 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
193 warning("AES intrinsics are not available on this CPU");
194 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
195 }
196
197 if (has_vshasig()) {
198 if (FLAG_IS_DEFAULT(UseSHA)) {
199 UseSHA = true;
200 }
201 } else if (UseSHA) {
202 if (!FLAG_IS_DEFAULT(UseSHA))
203 warning("SHA instructions are not available on this CPU");
204 FLAG_SET_DEFAULT(UseSHA, false);
205 }
206
207 if (UseSHA1Intrinsics) {
208 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
209 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
210 }
211
212 if (UseSHA && has_vshasig()) {
213 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
214 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
215 }
216 } else if (UseSHA256Intrinsics) {
217 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
218 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
219 }
220
221 if (UseSHA && has_vshasig()) {
222 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
223 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
224 }
225 } else if (UseSHA512Intrinsics) {
226 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
227 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
228 }
229
230 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
231 FLAG_SET_DEFAULT(UseSHA, false);
232 }
233
234 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
235 UseMontgomeryMultiplyIntrinsic = true;
236 }
237 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
238 UseMontgomerySquareIntrinsic = true;
239 }
240 }
241
242 void VM_Version::print_features() {
243 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size());
244 }
245
246 #ifdef COMPILER2
247 // Determine section size on power6: If section size is 8 instructions,
248 // there should be a difference between the two testloops of ~15 %. If
249 // no difference is detected the section is assumed to be 32 instructions.
250 void VM_Version::determine_section_size() {
251
252 int unroll = 80;
253
254 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
255
256 // Allocate space for the code.
257 ResourceMark rm;
258 CodeBuffer cb("detect_section_size", code_size, 0);
259 MacroAssembler* a = new MacroAssembler(&cb);
260
261 uint32_t *code = (uint32_t *)a->pc();
262 // Emit code.
263 void (*test1)() = (void(*)())(void *)a->function_entry();
264
265 Label l1;
266
267 a->li(R4, 1);
268 a->sldi(R4, R4, 28);
269 a->b(l1);
270 a->align(CodeEntryAlignment);
271
272 a->bind(l1);
273
274 for (int i = 0; i < unroll; i++) {
275 // Schleife 1
276 // ------- sector 0 ------------
277 // ;; 0
278 a->nop(); // 1
279 a->fpnop0(); // 2
280 a->fpnop1(); // 3
281 a->addi(R4,R4, -1); // 4
282
283 // ;; 1
284 a->nop(); // 5
285 a->fmr(F6, F6); // 6
286 a->fmr(F7, F7); // 7
287 a->endgroup(); // 8
288 // ------- sector 8 ------------
289
290 // ;; 2
291 a->nop(); // 9
292 a->nop(); // 10
293 a->fmr(F8, F8); // 11
294 a->fmr(F9, F9); // 12
295
296 // ;; 3
297 a->nop(); // 13
298 a->fmr(F10, F10); // 14
299 a->fmr(F11, F11); // 15
300 a->endgroup(); // 16
301 // -------- sector 16 -------------
302
303 // ;; 4
304 a->nop(); // 17
305 a->nop(); // 18
306 a->fmr(F15, F15); // 19
307 a->fmr(F16, F16); // 20
308
309 // ;; 5
310 a->nop(); // 21
311 a->fmr(F17, F17); // 22
312 a->fmr(F18, F18); // 23
313 a->endgroup(); // 24
314 // ------- sector 24 ------------
315
316 // ;; 6
317 a->nop(); // 25
318 a->nop(); // 26
319 a->fmr(F19, F19); // 27
320 a->fmr(F20, F20); // 28
321
322 // ;; 7
323 a->nop(); // 29
324 a->fmr(F21, F21); // 30
325 a->fmr(F22, F22); // 31
326 a->brnop0(); // 32
327
328 // ------- sector 32 ------------
329 }
330
331 // ;; 8
332 a->cmpdi(CCR0, R4, unroll); // 33
333 a->bge(CCR0, l1); // 34
334 a->blr();
335
336 // Emit code.
337 void (*test2)() = (void(*)())(void *)a->function_entry();
338 // uint32_t *code = (uint32_t *)a->pc();
339
340 Label l2;
341
342 a->li(R4, 1);
343 a->sldi(R4, R4, 28);
344 a->b(l2);
345 a->align(CodeEntryAlignment);
346
347 a->bind(l2);
348
349 for (int i = 0; i < unroll; i++) {
350 // Schleife 2
351 // ------- sector 0 ------------
352 // ;; 0
353 a->brnop0(); // 1
354 a->nop(); // 2
355 //a->cmpdi(CCR0, R4, unroll);
356 a->fpnop0(); // 3
357 a->fpnop1(); // 4
358 a->addi(R4,R4, -1); // 5
359
360 // ;; 1
361
362 a->nop(); // 6
363 a->fmr(F6, F6); // 7
364 a->fmr(F7, F7); // 8
365 // ------- sector 8 ---------------
366
367 // ;; 2
368 a->endgroup(); // 9
369
370 // ;; 3
371 a->nop(); // 10
372 a->nop(); // 11
373 a->fmr(F8, F8); // 12
374
375 // ;; 4
376 a->fmr(F9, F9); // 13
377 a->nop(); // 14
378 a->fmr(F10, F10); // 15
379
380 // ;; 5
381 a->fmr(F11, F11); // 16
382 // -------- sector 16 -------------
383
384 // ;; 6
385 a->endgroup(); // 17
386
387 // ;; 7
388 a->nop(); // 18
389 a->nop(); // 19
390 a->fmr(F15, F15); // 20
391
392 // ;; 8
393 a->fmr(F16, F16); // 21
394 a->nop(); // 22
395 a->fmr(F17, F17); // 23
396
397 // ;; 9
398 a->fmr(F18, F18); // 24
399 // -------- sector 24 -------------
400
401 // ;; 10
402 a->endgroup(); // 25
403
404 // ;; 11
405 a->nop(); // 26
406 a->nop(); // 27
407 a->fmr(F19, F19); // 28
408
409 // ;; 12
410 a->fmr(F20, F20); // 29
411 a->nop(); // 30
412 a->fmr(F21, F21); // 31
413
414 // ;; 13
415 a->fmr(F22, F22); // 32
416 }
417
418 // -------- sector 32 -------------
419 // ;; 14
420 a->cmpdi(CCR0, R4, unroll); // 33
421 a->bge(CCR0, l2); // 34
422
423 a->blr();
424 uint32_t *code_end = (uint32_t *)a->pc();
425 a->flush();
426
427 double loop1_seconds,loop2_seconds, rel_diff;
428 uint64_t start1, stop1;
429
430 start1 = os::current_thread_cpu_time(false);
431 (*test1)();
432 stop1 = os::current_thread_cpu_time(false);
433 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
434
435
436 start1 = os::current_thread_cpu_time(false);
437 (*test2)();
438 stop1 = os::current_thread_cpu_time(false);
439
440 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
441
442 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
443
444 if (PrintAssembly) {
445 ttyLocker ttyl;
446 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
447 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
448 tty->print_cr("Time loop1 :%f", loop1_seconds);
449 tty->print_cr("Time loop2 :%f", loop2_seconds);
450 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
451
452 if (rel_diff > 12.0) {
453 tty->print_cr("Section Size 8 Instructions");
454 } else{
455 tty->print_cr("Section Size 32 Instructions or Power5");
456 }
457 }
458
459 #if 0 // TODO: PPC port
460 // Set sector size (if not set explicitly).
461 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
462 if (rel_diff > 12.0) {
463 PdScheduling::power6SectorSize = 0x20;
464 } else {
465 PdScheduling::power6SectorSize = 0x80;
466 }
467 } else if (Power6SectorSize128PPC64) {
468 PdScheduling::power6SectorSize = 0x80;
469 } else {
470 PdScheduling::power6SectorSize = 0x20;
471 }
472 #endif
473 if (UsePower6SchedulerPPC64) Unimplemented();
474 }
475 #endif // COMPILER2
476
477 void VM_Version::determine_features() {
478 #if defined(ABI_ELFv2)
479 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
480 #else
481 // 7 InstWords for each call (function descriptor + blr instruction).
482 const int code_size = (num_features+1+2*7)*BytesPerInstWord;
483 #endif
484 int features = 0;
485
486 // create test area
487 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
488 char test_area[BUFFER_SIZE];
489 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
490
491 // Allocate space for the code.
492 ResourceMark rm;
493 CodeBuffer cb("detect_cpu_features", code_size, 0);
494 MacroAssembler* a = new MacroAssembler(&cb);
495
496 // Must be set to true so we can generate the test code.
497 _features = VM_Version::all_features_m;
498
499 // Emit code.
500 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
501 uint32_t *code = (uint32_t *)a->pc();
502 // Don't use R0 in ldarx.
503 // Keep R3_ARG1 unmodified, it contains &field (see below).
504 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
505 a->fsqrt(F3, F4); // code[0] -> fsqrt_m
506 a->fsqrts(F3, F4); // code[1] -> fsqrts_m
507 a->isel(R7, R5, R6, 0); // code[2] -> isel_m
508 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
509 a->cmpb(R7, R5, R6); // code[4] -> bcmp
510 //a->mftgpr(R7, F3); // code[5] -> mftgpr
511 a->popcntb(R7, R5); // code[6] -> popcntb
512 a->popcntw(R7, R5); // code[7] -> popcntw
513 a->fcfids(F3, F4); // code[8] -> fcfids
514 a->vand(VR0, VR0, VR0); // code[9] -> vand
515 a->lqarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[10] -> lqarx_m
516 a->vcipher(VR0, VR1, VR2); // code[11] -> vcipher
517 a->vpmsumb(VR0, VR1, VR2); // code[12] -> vpmsumb
518 a->mfdscr(R0); // code[13] -> mfdscr
519 a->lxvd2x(VSR0, R3_ARG1); // code[14] -> vsx
520 a->vshasigmaw(VR0, VR1, 1, 0xF); // code[15] -> vshasig
521 a->blr();
522
523 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
524 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
525 a->dcbz(R3_ARG1); // R3_ARG1 = addr
526 a->blr();
527
528 uint32_t *code_end = (uint32_t *)a->pc();
529 a->flush();
530 _features = VM_Version::unknown_m;
531
532 // Print the detection code.
533 if (PrintAssembly) {
534 ttyLocker ttyl;
535 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
536 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
537 }
538
539 // Measure cache line size.
540 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
541 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
542 int count = 0; // count zeroed bytes
543 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
544 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
545 _measured_cache_line_size = count;
546
547 // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
548 VM_Version::_is_determine_features_test_running = true;
549 (*test)((address)mid_of_test_area, (uint64_t)0);
550 VM_Version::_is_determine_features_test_running = false;
551
552 // determine which instructions are legal.
553 int feature_cntr = 0;
554 if (code[feature_cntr++]) features |= fsqrt_m;
555 if (code[feature_cntr++]) features |= fsqrts_m;
556 if (code[feature_cntr++]) features |= isel_m;
557 if (code[feature_cntr++]) features |= lxarxeh_m;
558 if (code[feature_cntr++]) features |= cmpb_m;
559 //if(code[feature_cntr++])features |= mftgpr_m;
560 if (code[feature_cntr++]) features |= popcntb_m;
561 if (code[feature_cntr++]) features |= popcntw_m;
562 if (code[feature_cntr++]) features |= fcfids_m;
563 if (code[feature_cntr++]) features |= vand_m;
564 if (code[feature_cntr++]) features |= lqarx_m;
565 if (code[feature_cntr++]) features |= vcipher_m;
566 if (code[feature_cntr++]) features |= vpmsumb_m;
567 if (code[feature_cntr++]) features |= mfdscr_m;
568 if (code[feature_cntr++]) features |= vsx_m;
569 if (code[feature_cntr++]) features |= vshasig_m;
570
571 // Print the detection code.
572 if (PrintAssembly) {
573 ttyLocker ttyl;
574 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
575 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
576 }
577
578 _features = features;
579 }
580
581 // Power 8: Configure Data Stream Control Register.
582 void VM_Version::config_dscr() {
583 assert(has_lqarx(), "Only execute on Power 8 or later!");
584
585 // 7 InstWords for each call (function descriptor + blr instruction).
586 const int code_size = (2+2*7)*BytesPerInstWord;
587
588 // Allocate space for the code.
589 ResourceMark rm;
590 CodeBuffer cb("config_dscr", code_size, 0);
591 MacroAssembler* a = new MacroAssembler(&cb);
592
593 // Emit code.
594 uint64_t (*get_dscr)() = (uint64_t(*)())(void *)a->function_entry();
595 uint32_t *code = (uint32_t *)a->pc();
596 a->mfdscr(R3);
597 a->blr();
598
599 void (*set_dscr)(long) = (void(*)(long))(void *)a->function_entry();
600 a->mtdscr(R3);
601 a->blr();
602
603 uint32_t *code_end = (uint32_t *)a->pc();
604 a->flush();
605
606 // Print the detection code.
607 if (PrintAssembly) {
608 ttyLocker ttyl;
609 tty->print_cr("Decoding dscr configuration stub at " INTPTR_FORMAT " before execution:", p2i(code));
610 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
611 }
612
613 // Apply the configuration if needed.
614 _dscr_val = (*get_dscr)();
615 if (Verbose) {
616 tty->print_cr("dscr value was 0x%lx" , _dscr_val);
617 }
618 bool change_requested = false;
619 if (DSCR_PPC64 != (uintx)-1) {
620 _dscr_val = DSCR_PPC64;
621 change_requested = true;
622 }
623 if (DSCR_DPFD_PPC64 <= 7) {
624 uint64_t mask = 0x7;
625 if ((_dscr_val & mask) != DSCR_DPFD_PPC64) {
626 _dscr_val = (_dscr_val & ~mask) | (DSCR_DPFD_PPC64);
627 change_requested = true;
628 }
629 }
630 if (DSCR_URG_PPC64 <= 7) {
631 uint64_t mask = 0x7 << 6;
632 if ((_dscr_val & mask) != DSCR_DPFD_PPC64 << 6) {
633 _dscr_val = (_dscr_val & ~mask) | (DSCR_URG_PPC64 << 6);
634 change_requested = true;
635 }
636 }
637 if (change_requested) {
638 (*set_dscr)(_dscr_val);
639 if (Verbose) {
640 tty->print_cr("dscr was set to 0x%lx" , (*get_dscr)());
641 }
642 }
643 }
644
645 static int saved_features = 0;
646
647 void VM_Version::allow_all() {
648 saved_features = _features;
649 _features = all_features_m;
650 }
651
652 void VM_Version::revert() {
653 _features = saved_features;
654 }