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src/cpu/x86/vm/vm_version_x86.cpp

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rev 9055 : 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose


 577       UseCRC32Intrinsics = true;
 578     }
 579   } else if (UseCRC32Intrinsics) {
 580     if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
 581       warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
 582     FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
 583   }
 584 
 585   // The AES intrinsic stubs require AES instruction support (of course)
 586   // but also require sse3 mode for instructions it use.
 587   if (UseAES && (UseSSE > 2)) {
 588     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
 589       UseAESIntrinsics = true;
 590     }
 591   } else if (UseAESIntrinsics) {
 592     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 593       warning("AES intrinsics are not available on this CPU");
 594     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 595   }
 596 











 597   if (UseSHA) {
 598     warning("SHA instructions are not available on this CPU");
 599     FLAG_SET_DEFAULT(UseSHA, false);
 600   }
 601   if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
 602     warning("SHA intrinsics are not available on this CPU");
 603     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 604     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 605     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 606   }
 607 
 608   // Adjust RTM (Restricted Transactional Memory) flags
 609   if (!supports_rtm() && UseRTMLocking) {
 610     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 611     // setting during arguments processing. See use_biased_locking().
 612     // VM_Version_init() is executed after UseBiasedLocking is used
 613     // in Thread::allocate().
 614     vm_exit_during_initialization("RTM instructions are not available on this CPU");
 615   }
 616 




 577       UseCRC32Intrinsics = true;
 578     }
 579   } else if (UseCRC32Intrinsics) {
 580     if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
 581       warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
 582     FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
 583   }
 584 
 585   // The AES intrinsic stubs require AES instruction support (of course)
 586   // but also require sse3 mode for instructions it use.
 587   if (UseAES && (UseSSE > 2)) {
 588     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
 589       UseAESIntrinsics = true;
 590     }
 591   } else if (UseAESIntrinsics) {
 592     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 593       warning("AES intrinsics are not available on this CPU");
 594     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 595   }
 596 
 597   // GHASH/GCM intrinsics
 598   if (UseCLMUL && (UseSSE > 2)) {
 599     if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
 600       UseGHASHIntrinsics = true;
 601     }
 602   } else if (UseGHASHIntrinsics) {
 603     if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics))
 604       warning("GHASH intrinsic requires CLMUL and SSE2 instructions on this CPU");
 605     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 606   }
 607 
 608   if (UseSHA) {
 609     warning("SHA instructions are not available on this CPU");
 610     FLAG_SET_DEFAULT(UseSHA, false);
 611   }
 612   if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
 613     warning("SHA intrinsics are not available on this CPU");
 614     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 615     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 616     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 617   }
 618 
 619   // Adjust RTM (Restricted Transactional Memory) flags
 620   if (!supports_rtm() && UseRTMLocking) {
 621     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 622     // setting during arguments processing. See use_biased_locking().
 623     // VM_Version_init() is executed after UseBiasedLocking is used
 624     // in Thread::allocate().
 625     vm_exit_during_initialization("RTM instructions are not available on this CPU");
 626   }
 627 


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