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src/hotspot/cpu/aarch64/globals_aarch64.hpp

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rev 60012 : Fix jtreg failure compiler/vectorization/TestNaNVector.java
AArch64 UseSVE is also changed, as we will have both SVE1 and SVE2 in future.


  85                                                                         \
  86   product(bool, NearCpool, true,                                        \
  87          "constant pool is close to instructions")                      \
  88                                                                         \
  89   product(bool, UseBarriersForVolatile, false,                          \
  90           "Use memory barriers to implement volatile accesses")         \
  91   product(bool, UseNeon, false,                                         \
  92           "Use Neon for CRC32 computation")                             \
  93   product(bool, UseCRC32, false,                                        \
  94           "Use CRC32 instructions for CRC32 computation")               \
  95   product(bool, UseSIMDForMemoryOps, false,                             \
  96           "Use SIMD instructions in generated memory move code")        \
  97   product(bool, UseSIMDForArrayEquals, true,                            \
  98           "Use SIMD instructions in generated array equals code")       \
  99   product(bool, UseSimpleArrayEquals, false,                            \
 100           "Use simpliest and shortest implementation for array equals") \
 101   product(bool, AvoidUnalignedAccesses, false,                          \
 102           "Avoid generating unaligned memory accesses")                 \
 103   product(bool, UseLSE, false,                                          \
 104           "Use LSE instructions")                                       \



 105   product(bool, UseBlockZeroing, true,                                  \
 106           "Use DC ZVA for block zeroing")                               \
 107   product(intx, BlockZeroingLowLimit, 256,                              \
 108           "Minimum size in bytes when block zeroing will be used")      \
 109           range(1, max_jint)                                            \
 110   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
 111   product(int, SoftwarePrefetchHintDistance, -1,                        \
 112           "Use prfm hint with specified distance in compiled code."     \
 113           "Value -1 means off.")                                        \
 114           range(-1, 4096)
 115 
 116 #endif // CPU_AARCH64_GLOBALS_AARCH64_HPP


  85                                                                         \
  86   product(bool, NearCpool, true,                                        \
  87          "constant pool is close to instructions")                      \
  88                                                                         \
  89   product(bool, UseBarriersForVolatile, false,                          \
  90           "Use memory barriers to implement volatile accesses")         \
  91   product(bool, UseNeon, false,                                         \
  92           "Use Neon for CRC32 computation")                             \
  93   product(bool, UseCRC32, false,                                        \
  94           "Use CRC32 instructions for CRC32 computation")               \
  95   product(bool, UseSIMDForMemoryOps, false,                             \
  96           "Use SIMD instructions in generated memory move code")        \
  97   product(bool, UseSIMDForArrayEquals, true,                            \
  98           "Use SIMD instructions in generated array equals code")       \
  99   product(bool, UseSimpleArrayEquals, false,                            \
 100           "Use simpliest and shortest implementation for array equals") \
 101   product(bool, AvoidUnalignedAccesses, false,                          \
 102           "Avoid generating unaligned memory accesses")                 \
 103   product(bool, UseLSE, false,                                          \
 104           "Use LSE instructions")                                       \
 105   product(uint, UseSVE, 0,                                              \
 106           "Highest supported SVE instruction set version")              \
 107           range(0, 2)                                                   \
 108   product(bool, UseBlockZeroing, true,                                  \
 109           "Use DC ZVA for block zeroing")                               \
 110   product(intx, BlockZeroingLowLimit, 256,                              \
 111           "Minimum size in bytes when block zeroing will be used")      \
 112           range(1, max_jint)                                            \
 113   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
 114   product(int, SoftwarePrefetchHintDistance, -1,                        \
 115           "Use prfm hint with specified distance in compiled code."     \
 116           "Value -1 means off.")                                        \
 117           range(-1, 4096)
 118 
 119 #endif // CPU_AARCH64_GLOBALS_AARCH64_HPP
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