1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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23 */
24
25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
26 #define SHARE_VM_OPTO_CHAITIN_HPP
27
28 #include "code/vmreg.hpp"
29 #include "libadt/port.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "opto/connode.hpp"
32 #include "opto/live.hpp"
33 #include "opto/matcher.hpp"
34 #include "opto/phase.hpp"
35 #include "opto/regalloc.hpp"
36 #include "opto/regmask.hpp"
37 #include "opto/machnode.hpp"
38
39 class LoopTree;
40 class Matcher;
41 class PhaseCFG;
42 class PhaseLive;
43 class PhaseRegAlloc;
44 class PhaseChaitin;
45
46 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)
47 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)
48
49 //------------------------------LRG--------------------------------------------
50 // Live-RanGe structure.
51 class LRG : public ResourceObj {
52 friend class VMStructs;
53 public:
54 static const uint AllStack_size = 0xFFFFF; // This mask size is used to tell that the mask of this LRG supports stack positions
55 enum { SPILL_REG=29999 }; // Register number of a spilled LRG
56
57 double _cost; // 2 for loads/1 for stores times block freq
58 double _area; // Sum of all simultaneously live values
59 double score() const; // Compute score from cost and area
60 double _maxfreq; // Maximum frequency of any def or use
61
62 Node *_def; // Check for multi-def live ranges
63 #ifndef PRODUCT
64 GrowableArray<Node*>* _defs;
65 #endif
66
67 uint _risk_bias; // Index of LRG which we want to avoid color
68 uint _copy_bias; // Index of LRG which we want to share color
69
70 uint _next; // Index of next LRG in linked list
71 uint _prev; // Index of prev LRG in linked list
72 private:
73 uint _reg; // Chosen register; undefined if mask is plural
74 public:
75 // Return chosen register for this LRG. Error if the LRG is not bound to
76 // a single register.
77 OptoReg::Name reg() const { return OptoReg::Name(_reg); }
78 void set_reg( OptoReg::Name r ) { _reg = r; }
79
80 private:
81 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs
82 public:
83 int degree() const { assert( _degree_valid , "" ); return _eff_degree; }
84 // Degree starts not valid and any change to the IFG neighbor
85 // set makes it not valid.
86 void set_degree( uint degree ) {
87 _eff_degree = degree;
88 debug_only(_degree_valid = 1;)
89 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers");
90 }
91 // Made a change that hammered degree
92 void invalid_degree() { debug_only(_degree_valid=0;) }
93 // Incrementally modify degree. If it was correct, it should remain correct
94 void inc_degree( uint mod ) {
95 _eff_degree += mod;
96 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers");
97 }
98 // Compute the degree between 2 live ranges
99 int compute_degree( LRG &l ) const;
100 bool mask_is_nonempty_and_up() const {
101 return mask().is_UP() && mask_size();
102 }
103 bool is_float_or_vector() const {
104 return _is_float || _is_vector;
105 }
106
107 private:
108 RegMask _mask; // Allowed registers for this LRG
109 uint _mask_size; // cache of _mask.Size();
110 public:
111 int compute_mask_size() const { return _mask.is_AllStack() ? AllStack_size : _mask.Size(); }
112 void set_mask_size( int size ) {
113 assert((size == (int)AllStack_size) || (size == (int)_mask.Size()), "");
114 _mask_size = size;
115 #ifdef ASSERT
116 _msize_valid=1;
117 if (_is_vector) {
118 assert(!_fat_proj, "sanity");
119 _mask.verify_sets(_num_regs);
120 } else if (_num_regs == 2 && !_fat_proj) {
121 _mask.verify_pairs();
122 }
123 #endif
124 }
125 void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
126 int mask_size() const { assert( _msize_valid, "mask size not valid" );
127 return _mask_size; }
128 // Get the last mask size computed, even if it does not match the
129 // count of bits in the current mask.
130 int get_invalid_mask_size() const { return _mask_size; }
131 const RegMask &mask() const { return _mask; }
132 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
133 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
134 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
135 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }
136 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
137
138 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }
139 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }
140 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
141 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
142
143 // Number of registers this live range uses when it colors
144 private:
145 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else
146 // except _num_regs is kill count for fat_proj
147 public:
148 int num_regs() const { return _num_regs; }
149 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
150
151 private:
152 // Number of physical registers this live range uses when it colors
153 // Architecture and register-set dependent
154 uint8 _reg_pressure;
155 public:
156 void set_reg_pressure(int i) { _reg_pressure = i; }
157 int reg_pressure() const { return _reg_pressure; }
158
159 // How much 'wiggle room' does this live range have?
160 // How many color choices can it make (scaled by _num_regs)?
161 int degrees_of_freedom() const { return mask_size() - _num_regs; }
162 // Bound LRGs have ZERO degrees of freedom. We also count
163 // must_spill as bound.
164 bool is_bound () const { return _is_bound; }
165 // Negative degrees-of-freedom; even with no neighbors this
166 // live range must spill.
167 bool not_free() const { return degrees_of_freedom() < 0; }
168 // Is this live range of "low-degree"? Trivially colorable?
169 bool lo_degree () const { return degree() <= degrees_of_freedom(); }
170 // Is this live range just barely "low-degree"? Trivially colorable?
171 bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
172
173 uint _is_oop:1, // Live-range holds an oop
174 _is_float:1, // True if in float registers
175 _is_vector:1, // True if in vector registers
176 _was_spilled1:1, // True if prior spilling on def
177 _was_spilled2:1, // True if twice prior spilling on def
178 _is_bound:1, // live range starts life with no
179 // degrees of freedom.
180 _direct_conflict:1, // True if def and use registers in conflict
181 _must_spill:1, // live range has lost all degrees of freedom
182 // If _fat_proj is set, live range does NOT require aligned, adjacent
183 // registers and has NO interferences.
184 // If _fat_proj is clear, live range requires num_regs() to be a power of
185 // 2, and it requires registers to form an aligned, adjacent set.
186 _fat_proj:1, //
187 _was_lo:1, // Was lo-degree prior to coalesce
188 _msize_valid:1, // _mask_size cache valid
189 _degree_valid:1, // _degree cache valid
190 _has_copy:1, // Adjacent to some copy instruction
191 _at_risk:1; // Simplify says this guy is at risk to spill
192
193
194 // Alive if non-zero, dead if zero
195 bool alive() const { return _def != NULL; }
196 bool is_multidef() const { return _def == NodeSentinel; }
197 bool is_singledef() const { return _def != NodeSentinel; }
198
199 #ifndef PRODUCT
200 void dump( ) const;
201 #endif
202 };
203
204 //------------------------------IFG--------------------------------------------
205 // InterFerence Graph
206 // An undirected graph implementation. Created with a fixed number of
207 // vertices. Edges can be added & tested. Vertices can be removed, then
208 // added back later with all edges intact. Can add edges between one vertex
209 // and a list of other vertices. Can union vertices (and their edges)
210 // together. The IFG needs to be really really fast, and also fairly
211 // abstract! It needs abstraction so I can fiddle with the implementation to
212 // get even more speed.
213 class PhaseIFG : public Phase {
214 friend class VMStructs;
215 // Current implementation: a triangular adjacency list.
216
217 // Array of adjacency-lists, indexed by live-range number
218 IndexSet *_adjs;
219
220 // Assertion bit for proper use of Squaring
221 bool _is_square;
222
223 // Live range structure goes here
224 LRG *_lrgs; // Array of LRG structures
225
226 public:
227 // Largest live-range number
228 uint _maxlrg;
229
230 Arena *_arena;
231
232 // Keep track of inserted and deleted Nodes
233 VectorSet *_yanked;
234
235 PhaseIFG( Arena *arena );
236 void init( uint maxlrg );
237
238 // Add edge between a and b. Returns true if actually addded.
239 int add_edge( uint a, uint b );
240
241 // Add edge between a and everything in the vector
242 void add_vector( uint a, IndexSet *vec );
243
244 // Test for edge existance
245 int test_edge( uint a, uint b ) const;
246
247 // Square-up matrix for faster Union
248 void SquareUp();
249
250 // Return number of LRG neighbors
251 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
252 // Union edges of b into a on Squared-up matrix
253 void Union( uint a, uint b );
254 // Test for edge in Squared-up matrix
255 int test_edge_sq( uint a, uint b ) const;
256 // Yank a Node and all connected edges from the IFG. Be prepared to
257 // re-insert the yanked Node in reverse order of yanking. Return a
258 // list of neighbors (edges) yanked.
259 IndexSet *remove_node( uint a );
260 // Reinsert a yanked Node
261 void re_insert( uint a );
262 // Return set of neighbors
263 IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
264
265 #ifndef PRODUCT
266 // Dump the IFG
267 void dump() const;
268 void stats() const;
269 void verify( const PhaseChaitin * ) const;
270 #endif
271
272 //--------------- Live Range Accessors
273 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
274
275 // Compute and set effective degree. Might be folded into SquareUp().
276 void Compute_Effective_Degree();
277
278 // Compute effective degree as the sum of neighbors' _sizes.
279 int effective_degree( uint lidx ) const;
280 };
281
282 // The LiveRangeMap class is responsible for storing node to live range id mapping.
283 // Each node is mapped to a live range id (a virtual register). Nodes that are
284 // not considered for register allocation are given live range id 0.
285 class LiveRangeMap VALUE_OBJ_CLASS_SPEC {
286
287 private:
288
289 uint _max_lrg_id;
290
291 // Union-find map. Declared as a short for speed.
292 // Indexed by live-range number, it returns the compacted live-range number
293 LRG_List _uf_map;
294
295 // Map from Nodes to live ranges
296 LRG_List _names;
297
298 // Straight out of Tarjan's union-find algorithm
299 uint find_compress(const Node *node) {
300 uint lrg_id = find_compress(_names.at(node->_idx));
301 _names.at_put(node->_idx, lrg_id);
302 return lrg_id;
303 }
304
305 uint find_compress(uint lrg);
306
307 public:
308
309 const LRG_List& names() {
310 return _names;
311 }
312
313 uint max_lrg_id() const {
314 return _max_lrg_id;
315 }
316
317 void set_max_lrg_id(uint max_lrg_id) {
318 _max_lrg_id = max_lrg_id;
319 }
320
321 uint size() const {
322 return _names.length();
323 }
324
325 uint live_range_id(uint idx) const {
326 return _names.at(idx);
327 }
328
329 uint live_range_id(const Node *node) const {
330 return _names.at(node->_idx);
331 }
332
333 uint uf_live_range_id(uint lrg_id) const {
334 return _uf_map.at(lrg_id);
335 }
336
337 void map(uint idx, uint lrg_id) {
338 _names.at_put(idx, lrg_id);
339 }
340
341 void uf_map(uint dst_lrg_id, uint src_lrg_id) {
342 _uf_map.at_put(dst_lrg_id, src_lrg_id);
343 }
344
345 void extend(uint idx, uint lrg_id) {
346 _names.at_put_grow(idx, lrg_id);
347 }
348
349 void uf_extend(uint dst_lrg_id, uint src_lrg_id) {
350 _uf_map.at_put_grow(dst_lrg_id, src_lrg_id);
351 }
352
353 LiveRangeMap(Arena* arena, uint unique)
354 : _names(arena, unique, unique, 0)
355 , _uf_map(arena, unique, unique, 0)
356 , _max_lrg_id(0) {}
357
358 uint find_id( const Node *n ) {
359 uint retval = live_range_id(n);
360 assert(retval == find(n),"Invalid node to lidx mapping");
361 return retval;
362 }
363
364 // Reset the Union-Find map to identity
365 void reset_uf_map(uint max_lrg_id);
366
367 // Make all Nodes map directly to their final live range; no need for
368 // the Union-Find mapping after this call.
369 void compress_uf_map_for_nodes();
370
371 uint find(uint lidx) {
372 uint uf_lidx = _uf_map.at(lidx);
373 return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx);
374 }
375
376 // Convert a Node into a Live Range Index - a lidx
377 uint find(const Node *node) {
378 uint lidx = live_range_id(node);
379 uint uf_lidx = _uf_map.at(lidx);
380 return (uf_lidx == lidx) ? uf_lidx : find_compress(node);
381 }
382
383 // Like Find above, but no path compress, so bad asymptotic behavior
384 uint find_const(uint lrg) const;
385
386 // Like Find above, but no path compress, so bad asymptotic behavior
387 uint find_const(const Node *node) const {
388 if(node->_idx >= (uint)_names.length()) {
389 return 0; // not mapped, usual for debug dump
390 }
391 return find_const(_names.at(node->_idx));
392 }
393 };
394
395 //------------------------------Chaitin----------------------------------------
396 // Briggs-Chaitin style allocation, mostly.
397 class PhaseChaitin : public PhaseRegAlloc {
398 friend class VMStructs;
399
400 int _trip_cnt;
401 int _alternate;
402
403 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
404 PhaseLive *_live; // Liveness, used in the interference graph
405 PhaseIFG *_ifg; // Interference graph (for original chunk)
406 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill
407 VectorSet _spilled_once; // Nodes that have been spilled
408 VectorSet _spilled_twice; // Nodes that have been spilled twice
409
410 // Combine the Live Range Indices for these 2 Nodes into a single live
411 // range. Future requests for any Node in either live range will
412 // return the live range index for the combined live range.
413 void Union( const Node *src, const Node *dst );
414
415 void new_lrg( const Node *x, uint lrg );
416
417 // Compact live ranges, removing unused ones. Return new maxlrg.
418 void compact();
419
420 uint _lo_degree; // Head of lo-degree LRGs list
421 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list
422 uint _hi_degree; // Head of hi-degree LRGs list
423 uint _simplified; // Linked list head of simplified LRGs
424
425 // Helper functions for Split()
426 uint split_DEF(Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
427 uint split_USE(MachSpillCopyNode::SpillType spill_type, Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
428
429 //------------------------------clone_projs------------------------------------
430 // After cloning some rematerialized instruction, clone any MachProj's that
431 // follow it. Example: Intel zero is XOR, kills flags. Sparc FP constants
432 // use G3 as an address temp.
433 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id);
434
435 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, LiveRangeMap& lrg_map) {
436 uint max_lrg_id = lrg_map.max_lrg_id();
437 int found_projs = clone_projs(b, idx, orig, copy, max_lrg_id);
438 if (found_projs > 0) {
439 // max_lrg_id is updated during call above
440 lrg_map.set_max_lrg_id(max_lrg_id);
441 }
442 return found_projs;
443 }
444
445 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
446 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
447 // True if lidx is used before any real register is def'd in the block
448 bool prompt_use( Block *b, uint lidx );
449 Node *get_spillcopy_wide(MachSpillCopyNode::SpillType spill_type, Node *def, Node *use, uint uidx );
450 // Insert the spill at chosen location. Skip over any intervening Proj's or
451 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block
452 // instead. Update high-pressure indices. Create a new live range.
453 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
454
455 bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
456
457 uint _oldphi; // Node index which separates pre-allocation nodes
458
459 Block **_blks; // Array of blocks sorted by frequency for coalescing
460
461 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
462
463 #ifndef PRODUCT
464 bool _trace_spilling;
465 #endif
466
467 public:
468 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
469 ~PhaseChaitin() {}
470
471 LiveRangeMap _lrg_map;
472
473 // Do all the real work of allocate
474 void Register_Allocate();
475
476 float high_frequency_lrg() const { return _high_frequency_lrg; }
477
478 #ifndef PRODUCT
479 bool trace_spilling() const { return _trace_spilling; }
480 #endif
481
482 private:
483 // De-SSA the world. Assign registers to Nodes. Use the same register for
484 // all inputs to a PhiNode, effectively coalescing live ranges. Insert
485 // copies as needed.
486 void de_ssa();
487
488 // Add edge between reg and everything in the vector.
489 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
490 // information to trim the set of interferences. Return the
491 // count of edges added.
492 void interfere_with_live(uint lid, IndexSet* liveout);
493 #ifdef ASSERT
494 // Count register pressure for asserts
495 uint count_int_pressure(IndexSet* liveout);
496 uint count_float_pressure(IndexSet* liveout);
497 #endif
498
499 // Build the interference graph using virtual registers only.
500 // Used for aggressive coalescing.
501 void build_ifg_virtual( );
502
503 // used when computing the register pressure for each block in the CFG. This
504 // is done during IFG creation.
505 class Pressure {
506 // keeps track of the register pressure at the current
507 // instruction (used when stepping backwards in the block)
508 uint _current_pressure;
509
510 // keeps track of the instruction index of the first low to high register pressure
511 // transition (starting from the top) in the block
512 // if high_pressure_index == 0 then the whole block is high pressure
513 // if high_pressure_index = b.end_idx() + 1 then the whole block is low pressure
514 uint _high_pressure_index;
515
516 // stores the highest pressure we find
517 uint _final_pressure;
518
519 // number of live ranges that constitute high register pressure
520 const uint _high_pressure_limit;
521 public:
522
523 // lower the register pressure and look for a low to high pressure
524 // transition
525 void lower(LRG& lrg, uint& location) {
526 _current_pressure -= lrg.reg_pressure();
527 if (_current_pressure == _high_pressure_limit) {
528 _high_pressure_index = location;
529 }
530 }
531
532 // raise the pressure and store the pressure if it's the biggest
533 // pressure so far
534 void raise(LRG &lrg) {
535 _current_pressure += lrg.reg_pressure();
536 if (_current_pressure > _final_pressure) {
537 _final_pressure = _current_pressure;
538 }
539 }
540
541 uint high_pressure_index() const {
542 return _high_pressure_index;
543 }
544
545 uint final_pressure() const {
546 return _final_pressure;
547 }
548
549 uint current_pressure() const {
550 return _current_pressure;
551 }
552
553 uint high_pressure_limit() const {
554 return _high_pressure_limit;
555 }
556
557 void lower_high_pressure_index() {
558 _high_pressure_index--;
559 }
560
561 void set_high_pressure_index_to_block_start() {
562 _high_pressure_index = 0;
563 }
564
565 void check_pressure_at_fatproj(uint fatproj_location, RegMask& fatproj_mask) {
566 // this pressure is only valid at this instruction, i.e. we don't need to lower
567 // the register pressure since the fat proj was never live before (going backwards)
568 uint new_pressure = current_pressure() + fatproj_mask.Size();
569 if (new_pressure > final_pressure()) {
570 _final_pressure = new_pressure;
571 }
572
573 // if we were at a low pressure and now and the fat proj is at high pressure, record the fat proj location
574 // as coming from a low to high (to low again)
575 if (current_pressure() <= high_pressure_limit() && new_pressure > high_pressure_limit()) {
576 _high_pressure_index = fatproj_location;
577 }
578 }
579
580 Pressure(uint high_pressure_index, uint high_pressure_limit)
581 : _current_pressure(0)
582 , _high_pressure_index(high_pressure_index)
583 , _high_pressure_limit(high_pressure_limit)
584 , _final_pressure(0) {}
585 };
586
587 void lower_pressure(Block* b, uint location, LRG& lrg, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure);
588 void raise_pressure(Block* b, LRG& lrg, Pressure& int_pressure, Pressure& float_pressure);
589 void check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const int op_regtype);
590 void add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure);
591 void compute_initial_block_pressure(Block* b, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure, double cost);
592 bool remove_node_if_not_used(Block* b, uint location, Node* n, uint lid, IndexSet* liveout);
593 void assign_high_score_to_immediate_copies(Block* b, Node* n, LRG& lrg, uint next_inst, uint last_inst);
594 void remove_interference_from_copy(Block* b, uint location, uint lid_copy, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure);
595 void remove_bound_register_from_interfering_live_ranges(LRG& lrg, IndexSet* liveout, uint& must_spill);
596 void check_for_high_pressure_block(Pressure& pressure);
597 void adjust_high_pressure_index(Block* b, uint& hrp_index, Pressure& pressure);
598
599 // Build the interference graph using physical registers when available.
600 // That is, if 2 live ranges are simultaneously alive but in their
601 // acceptable register sets do not overlap, then they do not interfere.
602 uint build_ifg_physical( ResourceArea *a );
603
604 // Gather LiveRanGe information, including register masks and base pointer/
605 // derived pointer relationships.
606 void gather_lrg_masks( bool mod_cisc_masks );
607
608 // Force the bases of derived pointers to be alive at GC points.
609 bool stretch_base_pointer_live_ranges( ResourceArea *a );
610 // Helper to stretch above; recursively discover the base Node for
611 // a given derived Node. Easy for AddP-related machine nodes, but
612 // needs to be recursive for derived Phis.
613 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
614
615 // Set the was-lo-degree bit. Conservative coalescing should not change the
616 // colorability of the graph. If any live range was of low-degree before
617 // coalescing, it should Simplify. This call sets the was-lo-degree bit.
618 void set_was_low();
619
620 // Split live-ranges that must spill due to register conflicts (as opposed
621 // to capacity spills). Typically these are things def'd in a register
622 // and used on the stack or vice-versa.
623 void pre_spill();
624
625 // Init LRG caching of degree, numregs. Init lo_degree list.
626 void cache_lrg_info( );
627
628 // Simplify the IFG by removing LRGs of low degree with no copies
629 void Pre_Simplify();
630
631 // Simplify the IFG by removing LRGs of low degree
632 void Simplify();
633
634 // Select colors by re-inserting edges into the IFG.
635 // Return TRUE if any spills occurred.
636 uint Select( );
637 // Helper function for select which allows biased coloring
638 OptoReg::Name choose_color( LRG &lrg, int chunk );
639 // Helper function which implements biasing heuristic
640 OptoReg::Name bias_color( LRG &lrg, int chunk );
641
642 // Split uncolorable live ranges
643 // Return new number of live ranges
644 uint Split(uint maxlrg, ResourceArea* split_arena);
645
646 // Copy 'was_spilled'-edness from one Node to another.
647 void copy_was_spilled( Node *src, Node *dst );
648 // Set the 'spilled_once' or 'spilled_twice' flag on a node.
649 void set_was_spilled( Node *n );
650
651 // Convert ideal spill-nodes into machine loads & stores
652 // Set C->failing when fixup spills could not complete, node limit exceeded.
653 void fixup_spills();
654
655 // Post-Allocation peephole copy removal
656 void post_allocate_copy_removal();
657 Node *skip_copies( Node *c );
658 // Replace the old node with the current live version of that value
659 // and yank the old value if it's dead.
660 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
661 Block *current_block, Node_List& value, Node_List& regnd ) {
662 Node* v = regnd[nreg];
663 assert(v->outcnt() != 0, "no dead values");
664 old->replace_by(v);
665 return yank_if_dead(old, current_block, &value, ®nd);
666 }
667
668 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
669 return yank_if_dead_recurse(old, old, current_block, value, regnd);
670 }
671 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
672 Node_List *value, Node_List *regnd);
673 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
674 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs );
675 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd );
676 bool may_be_copy_of_callee( Node *def ) const;
677
678 // If nreg already contains the same constant as val then eliminate it
679 bool eliminate_copy_of_constant(Node* val, Node* n,
680 Block *current_block, Node_List& value, Node_List ®nd,
681 OptoReg::Name nreg, OptoReg::Name nreg2);
682 // Extend the node to LRG mapping
683 void add_reference( const Node *node, const Node *old_node);
684
685 private:
686
687 static int _final_loads, _final_stores, _final_copies, _final_memoves;
688 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
689 static int _conserv_coalesce, _conserv_coalesce_pair;
690 static int _conserv_coalesce_trie, _conserv_coalesce_quad;
691 static int _post_alloc;
692 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
693 static int _used_cisc_instructions, _unused_cisc_instructions;
694 static int _allocator_attempts, _allocator_successes;
695
696 #ifndef PRODUCT
697 static uint _high_pressure, _low_pressure;
698
699 void dump() const;
700 void dump( const Node *n ) const;
701 void dump( const Block * b ) const;
702 void dump_degree_lists() const;
703 void dump_simplified() const;
704 void dump_lrg( uint lidx, bool defs_only) const;
705 void dump_lrg( uint lidx) const {
706 // dump defs and uses by default
707 dump_lrg(lidx, false);
708 }
709 void dump_bb( uint pre_order ) const;
710
711 // Verify that base pointers and derived pointers are still sane
712 void verify_base_ptrs( ResourceArea *a ) const;
713
714 void verify( ResourceArea *a, bool verify_ifg = false ) const;
715
716 void dump_for_spill_split_recycle() const;
717
718 public:
719 void dump_frame() const;
720 char *dump_register( const Node *n, char *buf ) const;
721 private:
722 static void print_chaitin_statistics();
723 #endif
724 friend class PhaseCoalesce;
725 friend class PhaseAggressiveCoalesce;
726 friend class PhaseConservativeCoalesce;
727 };
728
729 #endif // SHARE_VM_OPTO_CHAITIN_HPP