src/share/vm/adlc/archDesc.cpp
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src/share/vm/adlc/archDesc.cpp

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rev 7385 : 8075798: Allow ADLC register class to depend on runtime conditions also for cisc-spillable classes
Summary: Introduce a new register class, reg_class_dynamic, that supports also cist-spillable masks.
Reviewed-by: kvn, dlong, roland


 917 
 918   if (reg_mask_name == NULL) {
 919      syntax_err(opForm._linenum,
 920                 "Did not find reg_mask for opForm: %s",
 921                 opForm._ident);
 922      abort();
 923   }
 924 
 925   const char *stack_or = "STACK_OR_";
 926   int   length         = (int)strlen(stack_or) + (int)strlen(reg_mask_name) + 1;
 927   char *result         = new char[length];
 928   sprintf(result,"%s%s", stack_or, reg_mask_name);
 929 
 930   return result;
 931 }
 932 
 933 // Record that the register class must generate a stack_or_reg_mask
 934 void ArchDesc::set_stack_or_reg(const char *reg_class_name) {
 935   if( _register ) {
 936     RegClass *reg_class  = _register->getRegClass(reg_class_name);
 937     reg_class->_stack_or_reg = true;
 938   }
 939 }
 940 
 941 
 942 // Return the type signature for the ideal operation
 943 const char *ArchDesc::getIdealType(const char *idealOp) {
 944   // Find last character in idealOp, it specifies the type
 945   char  last_char = 0;
 946   const char *ptr = idealOp;
 947   for (; *ptr != '\0'; ++ptr) {
 948     last_char = *ptr;
 949   }
 950 
 951   // Match Vector types.
 952   if (strncmp(idealOp, "Vec",3)==0) {
 953     switch(last_char) {
 954     case 'S':  return "TypeVect::VECTS";
 955     case 'D':  return "TypeVect::VECTD";
 956     case 'X':  return "TypeVect::VECTX";
 957     case 'Y':  return "TypeVect::VECTY";




 917 
 918   if (reg_mask_name == NULL) {
 919      syntax_err(opForm._linenum,
 920                 "Did not find reg_mask for opForm: %s",
 921                 opForm._ident);
 922      abort();
 923   }
 924 
 925   const char *stack_or = "STACK_OR_";
 926   int   length         = (int)strlen(stack_or) + (int)strlen(reg_mask_name) + 1;
 927   char *result         = new char[length];
 928   sprintf(result,"%s%s", stack_or, reg_mask_name);
 929 
 930   return result;
 931 }
 932 
 933 // Record that the register class must generate a stack_or_reg_mask
 934 void ArchDesc::set_stack_or_reg(const char *reg_class_name) {
 935   if( _register ) {
 936     RegClass *reg_class  = _register->getRegClass(reg_class_name);
 937     reg_class->set_stack_version(true);
 938   }
 939 }
 940 
 941 
 942 // Return the type signature for the ideal operation
 943 const char *ArchDesc::getIdealType(const char *idealOp) {
 944   // Find last character in idealOp, it specifies the type
 945   char  last_char = 0;
 946   const char *ptr = idealOp;
 947   for (; *ptr != '\0'; ++ptr) {
 948     last_char = *ptr;
 949   }
 950 
 951   // Match Vector types.
 952   if (strncmp(idealOp, "Vec",3)==0) {
 953     switch(last_char) {
 954     case 'S':  return "TypeVect::VECTS";
 955     case 'D':  return "TypeVect::VECTD";
 956     case 'X':  return "TypeVect::VECTX";
 957     case 'Y':  return "TypeVect::VECTY";


src/share/vm/adlc/archDesc.cpp
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