338 }
339 }
340
341 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
342 Register thread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
343 NOT_LP64(get_thread(thread);)
344 movptr(rcx, Address(thread, JavaThread::jvmti_thread_state_offset()));
345 const Address tos_addr(rcx, JvmtiThreadState::earlyret_tos_offset());
346 const Address oop_addr(rcx, JvmtiThreadState::earlyret_oop_offset());
347 const Address val_addr(rcx, JvmtiThreadState::earlyret_value_offset());
348 #ifdef _LP64
349 switch (state) {
350 case atos: movptr(rax, oop_addr);
351 movptr(oop_addr, (int32_t)NULL_WORD);
352 verify_oop(rax, state); break;
353 case ltos: movptr(rax, val_addr); break;
354 case btos: // fall through
355 case ctos: // fall through
356 case stos: // fall through
357 case itos: movl(rax, val_addr); break;
358 case ftos: movflt(xmm0, val_addr); break;
359 case dtos: movdbl(xmm0, val_addr); break;
360 case vtos: /* nothing to do */ break;
361 default : ShouldNotReachHere();
362 }
363 // Clean up tos value in the thread object
364 movl(tos_addr, (int) ilgl);
365 movl(val_addr, (int32_t) NULL_WORD);
366 #else
367 const Address val_addr1(rcx, JvmtiThreadState::earlyret_value_offset()
368 + in_ByteSize(wordSize));
369 switch (state) {
370 case atos: movptr(rax, oop_addr);
371 movptr(oop_addr, NULL_WORD);
372 verify_oop(rax, state); break;
373 case ltos:
374 movl(rdx, val_addr1); // fall through
375 case btos: // fall through
376 case ctos: // fall through
377 case stos: // fall through
378 case itos: movl(rax, val_addr); break;
379 case ftos: fld_s(val_addr); break;
380 case dtos: fld_d(val_addr); break;
381 case vtos: /* nothing to do */ break;
382 default : ShouldNotReachHere();
383 }
384 #endif // _LP64
385 // Clean up tos value in the thread object
386 movl(tos_addr, (int32_t) ilgl);
387 movptr(val_addr, NULL_WORD);
388 NOT_LP64(movptr(val_addr1, NULL_WORD);)
389 }
390
391
392 void InterpreterMacroAssembler::check_and_handle_earlyret(Register java_thread) {
393 if (JvmtiExport::can_force_early_return()) {
394 Label L;
395 Register tmp = LP64_ONLY(c_rarg0) NOT_LP64(java_thread);
396 Register rthread = LP64_ONLY(r15_thread) NOT_LP64(java_thread);
397
398 movptr(tmp, Address(rthread, JavaThread::jvmti_thread_state_offset()));
399 testptr(tmp, tmp);
400 jcc(Assembler::zero, L); // if (thread->jvmti_thread_state() == NULL) exit;
561 fstp_d(Address(rsp, 0));
562 fld_d(Address(rsp, 0));
563 }
564 }
565 #endif // _LP64
566
567 // Java Expression Stack
568
569 void InterpreterMacroAssembler::pop_ptr(Register r) {
570 pop(r);
571 }
572
573 void InterpreterMacroAssembler::push_ptr(Register r) {
574 push(r);
575 }
576
577 void InterpreterMacroAssembler::push_i(Register r) {
578 push(r);
579 }
580
581 #ifdef _LP64
582 void InterpreterMacroAssembler::pop_i(Register r) {
583 // XXX can't use pop currently, upper half non clean
584 movl(r, Address(rsp, 0));
585 addptr(rsp, wordSize);
586 }
587
588 void InterpreterMacroAssembler::pop_l(Register r) {
589 movq(r, Address(rsp, 0));
590 addptr(rsp, 2 * Interpreter::stackElementSize);
591 }
592
593 void InterpreterMacroAssembler::pop_f(XMMRegister r) {
594 movflt(r, Address(rsp, 0));
595 addptr(rsp, wordSize);
596 }
597
598 void InterpreterMacroAssembler::pop_d(XMMRegister r) {
599 movdbl(r, Address(rsp, 0));
600 addptr(rsp, 2 * Interpreter::stackElementSize);
601 }
602
603 void InterpreterMacroAssembler::push_l(Register r) {
604 subptr(rsp, 2 * wordSize);
605 movq(Address(rsp, 0), r);
606 }
607
608 void InterpreterMacroAssembler::push_f(XMMRegister r) {
609 subptr(rsp, wordSize);
610 movflt(Address(rsp, 0), r);
611 }
612
613 void InterpreterMacroAssembler::push_d(XMMRegister r) {
614 subptr(rsp, 2 * wordSize);
615 movdbl(Address(rsp, 0), r);
616 }
617
618 void InterpreterMacroAssembler::pop(TosState state) {
619 switch (state) {
620 case atos: pop_ptr(); break;
621 case btos:
622 case ctos:
623 case stos:
624 case itos: pop_i(); break;
625 case ltos: pop_l(); break;
626 case ftos: pop_f(); break;
627 case dtos: pop_d(); break;
628 case vtos: /* nothing to do */ break;
629 default: ShouldNotReachHere();
630 }
631 verify_oop(rax, state);
632 }
633
634 void InterpreterMacroAssembler::push(TosState state) {
635 verify_oop(rax, state);
636 switch (state) {
637 case atos: push_ptr(); break;
638 case btos:
639 case ctos:
640 case stos:
641 case itos: push_i(); break;
642 case ltos: push_l(); break;
643 case ftos: push_f(); break;
644 case dtos: push_d(); break;
645 case vtos: /* nothing to do */ break;
646 default : ShouldNotReachHere();
647 }
648 }
649 #else
650 void InterpreterMacroAssembler::pop_i(Register r) {
651 pop(r);
652 }
653
654 void InterpreterMacroAssembler::pop_l(Register lo, Register hi) {
655 pop(lo);
656 pop(hi);
657 }
658
659 void InterpreterMacroAssembler::pop_f() {
660 fld_s(Address(rsp, 0));
661 addptr(rsp, 1 * wordSize);
662 }
663
664 void InterpreterMacroAssembler::pop_d() {
665 fld_d(Address(rsp, 0));
666 addptr(rsp, 2 * wordSize);
667 }
668
669
670 void InterpreterMacroAssembler::pop(TosState state) {
671 switch (state) {
672 case atos: pop_ptr(rax); break;
673 case btos: // fall through
674 case ctos: // fall through
675 case stos: // fall through
676 case itos: pop_i(rax); break;
677 case ltos: pop_l(rax, rdx); break;
678 case ftos: pop_f(); break;
679 case dtos: pop_d(); break;
680 case vtos: /* nothing to do */ break;
681 default : ShouldNotReachHere();
682 }
683 verify_oop(rax, state);
684 }
685
686
687 void InterpreterMacroAssembler::push_l(Register lo, Register hi) {
688 push(hi);
689 push(lo);
690 }
691
692 void InterpreterMacroAssembler::push_f() {
693 // Do not schedule for no AGI! Never write beyond rsp!
694 subptr(rsp, 1 * wordSize);
695 fstp_s(Address(rsp, 0));
696 }
697
698 void InterpreterMacroAssembler::push_d(Register r) {
699 // Do not schedule for no AGI! Never write beyond rsp!
700 subptr(rsp, 2 * wordSize);
701 fstp_d(Address(rsp, 0));
702 }
703
704
705 void InterpreterMacroAssembler::push(TosState state) {
706 verify_oop(rax, state);
707 switch (state) {
708 case atos: push_ptr(rax); break;
709 case btos: // fall through
710 case ctos: // fall through
711 case stos: // fall through
712 case itos: push_i(rax); break;
713 case ltos: push_l(rax, rdx); break;
714 case ftos: push_f(); break;
715 case dtos: push_d(rax); break;
716 case vtos: /* nothing to do */ break;
717 default : ShouldNotReachHere();
718 }
719 }
720 #endif // _LP64
721
722
723 // Helpers for swap and dup
724 void InterpreterMacroAssembler::load_ptr(int n, Register val) {
725 movptr(val, Address(rsp, Interpreter::expr_offset_in_bytes(n)));
726 }
727
728 void InterpreterMacroAssembler::store_ptr(int n, Register val) {
729 movptr(Address(rsp, Interpreter::expr_offset_in_bytes(n)), val);
730 }
731
732
733 void InterpreterMacroAssembler::prepare_to_jump_from_interpreted() {
734 // set sender sp
735 lea(_bcp_register, Address(rsp, wordSize));
978 cmpptr(rmon, rbx); // check if bottom reached
979 jcc(Assembler::notEqual, loop); // if not at bottom then check this entry
980 }
981
982 bind(no_unlock);
983
984 // jvmti support
985 if (notify_jvmdi) {
986 notify_method_exit(state, NotifyJVMTI); // preserve TOSCA
987 } else {
988 notify_method_exit(state, SkipNotifyJVMTI); // preserve TOSCA
989 }
990
991 // remove activation
992 // get sender sp
993 movptr(rbx,
994 Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize));
995 leave(); // remove frame anchor
996 pop(ret_addr); // get return address
997 mov(rsp, rbx); // set sp to sender sp
998 #ifndef _LP64
999 if (UseSSE) {
1000 // float and double are returned in xmm register in SSE-mode
1001 if (state == ftos && UseSSE >= 1) {
1002 subptr(rsp, wordSize);
1003 fstp_s(Address(rsp, 0));
1004 movflt(xmm0, Address(rsp, 0));
1005 addptr(rsp, wordSize);
1006 } else if (state == dtos && UseSSE >= 2) {
1007 subptr(rsp, 2*wordSize);
1008 fstp_d(Address(rsp, 0));
1009 movdbl(xmm0, Address(rsp, 0));
1010 addptr(rsp, 2*wordSize);
1011 }
1012 }
1013 #endif // _LP64
1014 }
1015 #endif // !CC_INTERP
1016
1017 void InterpreterMacroAssembler::get_method_counters(Register method,
1018 Register mcs, Label& skip) {
1019 Label has_counters;
1020 movptr(mcs, Address(method, Method::method_counters_offset()));
1021 testptr(mcs, mcs);
1022 jcc(Assembler::notZero, has_counters);
1023 call_VM(noreg, CAST_FROM_FN_PTR(address,
1024 InterpreterRuntime::build_method_counters), method);
1025 movptr(mcs, Address(method,Method::method_counters_offset()));
1026 testptr(mcs, mcs);
1027 jcc(Assembler::zero, skip); // No MethodCounters allocated, OutOfMemory
1028 bind(has_counters);
1029 }
1030
1031
1032 // Lock object
1033 //
1766 // The method data pointer needs to be updated.
1767 update_mdp_by_offset(mdp,
1768 index,
1769 in_bytes(MultiBranchData::
1770 relative_displacement_offset()));
1771
1772 bind(profile_continue);
1773 }
1774 }
1775
1776
1777
1778 void InterpreterMacroAssembler::verify_oop(Register reg, TosState state) {
1779 if (state == atos) {
1780 MacroAssembler::verify_oop(reg);
1781 }
1782 }
1783
1784 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
1785 #ifndef _LP64
1786 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
1787 #endif
1788 }
1789
1790 // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
1791 void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
1792 int increment, Address mask,
1793 Register scratch, bool preloaded,
1794 Condition cond, Label* where) {
1795 if (!preloaded) {
1796 movl(scratch, counter_addr);
1797 }
1798 incrementl(scratch, increment);
1799 movl(counter_addr, scratch);
1800 andl(scratch, mask);
1801 jcc(cond, *where);
1802 }
1803 #endif // CC_INTERP
1804
1805 void InterpreterMacroAssembler::notify_method_entry() {
1806 // Whenever JVMTI is interp_only_mode, method entry/exit events are sent to
|
338 }
339 }
340
341 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
342 Register thread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
343 NOT_LP64(get_thread(thread);)
344 movptr(rcx, Address(thread, JavaThread::jvmti_thread_state_offset()));
345 const Address tos_addr(rcx, JvmtiThreadState::earlyret_tos_offset());
346 const Address oop_addr(rcx, JvmtiThreadState::earlyret_oop_offset());
347 const Address val_addr(rcx, JvmtiThreadState::earlyret_value_offset());
348 #ifdef _LP64
349 switch (state) {
350 case atos: movptr(rax, oop_addr);
351 movptr(oop_addr, (int32_t)NULL_WORD);
352 verify_oop(rax, state); break;
353 case ltos: movptr(rax, val_addr); break;
354 case btos: // fall through
355 case ctos: // fall through
356 case stos: // fall through
357 case itos: movl(rax, val_addr); break;
358 case ftos: load_float(val_addr); break;
359 case dtos: load_double(val_addr); break;
360 case vtos: /* nothing to do */ break;
361 default : ShouldNotReachHere();
362 }
363 // Clean up tos value in the thread object
364 movl(tos_addr, (int) ilgl);
365 movl(val_addr, (int32_t) NULL_WORD);
366 #else
367 const Address val_addr1(rcx, JvmtiThreadState::earlyret_value_offset()
368 + in_ByteSize(wordSize));
369 switch (state) {
370 case atos: movptr(rax, oop_addr);
371 movptr(oop_addr, NULL_WORD);
372 verify_oop(rax, state); break;
373 case ltos:
374 movl(rdx, val_addr1); // fall through
375 case btos: // fall through
376 case ctos: // fall through
377 case stos: // fall through
378 case itos: movl(rax, val_addr); break;
379 case ftos: load_float(val_addr); break;
380 case dtos: load_double(val_addr); break;
381 case vtos: /* nothing to do */ break;
382 default : ShouldNotReachHere();
383 }
384 #endif // _LP64
385 // Clean up tos value in the thread object
386 movl(tos_addr, (int32_t) ilgl);
387 movptr(val_addr, NULL_WORD);
388 NOT_LP64(movptr(val_addr1, NULL_WORD);)
389 }
390
391
392 void InterpreterMacroAssembler::check_and_handle_earlyret(Register java_thread) {
393 if (JvmtiExport::can_force_early_return()) {
394 Label L;
395 Register tmp = LP64_ONLY(c_rarg0) NOT_LP64(java_thread);
396 Register rthread = LP64_ONLY(r15_thread) NOT_LP64(java_thread);
397
398 movptr(tmp, Address(rthread, JavaThread::jvmti_thread_state_offset()));
399 testptr(tmp, tmp);
400 jcc(Assembler::zero, L); // if (thread->jvmti_thread_state() == NULL) exit;
561 fstp_d(Address(rsp, 0));
562 fld_d(Address(rsp, 0));
563 }
564 }
565 #endif // _LP64
566
567 // Java Expression Stack
568
569 void InterpreterMacroAssembler::pop_ptr(Register r) {
570 pop(r);
571 }
572
573 void InterpreterMacroAssembler::push_ptr(Register r) {
574 push(r);
575 }
576
577 void InterpreterMacroAssembler::push_i(Register r) {
578 push(r);
579 }
580
581 void InterpreterMacroAssembler::push_f(XMMRegister r) {
582 subptr(rsp, wordSize);
583 movflt(Address(rsp, 0), r);
584 }
585
586 void InterpreterMacroAssembler::pop_f(XMMRegister r) {
587 movflt(r, Address(rsp, 0));
588 addptr(rsp, wordSize);
589 }
590
591 void InterpreterMacroAssembler::push_d(XMMRegister r) {
592 subptr(rsp, 2 * wordSize);
593 movdbl(Address(rsp, 0), r);
594 }
595
596 void InterpreterMacroAssembler::pop_d(XMMRegister r) {
597 movdbl(r, Address(rsp, 0));
598 addptr(rsp, 2 * Interpreter::stackElementSize);
599 }
600
601 #ifdef _LP64
602 void InterpreterMacroAssembler::pop_i(Register r) {
603 // XXX can't use pop currently, upper half non clean
604 movl(r, Address(rsp, 0));
605 addptr(rsp, wordSize);
606 }
607
608 void InterpreterMacroAssembler::pop_l(Register r) {
609 movq(r, Address(rsp, 0));
610 addptr(rsp, 2 * Interpreter::stackElementSize);
611 }
612
613 void InterpreterMacroAssembler::push_l(Register r) {
614 subptr(rsp, 2 * wordSize);
615 movq(Address(rsp, 0), r);
616 }
617
618 void InterpreterMacroAssembler::pop(TosState state) {
619 switch (state) {
620 case atos: pop_ptr(); break;
621 case btos:
622 case ctos:
623 case stos:
624 case itos: pop_i(); break;
625 case ltos: pop_l(); break;
626 case ftos: pop_f(xmm0); break;
627 case dtos: pop_d(xmm0); break;
628 case vtos: /* nothing to do */ break;
629 default: ShouldNotReachHere();
630 }
631 verify_oop(rax, state);
632 }
633
634 void InterpreterMacroAssembler::push(TosState state) {
635 verify_oop(rax, state);
636 switch (state) {
637 case atos: push_ptr(); break;
638 case btos:
639 case ctos:
640 case stos:
641 case itos: push_i(); break;
642 case ltos: push_l(); break;
643 case ftos: push_f(xmm0); break;
644 case dtos: push_d(xmm0); break;
645 case vtos: /* nothing to do */ break;
646 default : ShouldNotReachHere();
647 }
648 }
649 #else
650 void InterpreterMacroAssembler::pop_i(Register r) {
651 pop(r);
652 }
653
654 void InterpreterMacroAssembler::pop_l(Register lo, Register hi) {
655 pop(lo);
656 pop(hi);
657 }
658
659 void InterpreterMacroAssembler::pop_f() {
660 fld_s(Address(rsp, 0));
661 addptr(rsp, 1 * wordSize);
662 }
663
664 void InterpreterMacroAssembler::pop_d() {
665 fld_d(Address(rsp, 0));
666 addptr(rsp, 2 * wordSize);
667 }
668
669
670 void InterpreterMacroAssembler::pop(TosState state) {
671 switch (state) {
672 case atos: pop_ptr(rax); break;
673 case btos: // fall through
674 case ctos: // fall through
675 case stos: // fall through
676 case itos: pop_i(rax); break;
677 case ltos: pop_l(rax, rdx); break;
678 case ftos:
679 if (UseSSE >= 1) {
680 pop_f(xmm0);
681 } else {
682 pop_f();
683 }
684 break;
685 case dtos:
686 if (UseSSE >= 2) {
687 pop_d(xmm0);
688 } else {
689 pop_d();
690 }
691 break;
692 case vtos: /* nothing to do */ break;
693 default : ShouldNotReachHere();
694 }
695 verify_oop(rax, state);
696 }
697
698
699 void InterpreterMacroAssembler::push_l(Register lo, Register hi) {
700 push(hi);
701 push(lo);
702 }
703
704 void InterpreterMacroAssembler::push_f() {
705 // Do not schedule for no AGI! Never write beyond rsp!
706 subptr(rsp, 1 * wordSize);
707 fstp_s(Address(rsp, 0));
708 }
709
710 void InterpreterMacroAssembler::push_d() {
711 // Do not schedule for no AGI! Never write beyond rsp!
712 subptr(rsp, 2 * wordSize);
713 fstp_d(Address(rsp, 0));
714 }
715
716
717 void InterpreterMacroAssembler::push(TosState state) {
718 verify_oop(rax, state);
719 switch (state) {
720 case atos: push_ptr(rax); break;
721 case btos: // fall through
722 case ctos: // fall through
723 case stos: // fall through
724 case itos: push_i(rax); break;
725 case ltos: push_l(rax, rdx); break;
726 case ftos:
727 if (UseSSE >= 1) {
728 push_f(xmm0);
729 } else {
730 push_f();
731 }
732 break;
733 case dtos:
734 if (UseSSE >= 2) {
735 push_d(xmm0);
736 } else {
737 push_d();
738 }
739 break;
740 case vtos: /* nothing to do */ break;
741 default : ShouldNotReachHere();
742 }
743 }
744 #endif // _LP64
745
746
747 // Helpers for swap and dup
748 void InterpreterMacroAssembler::load_ptr(int n, Register val) {
749 movptr(val, Address(rsp, Interpreter::expr_offset_in_bytes(n)));
750 }
751
752 void InterpreterMacroAssembler::store_ptr(int n, Register val) {
753 movptr(Address(rsp, Interpreter::expr_offset_in_bytes(n)), val);
754 }
755
756
757 void InterpreterMacroAssembler::prepare_to_jump_from_interpreted() {
758 // set sender sp
759 lea(_bcp_register, Address(rsp, wordSize));
1002 cmpptr(rmon, rbx); // check if bottom reached
1003 jcc(Assembler::notEqual, loop); // if not at bottom then check this entry
1004 }
1005
1006 bind(no_unlock);
1007
1008 // jvmti support
1009 if (notify_jvmdi) {
1010 notify_method_exit(state, NotifyJVMTI); // preserve TOSCA
1011 } else {
1012 notify_method_exit(state, SkipNotifyJVMTI); // preserve TOSCA
1013 }
1014
1015 // remove activation
1016 // get sender sp
1017 movptr(rbx,
1018 Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize));
1019 leave(); // remove frame anchor
1020 pop(ret_addr); // get return address
1021 mov(rsp, rbx); // set sp to sender sp
1022 }
1023 #endif // !CC_INTERP
1024
1025 void InterpreterMacroAssembler::get_method_counters(Register method,
1026 Register mcs, Label& skip) {
1027 Label has_counters;
1028 movptr(mcs, Address(method, Method::method_counters_offset()));
1029 testptr(mcs, mcs);
1030 jcc(Assembler::notZero, has_counters);
1031 call_VM(noreg, CAST_FROM_FN_PTR(address,
1032 InterpreterRuntime::build_method_counters), method);
1033 movptr(mcs, Address(method,Method::method_counters_offset()));
1034 testptr(mcs, mcs);
1035 jcc(Assembler::zero, skip); // No MethodCounters allocated, OutOfMemory
1036 bind(has_counters);
1037 }
1038
1039
1040 // Lock object
1041 //
1774 // The method data pointer needs to be updated.
1775 update_mdp_by_offset(mdp,
1776 index,
1777 in_bytes(MultiBranchData::
1778 relative_displacement_offset()));
1779
1780 bind(profile_continue);
1781 }
1782 }
1783
1784
1785
1786 void InterpreterMacroAssembler::verify_oop(Register reg, TosState state) {
1787 if (state == atos) {
1788 MacroAssembler::verify_oop(reg);
1789 }
1790 }
1791
1792 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
1793 #ifndef _LP64
1794 if ((state == ftos && UseSSE < 1) ||
1795 (state == dtos && UseSSE < 2)) {
1796 MacroAssembler::verify_FPU(stack_depth);
1797 }
1798 #endif
1799 }
1800
1801 // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
1802 void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
1803 int increment, Address mask,
1804 Register scratch, bool preloaded,
1805 Condition cond, Label* where) {
1806 if (!preloaded) {
1807 movl(scratch, counter_addr);
1808 }
1809 incrementl(scratch, increment);
1810 movl(counter_addr, scratch);
1811 andl(scratch, mask);
1812 jcc(cond, *where);
1813 }
1814 #endif // CC_INTERP
1815
1816 void InterpreterMacroAssembler::notify_method_entry() {
1817 // Whenever JVMTI is interp_only_mode, method entry/exit events are sent to
|