453 void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less); 454 void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less); 455 456 // Inlined sin/cos generator for Java; must not use CPU instruction 457 // directly on Intel as it does not have high enough precision 458 // outside of the range [-pi/4, pi/4]. Extra argument indicate the 459 // number of FPU stack slots in use; all but the topmost will 460 // require saving if a slow case is necessary. Assumes argument is 461 // on FP TOS; result is on FP TOS. No cpu registers are changed by 462 // this code. 463 void trigfunc(char trig, int num_fpu_regs_in_use = 1); 464 465 // branch to L if FPU flag C2 is set/not set 466 // tmp is a temporary register, if none is available use noreg 467 void jC2 (Register tmp, Label& L); 468 void jnC2(Register tmp, Label& L); 469 470 // Pop ST (ffree & fincstp combined) 471 void fpop(); 472 473 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack 474 void push_fTOS(); 475 476 // pops double TOS element from CPU stack and pushes on FPU stack 477 void pop_fTOS(); 478 479 void empty_FPU_stack(); 480 481 void push_IU_state(); 482 void pop_IU_state(); 483 484 void push_FPU_state(); 485 void pop_FPU_state(); 486 487 void push_CPU_state(); 488 void pop_CPU_state(); 489 490 // Round up to a power of two 491 void round_to(Register reg, int modulus); 492 | 453 void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less); 454 void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less); 455 456 // Inlined sin/cos generator for Java; must not use CPU instruction 457 // directly on Intel as it does not have high enough precision 458 // outside of the range [-pi/4, pi/4]. Extra argument indicate the 459 // number of FPU stack slots in use; all but the topmost will 460 // require saving if a slow case is necessary. Assumes argument is 461 // on FP TOS; result is on FP TOS. No cpu registers are changed by 462 // this code. 463 void trigfunc(char trig, int num_fpu_regs_in_use = 1); 464 465 // branch to L if FPU flag C2 is set/not set 466 // tmp is a temporary register, if none is available use noreg 467 void jC2 (Register tmp, Label& L); 468 void jnC2(Register tmp, Label& L); 469 470 // Pop ST (ffree & fincstp combined) 471 void fpop(); 472 473 // Load float value from 'address'. If UseSSE >= 1, the value is loaded into 474 // register xmm0. Otherwise, the value is loaded onto the FPU stack. 475 void load_float(Address src); 476 477 // Store float value to 'address'. If UseSSE >= 1, the value is stored 478 // from register xmm0. Otherwise, the value is stored from the FPU stack. 479 void store_float(Address dst); 480 481 // Load double value from 'address'. If UseSSE >= 2, the value is loaded into 482 // register xmm0. Otherwise, the value is loaded onto the FPU stack. 483 void load_double(Address src); 484 485 // Store double value to 'address'. If UseSSE >= 2, the value is stored 486 // from register xmm0. Otherwise, the value is stored from the FPU stack. 487 void store_double(Address dst); 488 489 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack 490 void push_fTOS(); 491 492 // pops double TOS element from CPU stack and pushes on FPU stack 493 void pop_fTOS(); 494 495 void empty_FPU_stack(); 496 497 void push_IU_state(); 498 void pop_IU_state(); 499 500 void push_FPU_state(); 501 void pop_FPU_state(); 502 503 void push_CPU_state(); 504 void pop_CPU_state(); 505 506 // Round up to a power of two 507 void round_to(Register reg, int modulus); 508 |