src/cpu/x86/vm/vm_version_x86.cpp
Index Unified diffs Context diffs Sdiffs Patch New Old Previous File Next File
*** old/src/cpu/x86/vm/vm_version_x86.cpp	Tue Oct  6 12:32:55 2015
--- new/src/cpu/x86/vm/vm_version_x86.cpp	Tue Oct  6 12:32:54 2015

*** 1086,1100 **** --- 1086,1095 ---- // Modern processors allow misaligned memory operations for vectors. AlignVector = !UseUnalignedLoadStores; } #endif // COMPILER2 assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value"); // set valid Prefetch instruction if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0; if( AllocatePrefetchInstr > 3 ) AllocatePrefetchInstr = 3; if( AllocatePrefetchInstr == 3 && !supports_3dnow_prefetch() ) AllocatePrefetchInstr=0; if( !supports_sse() && supports_3dnow_prefetch() ) AllocatePrefetchInstr = 3; // Allocation prefetch settings intx cache_line_size = prefetch_data_size();
*** 1129,1139 **** --- 1124,1133 ---- FLAG_SET_DEFAULT(UseFPUForSpilling, true); } } #endif } assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value"); #ifdef _LP64 // Prefetch settings PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes(); PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();

src/cpu/x86/vm/vm_version_x86.cpp
Index Unified diffs Context diffs Sdiffs Patch New Old Previous File Next File