src/cpu/x86/vm/vm_version_x86.cpp
Index
Unified diffs
Context diffs
Sdiffs
Patch
New
Old
Previous File
Next File
*** old/src/cpu/x86/vm/vm_version_x86.cpp Tue Jan 26 17:33:11 2016
--- new/src/cpu/x86/vm/vm_version_x86.cpp Tue Jan 26 17:33:11 2016
*** 1161,1177 ****
--- 1161,1170 ----
// Allocation prefetch settings
intx cache_line_size = prefetch_data_size();
if( cache_line_size > AllocatePrefetchStepSize )
AllocatePrefetchStepSize = cache_line_size;
assert(AllocatePrefetchLines > 0, "invalid value");
if( AllocatePrefetchLines < 1 ) // set valid value in product VM
AllocatePrefetchLines = 3;
assert(AllocateInstancePrefetchLines > 0, "invalid value");
if( AllocateInstancePrefetchLines < 1 ) // set valid value in product VM
AllocateInstancePrefetchLines = 1;
AllocatePrefetchDistance = allocate_prefetch_distance();
AllocatePrefetchStyle = allocate_prefetch_style();
if (is_intel() && cpu_family() == 6 && supports_sse3()) {
if (AllocatePrefetchStyle == 2) { // watermark prefetching on Core
*** 1181,1191 ****
--- 1174,1186 ----
AllocatePrefetchDistance = 320;
#endif
}
if (supports_sse4_2() && supports_ht()) { // Nehalem based cpus
AllocatePrefetchDistance = 192;
AllocatePrefetchLines = 4;
+ if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) {
+ FLAG_SET_DEFAULT(AllocatePrefetchLines, 4);
+ }
}
#ifdef COMPILER2
if (supports_sse4_2()) {
if (FLAG_IS_DEFAULT(UseFPUForSpilling)) {
FLAG_SET_DEFAULT(UseFPUForSpilling, true);
src/cpu/x86/vm/vm_version_x86.cpp
Index
Unified diffs
Context diffs
Sdiffs
Patch
New
Old
Previous File
Next File