1 /*
2 * Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "ci/ciUtilities.hpp"
29 #include "gc/shared/barrierSet.hpp"
30 #include "gc/shared/barrierSetAssembler.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "nativeInst_x86.hpp"
33 #include "oops/instanceOop.hpp"
34 #include "oops/method.hpp"
35 #include "oops/objArrayKlass.hpp"
36 #include "oops/oop.inline.hpp"
37 #include "prims/methodHandles.hpp"
38 #include "runtime/frame.inline.hpp"
39 #include "runtime/handles.inline.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/stubCodeGenerator.hpp"
42 #include "runtime/stubRoutines.hpp"
43 #include "runtime/thread.inline.hpp"
44 #ifdef COMPILER2
45 #include "opto/runtime.hpp"
46 #endif
47 #if INCLUDE_ZGC
48 #include "gc/z/zThreadLocalData.hpp"
49 #endif
50
51 // Declaration and definition of StubGenerator (no .hpp file).
52 // For a more detailed description of the stub routine structure
53 // see the comment in stubRoutines.hpp
54
55 #define __ _masm->
56 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
57 #define a__ ((Assembler*)_masm)->
58
59 #ifdef PRODUCT
60 #define BLOCK_COMMENT(str) /* nothing */
61 #else
62 #define BLOCK_COMMENT(str) __ block_comment(str)
63 #endif
64
65 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
66 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
67
68 // Stub Code definitions
69
70 class StubGenerator: public StubCodeGenerator {
71 private:
72
73 #ifdef PRODUCT
74 #define inc_counter_np(counter) ((void)0)
75 #else
76 void inc_counter_np_(int& counter) {
77 // This can destroy rscratch1 if counter is far from the code cache
78 __ incrementl(ExternalAddress((address)&counter));
79 }
80 #define inc_counter_np(counter) \
81 BLOCK_COMMENT("inc_counter " #counter); \
82 inc_counter_np_(counter);
83 #endif
84
85 // Call stubs are used to call Java from C
86 //
87 // Linux Arguments:
88 // c_rarg0: call wrapper address address
89 // c_rarg1: result address
90 // c_rarg2: result type BasicType
91 // c_rarg3: method Method*
92 // c_rarg4: (interpreter) entry point address
93 // c_rarg5: parameters intptr_t*
94 // 16(rbp): parameter size (in words) int
95 // 24(rbp): thread Thread*
96 //
97 // [ return_from_Java ] <--- rsp
98 // [ argument word n ]
99 // ...
100 // -12 [ argument word 1 ]
101 // -11 [ saved r15 ] <--- rsp_after_call
102 // -10 [ saved r14 ]
103 // -9 [ saved r13 ]
104 // -8 [ saved r12 ]
105 // -7 [ saved rbx ]
106 // -6 [ call wrapper ]
107 // -5 [ result ]
108 // -4 [ result type ]
109 // -3 [ method ]
110 // -2 [ entry point ]
111 // -1 [ parameters ]
112 // 0 [ saved rbp ] <--- rbp
113 // 1 [ return address ]
114 // 2 [ parameter size ]
115 // 3 [ thread ]
116 //
117 // Windows Arguments:
118 // c_rarg0: call wrapper address address
119 // c_rarg1: result address
120 // c_rarg2: result type BasicType
121 // c_rarg3: method Method*
122 // 48(rbp): (interpreter) entry point address
123 // 56(rbp): parameters intptr_t*
124 // 64(rbp): parameter size (in words) int
125 // 72(rbp): thread Thread*
126 //
127 // [ return_from_Java ] <--- rsp
128 // [ argument word n ]
129 // ...
130 // -60 [ argument word 1 ]
131 // -59 [ saved xmm31 ] <--- rsp after_call
132 // [ saved xmm16-xmm30 ] (EVEX enabled, else the space is blank)
133 // -27 [ saved xmm15 ]
134 // [ saved xmm7-xmm14 ]
135 // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
136 // -7 [ saved r15 ]
137 // -6 [ saved r14 ]
138 // -5 [ saved r13 ]
139 // -4 [ saved r12 ]
140 // -3 [ saved rdi ]
141 // -2 [ saved rsi ]
142 // -1 [ saved rbx ]
143 // 0 [ saved rbp ] <--- rbp
144 // 1 [ return address ]
145 // 2 [ call wrapper ]
146 // 3 [ result ]
147 // 4 [ result type ]
148 // 5 [ method ]
149 // 6 [ entry point ]
150 // 7 [ parameters ]
151 // 8 [ parameter size ]
152 // 9 [ thread ]
153 //
154 // Windows reserves the callers stack space for arguments 1-4.
155 // We spill c_rarg0-c_rarg3 to this space.
156
157 // Call stub stack layout word offsets from rbp
158 enum call_stub_layout {
159 #ifdef _WIN64
160 xmm_save_first = 6, // save from xmm6
161 xmm_save_last = 31, // to xmm31
162 xmm_save_base = -9,
163 rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
164 r15_off = -7,
165 r14_off = -6,
166 r13_off = -5,
167 r12_off = -4,
168 rdi_off = -3,
169 rsi_off = -2,
170 rbx_off = -1,
171 rbp_off = 0,
172 retaddr_off = 1,
173 call_wrapper_off = 2,
174 result_off = 3,
175 result_type_off = 4,
176 method_off = 5,
177 entry_point_off = 6,
178 parameters_off = 7,
179 parameter_size_off = 8,
180 thread_off = 9
181 #else
182 rsp_after_call_off = -12,
183 mxcsr_off = rsp_after_call_off,
184 r15_off = -11,
185 r14_off = -10,
186 r13_off = -9,
187 r12_off = -8,
188 rbx_off = -7,
189 call_wrapper_off = -6,
190 result_off = -5,
191 result_type_off = -4,
192 method_off = -3,
193 entry_point_off = -2,
194 parameters_off = -1,
195 rbp_off = 0,
196 retaddr_off = 1,
197 parameter_size_off = 2,
198 thread_off = 3
199 #endif
200 };
201
202 #ifdef _WIN64
203 Address xmm_save(int reg) {
204 assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
205 return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
206 }
207 #endif
208
209 address generate_call_stub(address& return_address) {
210 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
211 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
212 "adjust this code");
213 StubCodeMark mark(this, "StubRoutines", "call_stub");
214 address start = __ pc();
215
216 // same as in generate_catch_exception()!
217 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
218
219 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
220 const Address result (rbp, result_off * wordSize);
221 const Address result_type (rbp, result_type_off * wordSize);
222 const Address method (rbp, method_off * wordSize);
223 const Address entry_point (rbp, entry_point_off * wordSize);
224 const Address parameters (rbp, parameters_off * wordSize);
225 const Address parameter_size(rbp, parameter_size_off * wordSize);
226
227 // same as in generate_catch_exception()!
228 const Address thread (rbp, thread_off * wordSize);
229
230 const Address r15_save(rbp, r15_off * wordSize);
231 const Address r14_save(rbp, r14_off * wordSize);
232 const Address r13_save(rbp, r13_off * wordSize);
233 const Address r12_save(rbp, r12_off * wordSize);
234 const Address rbx_save(rbp, rbx_off * wordSize);
235
236 // stub code
237 __ enter();
238 __ subptr(rsp, -rsp_after_call_off * wordSize);
239
240 // save register parameters
241 #ifndef _WIN64
242 __ movptr(parameters, c_rarg5); // parameters
243 __ movptr(entry_point, c_rarg4); // entry_point
244 #endif
245
246 __ movptr(method, c_rarg3); // method
247 __ movl(result_type, c_rarg2); // result type
248 __ movptr(result, c_rarg1); // result
249 __ movptr(call_wrapper, c_rarg0); // call wrapper
250
251 // save regs belonging to calling function
252 __ movptr(rbx_save, rbx);
253 __ movptr(r12_save, r12);
254 __ movptr(r13_save, r13);
255 __ movptr(r14_save, r14);
256 __ movptr(r15_save, r15);
257 if (UseAVX > 2) {
258 __ movl(rbx, 0xffff);
259 __ kmovwl(k1, rbx);
260 }
261 #ifdef _WIN64
262 int last_reg = 15;
263 if (UseAVX > 2) {
264 last_reg = 31;
265 }
266 if (VM_Version::supports_evex()) {
267 for (int i = xmm_save_first; i <= last_reg; i++) {
268 __ vextractf32x4(xmm_save(i), as_XMMRegister(i), 0);
269 }
270 } else {
271 for (int i = xmm_save_first; i <= last_reg; i++) {
272 __ movdqu(xmm_save(i), as_XMMRegister(i));
273 }
274 }
275
276 const Address rdi_save(rbp, rdi_off * wordSize);
277 const Address rsi_save(rbp, rsi_off * wordSize);
278
279 __ movptr(rsi_save, rsi);
280 __ movptr(rdi_save, rdi);
281 #else
282 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
283 {
284 Label skip_ldmx;
285 __ stmxcsr(mxcsr_save);
286 __ movl(rax, mxcsr_save);
287 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
288 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
289 __ cmp32(rax, mxcsr_std);
290 __ jcc(Assembler::equal, skip_ldmx);
291 __ ldmxcsr(mxcsr_std);
292 __ bind(skip_ldmx);
293 }
294 #endif
295
296 // Load up thread register
297 __ movptr(r15_thread, thread);
298 __ reinit_heapbase();
299
300 #ifdef ASSERT
301 // make sure we have no pending exceptions
302 {
303 Label L;
304 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
305 __ jcc(Assembler::equal, L);
306 __ stop("StubRoutines::call_stub: entered with pending exception");
307 __ bind(L);
308 }
309 #endif
310
311 // pass parameters if any
312 BLOCK_COMMENT("pass parameters if any");
313 Label parameters_done;
314 __ movl(c_rarg3, parameter_size);
315 __ testl(c_rarg3, c_rarg3);
316 __ jcc(Assembler::zero, parameters_done);
317
318 Label loop;
319 __ movptr(c_rarg2, parameters); // parameter pointer
320 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
321 __ BIND(loop);
322 __ movptr(rax, Address(c_rarg2, 0));// get parameter
323 __ addptr(c_rarg2, wordSize); // advance to next parameter
324 __ decrementl(c_rarg1); // decrement counter
325 __ push(rax); // pass parameter
326 __ jcc(Assembler::notZero, loop);
327
328 // call Java function
329 __ BIND(parameters_done);
330 __ movptr(rbx, method); // get Method*
331 __ movptr(c_rarg1, entry_point); // get entry_point
332 __ mov(r13, rsp); // set sender sp
333 BLOCK_COMMENT("call Java function");
334 __ call(c_rarg1);
335
336 BLOCK_COMMENT("call_stub_return_address:");
337 return_address = __ pc();
338
339 // store result depending on type (everything that is not
340 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
341 __ movptr(c_rarg0, result);
342 Label is_long, is_float, is_double, exit;
343 __ movl(c_rarg1, result_type);
344 __ cmpl(c_rarg1, T_OBJECT);
345 __ jcc(Assembler::equal, is_long);
346 __ cmpl(c_rarg1, T_LONG);
347 __ jcc(Assembler::equal, is_long);
348 __ cmpl(c_rarg1, T_FLOAT);
349 __ jcc(Assembler::equal, is_float);
350 __ cmpl(c_rarg1, T_DOUBLE);
351 __ jcc(Assembler::equal, is_double);
352
353 // handle T_INT case
354 __ movl(Address(c_rarg0, 0), rax);
355
356 __ BIND(exit);
357
358 // pop parameters
359 __ lea(rsp, rsp_after_call);
360
361 #ifdef ASSERT
362 // verify that threads correspond
363 {
364 Label L1, L2, L3;
365 __ cmpptr(r15_thread, thread);
366 __ jcc(Assembler::equal, L1);
367 __ stop("StubRoutines::call_stub: r15_thread is corrupted");
368 __ bind(L1);
369 __ get_thread(rbx);
370 __ cmpptr(r15_thread, thread);
371 __ jcc(Assembler::equal, L2);
372 __ stop("StubRoutines::call_stub: r15_thread is modified by call");
373 __ bind(L2);
374 __ cmpptr(r15_thread, rbx);
375 __ jcc(Assembler::equal, L3);
376 __ stop("StubRoutines::call_stub: threads must correspond");
377 __ bind(L3);
378 }
379 #endif
380
381 // restore regs belonging to calling function
382 #ifdef _WIN64
383 // emit the restores for xmm regs
384 if (VM_Version::supports_evex()) {
385 for (int i = xmm_save_first; i <= last_reg; i++) {
386 __ vinsertf32x4(as_XMMRegister(i), as_XMMRegister(i), xmm_save(i), 0);
387 }
388 } else {
389 for (int i = xmm_save_first; i <= last_reg; i++) {
390 __ movdqu(as_XMMRegister(i), xmm_save(i));
391 }
392 }
393 #endif
394 __ movptr(r15, r15_save);
395 __ movptr(r14, r14_save);
396 __ movptr(r13, r13_save);
397 __ movptr(r12, r12_save);
398 __ movptr(rbx, rbx_save);
399
400 #ifdef _WIN64
401 __ movptr(rdi, rdi_save);
402 __ movptr(rsi, rsi_save);
403 #else
404 __ ldmxcsr(mxcsr_save);
405 #endif
406
407 // restore rsp
408 __ addptr(rsp, -rsp_after_call_off * wordSize);
409
410 // return
411 __ vzeroupper();
412 __ pop(rbp);
413 __ ret(0);
414
415 // handle return types different from T_INT
416 __ BIND(is_long);
417 __ movq(Address(c_rarg0, 0), rax);
418 __ jmp(exit);
419
420 __ BIND(is_float);
421 __ movflt(Address(c_rarg0, 0), xmm0);
422 __ jmp(exit);
423
424 __ BIND(is_double);
425 __ movdbl(Address(c_rarg0, 0), xmm0);
426 __ jmp(exit);
427
428 return start;
429 }
430
431 // Return point for a Java call if there's an exception thrown in
432 // Java code. The exception is caught and transformed into a
433 // pending exception stored in JavaThread that can be tested from
434 // within the VM.
435 //
436 // Note: Usually the parameters are removed by the callee. In case
437 // of an exception crossing an activation frame boundary, that is
438 // not the case if the callee is compiled code => need to setup the
439 // rsp.
440 //
441 // rax: exception oop
442
443 address generate_catch_exception() {
444 StubCodeMark mark(this, "StubRoutines", "catch_exception");
445 address start = __ pc();
446
447 // same as in generate_call_stub():
448 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
449 const Address thread (rbp, thread_off * wordSize);
450
451 #ifdef ASSERT
452 // verify that threads correspond
453 {
454 Label L1, L2, L3;
455 __ cmpptr(r15_thread, thread);
456 __ jcc(Assembler::equal, L1);
457 __ stop("StubRoutines::catch_exception: r15_thread is corrupted");
458 __ bind(L1);
459 __ get_thread(rbx);
460 __ cmpptr(r15_thread, thread);
461 __ jcc(Assembler::equal, L2);
462 __ stop("StubRoutines::catch_exception: r15_thread is modified by call");
463 __ bind(L2);
464 __ cmpptr(r15_thread, rbx);
465 __ jcc(Assembler::equal, L3);
466 __ stop("StubRoutines::catch_exception: threads must correspond");
467 __ bind(L3);
468 }
469 #endif
470
471 // set pending exception
472 __ verify_oop(rax);
473
474 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
475 __ lea(rscratch1, ExternalAddress((address)__FILE__));
476 __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
477 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
478
479 // complete return to VM
480 assert(StubRoutines::_call_stub_return_address != NULL,
481 "_call_stub_return_address must have been generated before");
482 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
483
484 return start;
485 }
486
487 // Continuation point for runtime calls returning with a pending
488 // exception. The pending exception check happened in the runtime
489 // or native call stub. The pending exception in Thread is
490 // converted into a Java-level exception.
491 //
492 // Contract with Java-level exception handlers:
493 // rax: exception
494 // rdx: throwing pc
495 //
496 // NOTE: At entry of this stub, exception-pc must be on stack !!
497
498 address generate_forward_exception() {
499 StubCodeMark mark(this, "StubRoutines", "forward exception");
500 address start = __ pc();
501
502 // Upon entry, the sp points to the return address returning into
503 // Java (interpreted or compiled) code; i.e., the return address
504 // becomes the throwing pc.
505 //
506 // Arguments pushed before the runtime call are still on the stack
507 // but the exception handler will reset the stack pointer ->
508 // ignore them. A potential result in registers can be ignored as
509 // well.
510
511 #ifdef ASSERT
512 // make sure this code is only executed if there is a pending exception
513 {
514 Label L;
515 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
516 __ jcc(Assembler::notEqual, L);
517 __ stop("StubRoutines::forward exception: no pending exception (1)");
518 __ bind(L);
519 }
520 #endif
521
522 // compute exception handler into rbx
523 __ movptr(c_rarg0, Address(rsp, 0));
524 BLOCK_COMMENT("call exception_handler_for_return_address");
525 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
526 SharedRuntime::exception_handler_for_return_address),
527 r15_thread, c_rarg0);
528 __ mov(rbx, rax);
529
530 // setup rax & rdx, remove return address & clear pending exception
531 __ pop(rdx);
532 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
533 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
534
535 #ifdef ASSERT
536 // make sure exception is set
537 {
538 Label L;
539 __ testptr(rax, rax);
540 __ jcc(Assembler::notEqual, L);
541 __ stop("StubRoutines::forward exception: no pending exception (2)");
542 __ bind(L);
543 }
544 #endif
545
546 // continue at exception handler (return address removed)
547 // rax: exception
548 // rbx: exception handler
549 // rdx: throwing pc
550 __ verify_oop(rax);
551 __ jmp(rbx);
552
553 return start;
554 }
555
556 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
557 //
558 // Arguments :
559 // c_rarg0: exchange_value
560 // c_rarg0: dest
561 //
562 // Result:
563 // *dest <- ex, return (orig *dest)
564 address generate_atomic_xchg() {
565 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
566 address start = __ pc();
567
568 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
569 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
570 __ ret(0);
571
572 return start;
573 }
574
575 // Support for intptr_t atomic::xchg_long(jlong exchange_value, volatile jlong* dest)
576 //
577 // Arguments :
578 // c_rarg0: exchange_value
579 // c_rarg1: dest
580 //
581 // Result:
582 // *dest <- ex, return (orig *dest)
583 address generate_atomic_xchg_long() {
584 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_long");
585 address start = __ pc();
586
587 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
588 __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
589 __ ret(0);
590
591 return start;
592 }
593
594 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
595 // jint compare_value)
596 //
597 // Arguments :
598 // c_rarg0: exchange_value
599 // c_rarg1: dest
600 // c_rarg2: compare_value
601 //
602 // Result:
603 // if ( compare_value == *dest ) {
604 // *dest = exchange_value
605 // return compare_value;
606 // else
607 // return *dest;
608 address generate_atomic_cmpxchg() {
609 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
610 address start = __ pc();
611
612 __ movl(rax, c_rarg2);
613 if ( os::is_MP() ) __ lock();
614 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
615 __ ret(0);
616
617 return start;
618 }
619
620 // Support for int8_t atomic::atomic_cmpxchg(int8_t exchange_value, volatile int8_t* dest,
621 // int8_t compare_value)
622 //
623 // Arguments :
624 // c_rarg0: exchange_value
625 // c_rarg1: dest
626 // c_rarg2: compare_value
627 //
628 // Result:
629 // if ( compare_value == *dest ) {
630 // *dest = exchange_value
631 // return compare_value;
632 // else
633 // return *dest;
634 address generate_atomic_cmpxchg_byte() {
635 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_byte");
636 address start = __ pc();
637
638 __ movsbq(rax, c_rarg2);
639 if ( os::is_MP() ) __ lock();
640 __ cmpxchgb(c_rarg0, Address(c_rarg1, 0));
641 __ ret(0);
642
643 return start;
644 }
645
646 // Support for int64_t atomic::atomic_cmpxchg(int64_t exchange_value,
647 // volatile int64_t* dest,
648 // int64_t compare_value)
649 // Arguments :
650 // c_rarg0: exchange_value
651 // c_rarg1: dest
652 // c_rarg2: compare_value
653 //
654 // Result:
655 // if ( compare_value == *dest ) {
656 // *dest = exchange_value
657 // return compare_value;
658 // else
659 // return *dest;
660 address generate_atomic_cmpxchg_long() {
661 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
662 address start = __ pc();
663
664 __ movq(rax, c_rarg2);
665 if ( os::is_MP() ) __ lock();
666 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
667 __ ret(0);
668
669 return start;
670 }
671
672 // Support for jint atomic::add(jint add_value, volatile jint* dest)
673 //
674 // Arguments :
675 // c_rarg0: add_value
676 // c_rarg1: dest
677 //
678 // Result:
679 // *dest += add_value
680 // return *dest;
681 address generate_atomic_add() {
682 StubCodeMark mark(this, "StubRoutines", "atomic_add");
683 address start = __ pc();
684
685 __ movl(rax, c_rarg0);
686 if ( os::is_MP() ) __ lock();
687 __ xaddl(Address(c_rarg1, 0), c_rarg0);
688 __ addl(rax, c_rarg0);
689 __ ret(0);
690
691 return start;
692 }
693
694 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
695 //
696 // Arguments :
697 // c_rarg0: add_value
698 // c_rarg1: dest
699 //
700 // Result:
701 // *dest += add_value
702 // return *dest;
703 address generate_atomic_add_long() {
704 StubCodeMark mark(this, "StubRoutines", "atomic_add_long");
705 address start = __ pc();
706
707 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
708 if ( os::is_MP() ) __ lock();
709 __ xaddptr(Address(c_rarg1, 0), c_rarg0);
710 __ addptr(rax, c_rarg0);
711 __ ret(0);
712
713 return start;
714 }
715
716 // Support for intptr_t OrderAccess::fence()
717 //
718 // Arguments :
719 //
720 // Result:
721 address generate_orderaccess_fence() {
722 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
723 address start = __ pc();
724 __ membar(Assembler::StoreLoad);
725 __ ret(0);
726
727 return start;
728 }
729
730 // Support for intptr_t get_previous_fp()
731 //
732 // This routine is used to find the previous frame pointer for the
733 // caller (current_frame_guess). This is used as part of debugging
734 // ps() is seemingly lost trying to find frames.
735 // This code assumes that caller current_frame_guess) has a frame.
736 address generate_get_previous_fp() {
737 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
738 const Address old_fp(rbp, 0);
739 const Address older_fp(rax, 0);
740 address start = __ pc();
741
742 __ enter();
743 __ movptr(rax, old_fp); // callers fp
744 __ movptr(rax, older_fp); // the frame for ps()
745 __ pop(rbp);
746 __ ret(0);
747
748 return start;
749 }
750
751 // Support for intptr_t get_previous_sp()
752 //
753 // This routine is used to find the previous stack pointer for the
754 // caller.
755 address generate_get_previous_sp() {
756 StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
757 address start = __ pc();
758
759 __ movptr(rax, rsp);
760 __ addptr(rax, 8); // return address is at the top of the stack.
761 __ ret(0);
762
763 return start;
764 }
765
766 //----------------------------------------------------------------------------------------------------
767 // Support for void verify_mxcsr()
768 //
769 // This routine is used with -Xcheck:jni to verify that native
770 // JNI code does not return to Java code without restoring the
771 // MXCSR register to our expected state.
772
773 address generate_verify_mxcsr() {
774 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
775 address start = __ pc();
776
777 const Address mxcsr_save(rsp, 0);
778
779 if (CheckJNICalls) {
780 Label ok_ret;
781 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
782 __ push(rax);
783 __ subptr(rsp, wordSize); // allocate a temp location
784 __ stmxcsr(mxcsr_save);
785 __ movl(rax, mxcsr_save);
786 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
787 __ cmp32(rax, mxcsr_std);
788 __ jcc(Assembler::equal, ok_ret);
789
790 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
791
792 __ ldmxcsr(mxcsr_std);
793
794 __ bind(ok_ret);
795 __ addptr(rsp, wordSize);
796 __ pop(rax);
797 }
798
799 __ ret(0);
800
801 return start;
802 }
803
804 address generate_f2i_fixup() {
805 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
806 Address inout(rsp, 5 * wordSize); // return address + 4 saves
807
808 address start = __ pc();
809
810 Label L;
811
812 __ push(rax);
813 __ push(c_rarg3);
814 __ push(c_rarg2);
815 __ push(c_rarg1);
816
817 __ movl(rax, 0x7f800000);
818 __ xorl(c_rarg3, c_rarg3);
819 __ movl(c_rarg2, inout);
820 __ movl(c_rarg1, c_rarg2);
821 __ andl(c_rarg1, 0x7fffffff);
822 __ cmpl(rax, c_rarg1); // NaN? -> 0
823 __ jcc(Assembler::negative, L);
824 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
825 __ movl(c_rarg3, 0x80000000);
826 __ movl(rax, 0x7fffffff);
827 __ cmovl(Assembler::positive, c_rarg3, rax);
828
829 __ bind(L);
830 __ movptr(inout, c_rarg3);
831
832 __ pop(c_rarg1);
833 __ pop(c_rarg2);
834 __ pop(c_rarg3);
835 __ pop(rax);
836
837 __ ret(0);
838
839 return start;
840 }
841
842 address generate_f2l_fixup() {
843 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
844 Address inout(rsp, 5 * wordSize); // return address + 4 saves
845 address start = __ pc();
846
847 Label L;
848
849 __ push(rax);
850 __ push(c_rarg3);
851 __ push(c_rarg2);
852 __ push(c_rarg1);
853
854 __ movl(rax, 0x7f800000);
855 __ xorl(c_rarg3, c_rarg3);
856 __ movl(c_rarg2, inout);
857 __ movl(c_rarg1, c_rarg2);
858 __ andl(c_rarg1, 0x7fffffff);
859 __ cmpl(rax, c_rarg1); // NaN? -> 0
860 __ jcc(Assembler::negative, L);
861 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
862 __ mov64(c_rarg3, 0x8000000000000000);
863 __ mov64(rax, 0x7fffffffffffffff);
864 __ cmov(Assembler::positive, c_rarg3, rax);
865
866 __ bind(L);
867 __ movptr(inout, c_rarg3);
868
869 __ pop(c_rarg1);
870 __ pop(c_rarg2);
871 __ pop(c_rarg3);
872 __ pop(rax);
873
874 __ ret(0);
875
876 return start;
877 }
878
879 address generate_d2i_fixup() {
880 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
881 Address inout(rsp, 6 * wordSize); // return address + 5 saves
882
883 address start = __ pc();
884
885 Label L;
886
887 __ push(rax);
888 __ push(c_rarg3);
889 __ push(c_rarg2);
890 __ push(c_rarg1);
891 __ push(c_rarg0);
892
893 __ movl(rax, 0x7ff00000);
894 __ movq(c_rarg2, inout);
895 __ movl(c_rarg3, c_rarg2);
896 __ mov(c_rarg1, c_rarg2);
897 __ mov(c_rarg0, c_rarg2);
898 __ negl(c_rarg3);
899 __ shrptr(c_rarg1, 0x20);
900 __ orl(c_rarg3, c_rarg2);
901 __ andl(c_rarg1, 0x7fffffff);
902 __ xorl(c_rarg2, c_rarg2);
903 __ shrl(c_rarg3, 0x1f);
904 __ orl(c_rarg1, c_rarg3);
905 __ cmpl(rax, c_rarg1);
906 __ jcc(Assembler::negative, L); // NaN -> 0
907 __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
908 __ movl(c_rarg2, 0x80000000);
909 __ movl(rax, 0x7fffffff);
910 __ cmov(Assembler::positive, c_rarg2, rax);
911
912 __ bind(L);
913 __ movptr(inout, c_rarg2);
914
915 __ pop(c_rarg0);
916 __ pop(c_rarg1);
917 __ pop(c_rarg2);
918 __ pop(c_rarg3);
919 __ pop(rax);
920
921 __ ret(0);
922
923 return start;
924 }
925
926 address generate_d2l_fixup() {
927 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
928 Address inout(rsp, 6 * wordSize); // return address + 5 saves
929
930 address start = __ pc();
931
932 Label L;
933
934 __ push(rax);
935 __ push(c_rarg3);
936 __ push(c_rarg2);
937 __ push(c_rarg1);
938 __ push(c_rarg0);
939
940 __ movl(rax, 0x7ff00000);
941 __ movq(c_rarg2, inout);
942 __ movl(c_rarg3, c_rarg2);
943 __ mov(c_rarg1, c_rarg2);
944 __ mov(c_rarg0, c_rarg2);
945 __ negl(c_rarg3);
946 __ shrptr(c_rarg1, 0x20);
947 __ orl(c_rarg3, c_rarg2);
948 __ andl(c_rarg1, 0x7fffffff);
949 __ xorl(c_rarg2, c_rarg2);
950 __ shrl(c_rarg3, 0x1f);
951 __ orl(c_rarg1, c_rarg3);
952 __ cmpl(rax, c_rarg1);
953 __ jcc(Assembler::negative, L); // NaN -> 0
954 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
955 __ mov64(c_rarg2, 0x8000000000000000);
956 __ mov64(rax, 0x7fffffffffffffff);
957 __ cmovq(Assembler::positive, c_rarg2, rax);
958
959 __ bind(L);
960 __ movq(inout, c_rarg2);
961
962 __ pop(c_rarg0);
963 __ pop(c_rarg1);
964 __ pop(c_rarg2);
965 __ pop(c_rarg3);
966 __ pop(rax);
967
968 __ ret(0);
969
970 return start;
971 }
972
973 address generate_fp_mask(const char *stub_name, int64_t mask) {
974 __ align(CodeEntryAlignment);
975 StubCodeMark mark(this, "StubRoutines", stub_name);
976 address start = __ pc();
977
978 __ emit_data64( mask, relocInfo::none );
979 __ emit_data64( mask, relocInfo::none );
980
981 return start;
982 }
983
984 // Non-destructive plausibility checks for oops
985 //
986 // Arguments:
987 // all args on stack!
988 //
989 // Stack after saving c_rarg3:
990 // [tos + 0]: saved c_rarg3
991 // [tos + 1]: saved c_rarg2
992 // [tos + 2]: saved r12 (several TemplateTable methods use it)
993 // [tos + 3]: saved flags
994 // [tos + 4]: return address
995 // * [tos + 5]: error message (char*)
996 // * [tos + 6]: object to verify (oop)
997 // * [tos + 7]: saved rax - saved by caller and bashed
998 // * [tos + 8]: saved r10 (rscratch1) - saved by caller
999 // * = popped on exit
1000 address generate_verify_oop() {
1001 StubCodeMark mark(this, "StubRoutines", "verify_oop");
1002 address start = __ pc();
1003
1004 Label exit, error;
1005
1006 __ pushf();
1007 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
1008
1009 __ push(r12);
1010
1011 // save c_rarg2 and c_rarg3
1012 __ push(c_rarg2);
1013 __ push(c_rarg3);
1014
1015 enum {
1016 // After previous pushes.
1017 oop_to_verify = 6 * wordSize,
1018 saved_rax = 7 * wordSize,
1019 saved_r10 = 8 * wordSize,
1020
1021 // Before the call to MacroAssembler::debug(), see below.
1022 return_addr = 16 * wordSize,
1023 error_msg = 17 * wordSize
1024 };
1025
1026 // get object
1027 __ movptr(rax, Address(rsp, oop_to_verify));
1028
1029 // make sure object is 'reasonable'
1030 __ testptr(rax, rax);
1031 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
1032
1033 #if INCLUDE_ZGC
1034 if (UseZGC) {
1035 // Check if metadata bits indicate a bad oop
1036 __ testptr(rax, Address(r15_thread, ZThreadLocalData::address_bad_mask_offset()));
1037 __ jcc(Assembler::notZero, error);
1038 }
1039 #endif
1040
1041 // Check if the oop is in the right area of memory
1042 __ movptr(c_rarg2, rax);
1043 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
1044 __ andptr(c_rarg2, c_rarg3);
1045 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
1046 __ cmpptr(c_rarg2, c_rarg3);
1047 __ jcc(Assembler::notZero, error);
1048
1049 // set r12 to heapbase for load_klass()
1050 __ reinit_heapbase();
1051
1052 // make sure klass is 'reasonable', which is not zero.
1053 __ load_klass(rax, rax); // get klass
1054 __ testptr(rax, rax);
1055 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
1056
1057 // return if everything seems ok
1058 __ bind(exit);
1059 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1060 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1061 __ pop(c_rarg3); // restore c_rarg3
1062 __ pop(c_rarg2); // restore c_rarg2
1063 __ pop(r12); // restore r12
1064 __ popf(); // restore flags
1065 __ ret(4 * wordSize); // pop caller saved stuff
1066
1067 // handle errors
1068 __ bind(error);
1069 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1070 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1071 __ pop(c_rarg3); // get saved c_rarg3 back
1072 __ pop(c_rarg2); // get saved c_rarg2 back
1073 __ pop(r12); // get saved r12 back
1074 __ popf(); // get saved flags off stack --
1075 // will be ignored
1076
1077 __ pusha(); // push registers
1078 // (rip is already
1079 // already pushed)
1080 // debug(char* msg, int64_t pc, int64_t regs[])
1081 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
1082 // pushed all the registers, so now the stack looks like:
1083 // [tos + 0] 16 saved registers
1084 // [tos + 16] return address
1085 // * [tos + 17] error message (char*)
1086 // * [tos + 18] object to verify (oop)
1087 // * [tos + 19] saved rax - saved by caller and bashed
1088 // * [tos + 20] saved r10 (rscratch1) - saved by caller
1089 // * = popped on exit
1090
1091 __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
1092 __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
1093 __ movq(c_rarg2, rsp); // pass address of regs on stack
1094 __ mov(r12, rsp); // remember rsp
1095 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1096 __ andptr(rsp, -16); // align stack as required by ABI
1097 BLOCK_COMMENT("call MacroAssembler::debug");
1098 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
1099 __ mov(rsp, r12); // restore rsp
1100 __ popa(); // pop registers (includes r12)
1101 __ ret(4 * wordSize); // pop caller saved stuff
1102
1103 return start;
1104 }
1105
1106 //
1107 // Verify that a register contains clean 32-bits positive value
1108 // (high 32-bits are 0) so it could be used in 64-bits shifts.
1109 //
1110 // Input:
1111 // Rint - 32-bits value
1112 // Rtmp - scratch
1113 //
1114 void assert_clean_int(Register Rint, Register Rtmp) {
1115 #ifdef ASSERT
1116 Label L;
1117 assert_different_registers(Rtmp, Rint);
1118 __ movslq(Rtmp, Rint);
1119 __ cmpq(Rtmp, Rint);
1120 __ jcc(Assembler::equal, L);
1121 __ stop("high 32-bits of int value are not 0");
1122 __ bind(L);
1123 #endif
1124 }
1125
1126 // Generate overlap test for array copy stubs
1127 //
1128 // Input:
1129 // c_rarg0 - from
1130 // c_rarg1 - to
1131 // c_rarg2 - element count
1132 //
1133 // Output:
1134 // rax - &from[element count - 1]
1135 //
1136 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
1137 assert(no_overlap_target != NULL, "must be generated");
1138 array_overlap_test(no_overlap_target, NULL, sf);
1139 }
1140 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
1141 array_overlap_test(NULL, &L_no_overlap, sf);
1142 }
1143 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
1144 const Register from = c_rarg0;
1145 const Register to = c_rarg1;
1146 const Register count = c_rarg2;
1147 const Register end_from = rax;
1148
1149 __ cmpptr(to, from);
1150 __ lea(end_from, Address(from, count, sf, 0));
1151 if (NOLp == NULL) {
1152 ExternalAddress no_overlap(no_overlap_target);
1153 __ jump_cc(Assembler::belowEqual, no_overlap);
1154 __ cmpptr(to, end_from);
1155 __ jump_cc(Assembler::aboveEqual, no_overlap);
1156 } else {
1157 __ jcc(Assembler::belowEqual, (*NOLp));
1158 __ cmpptr(to, end_from);
1159 __ jcc(Assembler::aboveEqual, (*NOLp));
1160 }
1161 }
1162
1163 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
1164 //
1165 // Outputs:
1166 // rdi - rcx
1167 // rsi - rdx
1168 // rdx - r8
1169 // rcx - r9
1170 //
1171 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
1172 // are non-volatile. r9 and r10 should not be used by the caller.
1173 //
1174 void setup_arg_regs(int nargs = 3) {
1175 const Register saved_rdi = r9;
1176 const Register saved_rsi = r10;
1177 assert(nargs == 3 || nargs == 4, "else fix");
1178 #ifdef _WIN64
1179 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
1180 "unexpected argument registers");
1181 if (nargs >= 4)
1182 __ mov(rax, r9); // r9 is also saved_rdi
1183 __ movptr(saved_rdi, rdi);
1184 __ movptr(saved_rsi, rsi);
1185 __ mov(rdi, rcx); // c_rarg0
1186 __ mov(rsi, rdx); // c_rarg1
1187 __ mov(rdx, r8); // c_rarg2
1188 if (nargs >= 4)
1189 __ mov(rcx, rax); // c_rarg3 (via rax)
1190 #else
1191 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
1192 "unexpected argument registers");
1193 #endif
1194 }
1195
1196 void restore_arg_regs() {
1197 const Register saved_rdi = r9;
1198 const Register saved_rsi = r10;
1199 #ifdef _WIN64
1200 __ movptr(rdi, saved_rdi);
1201 __ movptr(rsi, saved_rsi);
1202 #endif
1203 }
1204
1205
1206 // Copy big chunks forward
1207 //
1208 // Inputs:
1209 // end_from - source arrays end address
1210 // end_to - destination array end address
1211 // qword_count - 64-bits element count, negative
1212 // to - scratch
1213 // L_copy_bytes - entry label
1214 // L_copy_8_bytes - exit label
1215 //
1216 void copy_bytes_forward(Register end_from, Register end_to,
1217 Register qword_count, Register to,
1218 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1219 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1220 Label L_loop;
1221 __ align(OptoLoopAlignment);
1222 if (UseUnalignedLoadStores) {
1223 Label L_end;
1224 if (UseAVX > 2) {
1225 __ movl(to, 0xffff);
1226 __ kmovwl(k1, to);
1227 }
1228 // Copy 64-bytes per iteration
1229 __ BIND(L_loop);
1230 if (UseAVX > 2) {
1231 __ evmovdqul(xmm0, Address(end_from, qword_count, Address::times_8, -56), Assembler::AVX_512bit);
1232 __ evmovdqul(Address(end_to, qword_count, Address::times_8, -56), xmm0, Assembler::AVX_512bit);
1233 } else if (UseAVX == 2) {
1234 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1235 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1236 __ vmovdqu(xmm1, Address(end_from, qword_count, Address::times_8, -24));
1237 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm1);
1238 } else {
1239 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1240 __ movdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1241 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, -40));
1242 __ movdqu(Address(end_to, qword_count, Address::times_8, -40), xmm1);
1243 __ movdqu(xmm2, Address(end_from, qword_count, Address::times_8, -24));
1244 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm2);
1245 __ movdqu(xmm3, Address(end_from, qword_count, Address::times_8, - 8));
1246 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm3);
1247 }
1248 __ BIND(L_copy_bytes);
1249 __ addptr(qword_count, 8);
1250 __ jcc(Assembler::lessEqual, L_loop);
1251 __ subptr(qword_count, 4); // sub(8) and add(4)
1252 __ jccb(Assembler::greater, L_end);
1253 // Copy trailing 32 bytes
1254 if (UseAVX >= 2) {
1255 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1256 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1257 } else {
1258 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1259 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1260 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
1261 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
1262 }
1263 __ addptr(qword_count, 4);
1264 __ BIND(L_end);
1265 if (UseAVX >= 2) {
1266 // clean upper bits of YMM registers
1267 __ vpxor(xmm0, xmm0);
1268 __ vpxor(xmm1, xmm1);
1269 }
1270 } else {
1271 // Copy 32-bytes per iteration
1272 __ BIND(L_loop);
1273 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
1274 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
1275 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
1276 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
1277 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
1278 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
1279 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
1280 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
1281
1282 __ BIND(L_copy_bytes);
1283 __ addptr(qword_count, 4);
1284 __ jcc(Assembler::lessEqual, L_loop);
1285 }
1286 __ subptr(qword_count, 4);
1287 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
1288 }
1289
1290 // Copy big chunks backward
1291 //
1292 // Inputs:
1293 // from - source arrays address
1294 // dest - destination array address
1295 // qword_count - 64-bits element count
1296 // to - scratch
1297 // L_copy_bytes - entry label
1298 // L_copy_8_bytes - exit label
1299 //
1300 void copy_bytes_backward(Register from, Register dest,
1301 Register qword_count, Register to,
1302 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1303 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1304 Label L_loop;
1305 __ align(OptoLoopAlignment);
1306 if (UseUnalignedLoadStores) {
1307 Label L_end;
1308 if (UseAVX > 2) {
1309 __ movl(to, 0xffff);
1310 __ kmovwl(k1, to);
1311 }
1312 // Copy 64-bytes per iteration
1313 __ BIND(L_loop);
1314 if (UseAVX > 2) {
1315 __ evmovdqul(xmm0, Address(from, qword_count, Address::times_8, 0), Assembler::AVX_512bit);
1316 __ evmovdqul(Address(dest, qword_count, Address::times_8, 0), xmm0, Assembler::AVX_512bit);
1317 } else if (UseAVX == 2) {
1318 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 32));
1319 __ vmovdqu(Address(dest, qword_count, Address::times_8, 32), xmm0);
1320 __ vmovdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1321 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1322 } else {
1323 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 48));
1324 __ movdqu(Address(dest, qword_count, Address::times_8, 48), xmm0);
1325 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 32));
1326 __ movdqu(Address(dest, qword_count, Address::times_8, 32), xmm1);
1327 __ movdqu(xmm2, Address(from, qword_count, Address::times_8, 16));
1328 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm2);
1329 __ movdqu(xmm3, Address(from, qword_count, Address::times_8, 0));
1330 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm3);
1331 }
1332 __ BIND(L_copy_bytes);
1333 __ subptr(qword_count, 8);
1334 __ jcc(Assembler::greaterEqual, L_loop);
1335
1336 __ addptr(qword_count, 4); // add(8) and sub(4)
1337 __ jccb(Assembler::less, L_end);
1338 // Copy trailing 32 bytes
1339 if (UseAVX >= 2) {
1340 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 0));
1341 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm0);
1342 } else {
1343 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
1344 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
1345 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1346 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1347 }
1348 __ subptr(qword_count, 4);
1349 __ BIND(L_end);
1350 if (UseAVX >= 2) {
1351 // clean upper bits of YMM registers
1352 __ vpxor(xmm0, xmm0);
1353 __ vpxor(xmm1, xmm1);
1354 }
1355 } else {
1356 // Copy 32-bytes per iteration
1357 __ BIND(L_loop);
1358 __ movq(to, Address(from, qword_count, Address::times_8, 24));
1359 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
1360 __ movq(to, Address(from, qword_count, Address::times_8, 16));
1361 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
1362 __ movq(to, Address(from, qword_count, Address::times_8, 8));
1363 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
1364 __ movq(to, Address(from, qword_count, Address::times_8, 0));
1365 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
1366
1367 __ BIND(L_copy_bytes);
1368 __ subptr(qword_count, 4);
1369 __ jcc(Assembler::greaterEqual, L_loop);
1370 }
1371 __ addptr(qword_count, 4);
1372 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
1373 }
1374
1375
1376 // Arguments:
1377 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1378 // ignored
1379 // name - stub name string
1380 //
1381 // Inputs:
1382 // c_rarg0 - source array address
1383 // c_rarg1 - destination array address
1384 // c_rarg2 - element count, treated as ssize_t, can be zero
1385 //
1386 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1387 // we let the hardware handle it. The one to eight bytes within words,
1388 // dwords or qwords that span cache line boundaries will still be loaded
1389 // and stored atomically.
1390 //
1391 // Side Effects:
1392 // disjoint_byte_copy_entry is set to the no-overlap entry point
1393 // used by generate_conjoint_byte_copy().
1394 //
1395 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
1396 __ align(CodeEntryAlignment);
1397 StubCodeMark mark(this, "StubRoutines", name);
1398 address start = __ pc();
1399
1400 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1401 Label L_copy_byte, L_exit;
1402 const Register from = rdi; // source array address
1403 const Register to = rsi; // destination array address
1404 const Register count = rdx; // elements count
1405 const Register byte_count = rcx;
1406 const Register qword_count = count;
1407 const Register end_from = from; // source array end address
1408 const Register end_to = to; // destination array end address
1409 // End pointers are inclusive, and if count is not zero they point
1410 // to the last unit copied: end_to[0] := end_from[0]
1411
1412 __ enter(); // required for proper stackwalking of RuntimeStub frame
1413 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1414
1415 if (entry != NULL) {
1416 *entry = __ pc();
1417 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1418 BLOCK_COMMENT("Entry:");
1419 }
1420
1421 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1422 // r9 and r10 may be used to save non-volatile registers
1423
1424 // 'from', 'to' and 'count' are now valid
1425 __ movptr(byte_count, count);
1426 __ shrptr(count, 3); // count => qword_count
1427
1428 // Copy from low to high addresses. Use 'to' as scratch.
1429 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1430 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1431 __ negptr(qword_count); // make the count negative
1432 __ jmp(L_copy_bytes);
1433
1434 // Copy trailing qwords
1435 __ BIND(L_copy_8_bytes);
1436 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1437 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1438 __ increment(qword_count);
1439 __ jcc(Assembler::notZero, L_copy_8_bytes);
1440
1441 // Check for and copy trailing dword
1442 __ BIND(L_copy_4_bytes);
1443 __ testl(byte_count, 4);
1444 __ jccb(Assembler::zero, L_copy_2_bytes);
1445 __ movl(rax, Address(end_from, 8));
1446 __ movl(Address(end_to, 8), rax);
1447
1448 __ addptr(end_from, 4);
1449 __ addptr(end_to, 4);
1450
1451 // Check for and copy trailing word
1452 __ BIND(L_copy_2_bytes);
1453 __ testl(byte_count, 2);
1454 __ jccb(Assembler::zero, L_copy_byte);
1455 __ movw(rax, Address(end_from, 8));
1456 __ movw(Address(end_to, 8), rax);
1457
1458 __ addptr(end_from, 2);
1459 __ addptr(end_to, 2);
1460
1461 // Check for and copy trailing byte
1462 __ BIND(L_copy_byte);
1463 __ testl(byte_count, 1);
1464 __ jccb(Assembler::zero, L_exit);
1465 __ movb(rax, Address(end_from, 8));
1466 __ movb(Address(end_to, 8), rax);
1467
1468 __ BIND(L_exit);
1469 restore_arg_regs();
1470 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1471 __ xorptr(rax, rax); // return 0
1472 __ vzeroupper();
1473 __ leave(); // required for proper stackwalking of RuntimeStub frame
1474 __ ret(0);
1475
1476 // Copy in multi-bytes chunks
1477 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1478 __ jmp(L_copy_4_bytes);
1479
1480 return start;
1481 }
1482
1483 // Arguments:
1484 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1485 // ignored
1486 // name - stub name string
1487 //
1488 // Inputs:
1489 // c_rarg0 - source array address
1490 // c_rarg1 - destination array address
1491 // c_rarg2 - element count, treated as ssize_t, can be zero
1492 //
1493 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1494 // we let the hardware handle it. The one to eight bytes within words,
1495 // dwords or qwords that span cache line boundaries will still be loaded
1496 // and stored atomically.
1497 //
1498 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
1499 address* entry, const char *name) {
1500 __ align(CodeEntryAlignment);
1501 StubCodeMark mark(this, "StubRoutines", name);
1502 address start = __ pc();
1503
1504 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1505 const Register from = rdi; // source array address
1506 const Register to = rsi; // destination array address
1507 const Register count = rdx; // elements count
1508 const Register byte_count = rcx;
1509 const Register qword_count = count;
1510
1511 __ enter(); // required for proper stackwalking of RuntimeStub frame
1512 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1513
1514 if (entry != NULL) {
1515 *entry = __ pc();
1516 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1517 BLOCK_COMMENT("Entry:");
1518 }
1519
1520 array_overlap_test(nooverlap_target, Address::times_1);
1521 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1522 // r9 and r10 may be used to save non-volatile registers
1523
1524 // 'from', 'to' and 'count' are now valid
1525 __ movptr(byte_count, count);
1526 __ shrptr(count, 3); // count => qword_count
1527
1528 // Copy from high to low addresses.
1529
1530 // Check for and copy trailing byte
1531 __ testl(byte_count, 1);
1532 __ jcc(Assembler::zero, L_copy_2_bytes);
1533 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
1534 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1535 __ decrement(byte_count); // Adjust for possible trailing word
1536
1537 // Check for and copy trailing word
1538 __ BIND(L_copy_2_bytes);
1539 __ testl(byte_count, 2);
1540 __ jcc(Assembler::zero, L_copy_4_bytes);
1541 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
1542 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
1543
1544 // Check for and copy trailing dword
1545 __ BIND(L_copy_4_bytes);
1546 __ testl(byte_count, 4);
1547 __ jcc(Assembler::zero, L_copy_bytes);
1548 __ movl(rax, Address(from, qword_count, Address::times_8));
1549 __ movl(Address(to, qword_count, Address::times_8), rax);
1550 __ jmp(L_copy_bytes);
1551
1552 // Copy trailing qwords
1553 __ BIND(L_copy_8_bytes);
1554 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1555 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1556 __ decrement(qword_count);
1557 __ jcc(Assembler::notZero, L_copy_8_bytes);
1558
1559 restore_arg_regs();
1560 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1561 __ xorptr(rax, rax); // return 0
1562 __ vzeroupper();
1563 __ leave(); // required for proper stackwalking of RuntimeStub frame
1564 __ ret(0);
1565
1566 // Copy in multi-bytes chunks
1567 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1568
1569 restore_arg_regs();
1570 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1571 __ xorptr(rax, rax); // return 0
1572 __ vzeroupper();
1573 __ leave(); // required for proper stackwalking of RuntimeStub frame
1574 __ ret(0);
1575
1576 return start;
1577 }
1578
1579 // Arguments:
1580 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1581 // ignored
1582 // name - stub name string
1583 //
1584 // Inputs:
1585 // c_rarg0 - source array address
1586 // c_rarg1 - destination array address
1587 // c_rarg2 - element count, treated as ssize_t, can be zero
1588 //
1589 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1590 // let the hardware handle it. The two or four words within dwords
1591 // or qwords that span cache line boundaries will still be loaded
1592 // and stored atomically.
1593 //
1594 // Side Effects:
1595 // disjoint_short_copy_entry is set to the no-overlap entry point
1596 // used by generate_conjoint_short_copy().
1597 //
1598 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
1599 __ align(CodeEntryAlignment);
1600 StubCodeMark mark(this, "StubRoutines", name);
1601 address start = __ pc();
1602
1603 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
1604 const Register from = rdi; // source array address
1605 const Register to = rsi; // destination array address
1606 const Register count = rdx; // elements count
1607 const Register word_count = rcx;
1608 const Register qword_count = count;
1609 const Register end_from = from; // source array end address
1610 const Register end_to = to; // destination array end address
1611 // End pointers are inclusive, and if count is not zero they point
1612 // to the last unit copied: end_to[0] := end_from[0]
1613
1614 __ enter(); // required for proper stackwalking of RuntimeStub frame
1615 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1616
1617 if (entry != NULL) {
1618 *entry = __ pc();
1619 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1620 BLOCK_COMMENT("Entry:");
1621 }
1622
1623 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1624 // r9 and r10 may be used to save non-volatile registers
1625
1626 // 'from', 'to' and 'count' are now valid
1627 __ movptr(word_count, count);
1628 __ shrptr(count, 2); // count => qword_count
1629
1630 // Copy from low to high addresses. Use 'to' as scratch.
1631 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1632 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1633 __ negptr(qword_count);
1634 __ jmp(L_copy_bytes);
1635
1636 // Copy trailing qwords
1637 __ BIND(L_copy_8_bytes);
1638 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1639 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1640 __ increment(qword_count);
1641 __ jcc(Assembler::notZero, L_copy_8_bytes);
1642
1643 // Original 'dest' is trashed, so we can't use it as a
1644 // base register for a possible trailing word copy
1645
1646 // Check for and copy trailing dword
1647 __ BIND(L_copy_4_bytes);
1648 __ testl(word_count, 2);
1649 __ jccb(Assembler::zero, L_copy_2_bytes);
1650 __ movl(rax, Address(end_from, 8));
1651 __ movl(Address(end_to, 8), rax);
1652
1653 __ addptr(end_from, 4);
1654 __ addptr(end_to, 4);
1655
1656 // Check for and copy trailing word
1657 __ BIND(L_copy_2_bytes);
1658 __ testl(word_count, 1);
1659 __ jccb(Assembler::zero, L_exit);
1660 __ movw(rax, Address(end_from, 8));
1661 __ movw(Address(end_to, 8), rax);
1662
1663 __ BIND(L_exit);
1664 restore_arg_regs();
1665 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1666 __ xorptr(rax, rax); // return 0
1667 __ vzeroupper();
1668 __ leave(); // required for proper stackwalking of RuntimeStub frame
1669 __ ret(0);
1670
1671 // Copy in multi-bytes chunks
1672 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1673 __ jmp(L_copy_4_bytes);
1674
1675 return start;
1676 }
1677
1678 address generate_fill(BasicType t, bool aligned, const char *name) {
1679 __ align(CodeEntryAlignment);
1680 StubCodeMark mark(this, "StubRoutines", name);
1681 address start = __ pc();
1682
1683 BLOCK_COMMENT("Entry:");
1684
1685 const Register to = c_rarg0; // source array address
1686 const Register value = c_rarg1; // value
1687 const Register count = c_rarg2; // elements count
1688
1689 __ enter(); // required for proper stackwalking of RuntimeStub frame
1690
1691 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
1692
1693 __ vzeroupper();
1694 __ leave(); // required for proper stackwalking of RuntimeStub frame
1695 __ ret(0);
1696 return start;
1697 }
1698
1699 // Arguments:
1700 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1701 // ignored
1702 // name - stub name string
1703 //
1704 // Inputs:
1705 // c_rarg0 - source array address
1706 // c_rarg1 - destination array address
1707 // c_rarg2 - element count, treated as ssize_t, can be zero
1708 //
1709 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1710 // let the hardware handle it. The two or four words within dwords
1711 // or qwords that span cache line boundaries will still be loaded
1712 // and stored atomically.
1713 //
1714 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
1715 address *entry, const char *name) {
1716 __ align(CodeEntryAlignment);
1717 StubCodeMark mark(this, "StubRoutines", name);
1718 address start = __ pc();
1719
1720 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes;
1721 const Register from = rdi; // source array address
1722 const Register to = rsi; // destination array address
1723 const Register count = rdx; // elements count
1724 const Register word_count = rcx;
1725 const Register qword_count = count;
1726
1727 __ enter(); // required for proper stackwalking of RuntimeStub frame
1728 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1729
1730 if (entry != NULL) {
1731 *entry = __ pc();
1732 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1733 BLOCK_COMMENT("Entry:");
1734 }
1735
1736 array_overlap_test(nooverlap_target, Address::times_2);
1737 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1738 // r9 and r10 may be used to save non-volatile registers
1739
1740 // 'from', 'to' and 'count' are now valid
1741 __ movptr(word_count, count);
1742 __ shrptr(count, 2); // count => qword_count
1743
1744 // Copy from high to low addresses. Use 'to' as scratch.
1745
1746 // Check for and copy trailing word
1747 __ testl(word_count, 1);
1748 __ jccb(Assembler::zero, L_copy_4_bytes);
1749 __ movw(rax, Address(from, word_count, Address::times_2, -2));
1750 __ movw(Address(to, word_count, Address::times_2, -2), rax);
1751
1752 // Check for and copy trailing dword
1753 __ BIND(L_copy_4_bytes);
1754 __ testl(word_count, 2);
1755 __ jcc(Assembler::zero, L_copy_bytes);
1756 __ movl(rax, Address(from, qword_count, Address::times_8));
1757 __ movl(Address(to, qword_count, Address::times_8), rax);
1758 __ jmp(L_copy_bytes);
1759
1760 // Copy trailing qwords
1761 __ BIND(L_copy_8_bytes);
1762 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1763 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1764 __ decrement(qword_count);
1765 __ jcc(Assembler::notZero, L_copy_8_bytes);
1766
1767 restore_arg_regs();
1768 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1769 __ xorptr(rax, rax); // return 0
1770 __ vzeroupper();
1771 __ leave(); // required for proper stackwalking of RuntimeStub frame
1772 __ ret(0);
1773
1774 // Copy in multi-bytes chunks
1775 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1776
1777 restore_arg_regs();
1778 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1779 __ xorptr(rax, rax); // return 0
1780 __ vzeroupper();
1781 __ leave(); // required for proper stackwalking of RuntimeStub frame
1782 __ ret(0);
1783
1784 return start;
1785 }
1786
1787 // Arguments:
1788 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1789 // ignored
1790 // is_oop - true => oop array, so generate store check code
1791 // name - stub name string
1792 //
1793 // Inputs:
1794 // c_rarg0 - source array address
1795 // c_rarg1 - destination array address
1796 // c_rarg2 - element count, treated as ssize_t, can be zero
1797 //
1798 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1799 // the hardware handle it. The two dwords within qwords that span
1800 // cache line boundaries will still be loaded and stored atomicly.
1801 //
1802 // Side Effects:
1803 // disjoint_int_copy_entry is set to the no-overlap entry point
1804 // used by generate_conjoint_int_oop_copy().
1805 //
1806 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
1807 const char *name, bool dest_uninitialized = false) {
1808 __ align(CodeEntryAlignment);
1809 StubCodeMark mark(this, "StubRoutines", name);
1810 address start = __ pc();
1811
1812 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
1813 const Register from = rdi; // source array address
1814 const Register to = rsi; // destination array address
1815 const Register count = rdx; // elements count
1816 const Register dword_count = rcx;
1817 const Register qword_count = count;
1818 const Register end_from = from; // source array end address
1819 const Register end_to = to; // destination array end address
1820 // End pointers are inclusive, and if count is not zero they point
1821 // to the last unit copied: end_to[0] := end_from[0]
1822
1823 __ enter(); // required for proper stackwalking of RuntimeStub frame
1824 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1825
1826 if (entry != NULL) {
1827 *entry = __ pc();
1828 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1829 BLOCK_COMMENT("Entry:");
1830 }
1831
1832 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1833 // r9 and r10 may be used to save non-volatile registers
1834
1835 DecoratorSet decorators = IN_HEAP | IS_ARRAY | ARRAYCOPY_DISJOINT;
1836 if (dest_uninitialized) {
1837 decorators |= IS_DEST_UNINITIALIZED;
1838 }
1839 if (aligned) {
1840 decorators |= ARRAYCOPY_ALIGNED;
1841 }
1842
1843 BasicType type = is_oop ? T_OBJECT : T_INT;
1844 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
1845 bs->arraycopy_prologue(_masm, decorators, type, from, to, count);
1846
1847 // 'from', 'to' and 'count' are now valid
1848 __ movptr(dword_count, count);
1849 __ shrptr(count, 1); // count => qword_count
1850
1851 // Copy from low to high addresses. Use 'to' as scratch.
1852 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1853 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1854 __ negptr(qword_count);
1855 __ jmp(L_copy_bytes);
1856
1857 // Copy trailing qwords
1858 __ BIND(L_copy_8_bytes);
1859 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1860 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1861 __ increment(qword_count);
1862 __ jcc(Assembler::notZero, L_copy_8_bytes);
1863
1864 // Check for and copy trailing dword
1865 __ BIND(L_copy_4_bytes);
1866 __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
1867 __ jccb(Assembler::zero, L_exit);
1868 __ movl(rax, Address(end_from, 8));
1869 __ movl(Address(end_to, 8), rax);
1870
1871 __ BIND(L_exit);
1872 bs->arraycopy_epilogue(_masm, decorators, type, from, to, dword_count);
1873 restore_arg_regs();
1874 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1875 __ vzeroupper();
1876 __ xorptr(rax, rax); // return 0
1877 __ leave(); // required for proper stackwalking of RuntimeStub frame
1878 __ ret(0);
1879
1880 // Copy in multi-bytes chunks
1881 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1882 __ jmp(L_copy_4_bytes);
1883
1884 return start;
1885 }
1886
1887 // Arguments:
1888 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1889 // ignored
1890 // is_oop - true => oop array, so generate store check code
1891 // name - stub name string
1892 //
1893 // Inputs:
1894 // c_rarg0 - source array address
1895 // c_rarg1 - destination array address
1896 // c_rarg2 - element count, treated as ssize_t, can be zero
1897 //
1898 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1899 // the hardware handle it. The two dwords within qwords that span
1900 // cache line boundaries will still be loaded and stored atomicly.
1901 //
1902 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
1903 address *entry, const char *name,
1904 bool dest_uninitialized = false) {
1905 __ align(CodeEntryAlignment);
1906 StubCodeMark mark(this, "StubRoutines", name);
1907 address start = __ pc();
1908
1909 Label L_copy_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1910 const Register from = rdi; // source array address
1911 const Register to = rsi; // destination array address
1912 const Register count = rdx; // elements count
1913 const Register dword_count = rcx;
1914 const Register qword_count = count;
1915
1916 __ enter(); // required for proper stackwalking of RuntimeStub frame
1917 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1918
1919 if (entry != NULL) {
1920 *entry = __ pc();
1921 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1922 BLOCK_COMMENT("Entry:");
1923 }
1924
1925 array_overlap_test(nooverlap_target, Address::times_4);
1926 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1927 // r9 and r10 may be used to save non-volatile registers
1928
1929 DecoratorSet decorators = IN_HEAP | IS_ARRAY;
1930 if (dest_uninitialized) {
1931 decorators |= IS_DEST_UNINITIALIZED;
1932 }
1933 if (aligned) {
1934 decorators |= ARRAYCOPY_ALIGNED;
1935 }
1936
1937 BasicType type = is_oop ? T_OBJECT : T_INT;
1938 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
1939 // no registers are destroyed by this call
1940 bs->arraycopy_prologue(_masm, decorators, type, from, to, count);
1941
1942 assert_clean_int(count, rax); // Make sure 'count' is clean int.
1943 // 'from', 'to' and 'count' are now valid
1944 __ movptr(dword_count, count);
1945 __ shrptr(count, 1); // count => qword_count
1946
1947 // Copy from high to low addresses. Use 'to' as scratch.
1948
1949 // Check for and copy trailing dword
1950 __ testl(dword_count, 1);
1951 __ jcc(Assembler::zero, L_copy_bytes);
1952 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
1953 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
1954 __ jmp(L_copy_bytes);
1955
1956 // Copy trailing qwords
1957 __ BIND(L_copy_8_bytes);
1958 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1959 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1960 __ decrement(qword_count);
1961 __ jcc(Assembler::notZero, L_copy_8_bytes);
1962
1963 if (is_oop) {
1964 __ jmp(L_exit);
1965 }
1966 restore_arg_regs();
1967 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1968 __ xorptr(rax, rax); // return 0
1969 __ vzeroupper();
1970 __ leave(); // required for proper stackwalking of RuntimeStub frame
1971 __ ret(0);
1972
1973 // Copy in multi-bytes chunks
1974 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1975
1976 __ BIND(L_exit);
1977 bs->arraycopy_epilogue(_masm, decorators, type, from, to, dword_count);
1978 restore_arg_regs();
1979 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1980 __ xorptr(rax, rax); // return 0
1981 __ vzeroupper();
1982 __ leave(); // required for proper stackwalking of RuntimeStub frame
1983 __ ret(0);
1984
1985 return start;
1986 }
1987
1988 // Arguments:
1989 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
1990 // ignored
1991 // is_oop - true => oop array, so generate store check code
1992 // name - stub name string
1993 //
1994 // Inputs:
1995 // c_rarg0 - source array address
1996 // c_rarg1 - destination array address
1997 // c_rarg2 - element count, treated as ssize_t, can be zero
1998 //
1999 // Side Effects:
2000 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
2001 // no-overlap entry point used by generate_conjoint_long_oop_copy().
2002 //
2003 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
2004 const char *name, bool dest_uninitialized = false) {
2005 __ align(CodeEntryAlignment);
2006 StubCodeMark mark(this, "StubRoutines", name);
2007 address start = __ pc();
2008
2009 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2010 const Register from = rdi; // source array address
2011 const Register to = rsi; // destination array address
2012 const Register qword_count = rdx; // elements count
2013 const Register end_from = from; // source array end address
2014 const Register end_to = rcx; // destination array end address
2015 const Register saved_count = r11;
2016 // End pointers are inclusive, and if count is not zero they point
2017 // to the last unit copied: end_to[0] := end_from[0]
2018
2019 __ enter(); // required for proper stackwalking of RuntimeStub frame
2020 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
2021 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2022
2023 if (entry != NULL) {
2024 *entry = __ pc();
2025 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2026 BLOCK_COMMENT("Entry:");
2027 }
2028
2029 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2030 // r9 and r10 may be used to save non-volatile registers
2031 // 'from', 'to' and 'qword_count' are now valid
2032
2033 DecoratorSet decorators = IN_HEAP | IS_ARRAY | ARRAYCOPY_DISJOINT;
2034 if (dest_uninitialized) {
2035 decorators |= IS_DEST_UNINITIALIZED;
2036 }
2037 if (aligned) {
2038 decorators |= ARRAYCOPY_ALIGNED;
2039 }
2040
2041 BasicType type = is_oop ? T_OBJECT : T_LONG;
2042 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
2043 bs->arraycopy_prologue(_masm, decorators, type, from, to, qword_count);
2044
2045 // Copy from low to high addresses. Use 'to' as scratch.
2046 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
2047 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
2048 __ negptr(qword_count);
2049 __ jmp(L_copy_bytes);
2050
2051 // Copy trailing qwords
2052 __ BIND(L_copy_8_bytes);
2053 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
2054 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
2055 __ increment(qword_count);
2056 __ jcc(Assembler::notZero, L_copy_8_bytes);
2057
2058 if (is_oop) {
2059 __ jmp(L_exit);
2060 } else {
2061 restore_arg_regs();
2062 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2063 __ xorptr(rax, rax); // return 0
2064 __ vzeroupper();
2065 __ leave(); // required for proper stackwalking of RuntimeStub frame
2066 __ ret(0);
2067 }
2068
2069 // Copy in multi-bytes chunks
2070 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2071
2072 __ BIND(L_exit);
2073 bs->arraycopy_epilogue(_masm, decorators, type, from, to, qword_count);
2074 restore_arg_regs();
2075 if (is_oop) {
2076 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2077 } else {
2078 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2079 }
2080 __ vzeroupper();
2081 __ xorptr(rax, rax); // return 0
2082 __ leave(); // required for proper stackwalking of RuntimeStub frame
2083 __ ret(0);
2084
2085 return start;
2086 }
2087
2088 // Arguments:
2089 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2090 // ignored
2091 // is_oop - true => oop array, so generate store check code
2092 // name - stub name string
2093 //
2094 // Inputs:
2095 // c_rarg0 - source array address
2096 // c_rarg1 - destination array address
2097 // c_rarg2 - element count, treated as ssize_t, can be zero
2098 //
2099 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
2100 address nooverlap_target, address *entry,
2101 const char *name, bool dest_uninitialized = false) {
2102 __ align(CodeEntryAlignment);
2103 StubCodeMark mark(this, "StubRoutines", name);
2104 address start = __ pc();
2105
2106 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2107 const Register from = rdi; // source array address
2108 const Register to = rsi; // destination array address
2109 const Register qword_count = rdx; // elements count
2110 const Register saved_count = rcx;
2111
2112 __ enter(); // required for proper stackwalking of RuntimeStub frame
2113 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2114
2115 if (entry != NULL) {
2116 *entry = __ pc();
2117 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2118 BLOCK_COMMENT("Entry:");
2119 }
2120
2121 array_overlap_test(nooverlap_target, Address::times_8);
2122 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2123 // r9 and r10 may be used to save non-volatile registers
2124 // 'from', 'to' and 'qword_count' are now valid
2125
2126 DecoratorSet decorators = IN_HEAP | IS_ARRAY | ARRAYCOPY_DISJOINT;
2127 if (dest_uninitialized) {
2128 decorators |= IS_DEST_UNINITIALIZED;
2129 }
2130 if (aligned) {
2131 decorators |= ARRAYCOPY_ALIGNED;
2132 }
2133
2134 BasicType type = is_oop ? T_OBJECT : T_LONG;
2135 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
2136 bs->arraycopy_prologue(_masm, decorators, type, from, to, qword_count);
2137
2138 __ jmp(L_copy_bytes);
2139
2140 // Copy trailing qwords
2141 __ BIND(L_copy_8_bytes);
2142 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2143 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2144 __ decrement(qword_count);
2145 __ jcc(Assembler::notZero, L_copy_8_bytes);
2146
2147 if (is_oop) {
2148 __ jmp(L_exit);
2149 } else {
2150 restore_arg_regs();
2151 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2152 __ xorptr(rax, rax); // return 0
2153 __ vzeroupper();
2154 __ leave(); // required for proper stackwalking of RuntimeStub frame
2155 __ ret(0);
2156 }
2157
2158 // Copy in multi-bytes chunks
2159 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2160
2161 __ BIND(L_exit);
2162 bs->arraycopy_epilogue(_masm, decorators, type, from, to, qword_count);
2163 restore_arg_regs();
2164 if (is_oop) {
2165 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2166 } else {
2167 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2168 }
2169 __ vzeroupper();
2170 __ xorptr(rax, rax); // return 0
2171 __ leave(); // required for proper stackwalking of RuntimeStub frame
2172 __ ret(0);
2173
2174 return start;
2175 }
2176
2177
2178 // Helper for generating a dynamic type check.
2179 // Smashes no registers.
2180 void generate_type_check(Register sub_klass,
2181 Register super_check_offset,
2182 Register super_klass,
2183 Label& L_success) {
2184 assert_different_registers(sub_klass, super_check_offset, super_klass);
2185
2186 BLOCK_COMMENT("type_check:");
2187
2188 Label L_miss;
2189
2190 __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
2191 super_check_offset);
2192 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
2193
2194 // Fall through on failure!
2195 __ BIND(L_miss);
2196 }
2197
2198 //
2199 // Generate checkcasting array copy stub
2200 //
2201 // Input:
2202 // c_rarg0 - source array address
2203 // c_rarg1 - destination array address
2204 // c_rarg2 - element count, treated as ssize_t, can be zero
2205 // c_rarg3 - size_t ckoff (super_check_offset)
2206 // not Win64
2207 // c_rarg4 - oop ckval (super_klass)
2208 // Win64
2209 // rsp+40 - oop ckval (super_klass)
2210 //
2211 // Output:
2212 // rax == 0 - success
2213 // rax == -1^K - failure, where K is partial transfer count
2214 //
2215 address generate_checkcast_copy(const char *name, address *entry,
2216 bool dest_uninitialized = false) {
2217
2218 Label L_load_element, L_store_element, L_do_card_marks, L_done;
2219
2220 // Input registers (after setup_arg_regs)
2221 const Register from = rdi; // source array address
2222 const Register to = rsi; // destination array address
2223 const Register length = rdx; // elements count
2224 const Register ckoff = rcx; // super_check_offset
2225 const Register ckval = r8; // super_klass
2226
2227 // Registers used as temps (r13, r14 are save-on-entry)
2228 const Register end_from = from; // source array end address
2229 const Register end_to = r13; // destination array end address
2230 const Register count = rdx; // -(count_remaining)
2231 const Register r14_length = r14; // saved copy of length
2232 // End pointers are inclusive, and if length is not zero they point
2233 // to the last unit copied: end_to[0] := end_from[0]
2234
2235 const Register rax_oop = rax; // actual oop copied
2236 const Register r11_klass = r11; // oop._klass
2237
2238 //---------------------------------------------------------------
2239 // Assembler stub will be used for this call to arraycopy
2240 // if the two arrays are subtypes of Object[] but the
2241 // destination array type is not equal to or a supertype
2242 // of the source type. Each element must be separately
2243 // checked.
2244
2245 __ align(CodeEntryAlignment);
2246 StubCodeMark mark(this, "StubRoutines", name);
2247 address start = __ pc();
2248
2249 __ enter(); // required for proper stackwalking of RuntimeStub frame
2250
2251 #ifdef ASSERT
2252 // caller guarantees that the arrays really are different
2253 // otherwise, we would have to make conjoint checks
2254 { Label L;
2255 array_overlap_test(L, TIMES_OOP);
2256 __ stop("checkcast_copy within a single array");
2257 __ bind(L);
2258 }
2259 #endif //ASSERT
2260
2261 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
2262 // ckoff => rcx, ckval => r8
2263 // r9 and r10 may be used to save non-volatile registers
2264 #ifdef _WIN64
2265 // last argument (#4) is on stack on Win64
2266 __ movptr(ckval, Address(rsp, 6 * wordSize));
2267 #endif
2268
2269 // Caller of this entry point must set up the argument registers.
2270 if (entry != NULL) {
2271 *entry = __ pc();
2272 BLOCK_COMMENT("Entry:");
2273 }
2274
2275 // allocate spill slots for r13, r14
2276 enum {
2277 saved_r13_offset,
2278 saved_r14_offset,
2279 saved_rbp_offset
2280 };
2281 __ subptr(rsp, saved_rbp_offset * wordSize);
2282 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
2283 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
2284
2285 // check that int operands are properly extended to size_t
2286 assert_clean_int(length, rax);
2287 assert_clean_int(ckoff, rax);
2288
2289 #ifdef ASSERT
2290 BLOCK_COMMENT("assert consistent ckoff/ckval");
2291 // The ckoff and ckval must be mutually consistent,
2292 // even though caller generates both.
2293 { Label L;
2294 int sco_offset = in_bytes(Klass::super_check_offset_offset());
2295 __ cmpl(ckoff, Address(ckval, sco_offset));
2296 __ jcc(Assembler::equal, L);
2297 __ stop("super_check_offset inconsistent");
2298 __ bind(L);
2299 }
2300 #endif //ASSERT
2301
2302 // Loop-invariant addresses. They are exclusive end pointers.
2303 Address end_from_addr(from, length, TIMES_OOP, 0);
2304 Address end_to_addr(to, length, TIMES_OOP, 0);
2305 // Loop-variant addresses. They assume post-incremented count < 0.
2306 Address from_element_addr(end_from, count, TIMES_OOP, 0);
2307 Address to_element_addr(end_to, count, TIMES_OOP, 0);
2308
2309 DecoratorSet decorators = IN_HEAP | IS_ARRAY | ARRAYCOPY_CHECKCAST;
2310 if (dest_uninitialized) {
2311 decorators |= IS_DEST_UNINITIALIZED;
2312 }
2313
2314 BasicType type = T_OBJECT;
2315 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
2316 bs->arraycopy_prologue(_masm, decorators, type, from, to, count);
2317
2318 // Copy from low to high addresses, indexed from the end of each array.
2319 __ lea(end_from, end_from_addr);
2320 __ lea(end_to, end_to_addr);
2321 __ movptr(r14_length, length); // save a copy of the length
2322 assert(length == count, ""); // else fix next line:
2323 __ negptr(count); // negate and test the length
2324 __ jcc(Assembler::notZero, L_load_element);
2325
2326 // Empty array: Nothing to do.
2327 __ xorptr(rax, rax); // return 0 on (trivial) success
2328 __ jmp(L_done);
2329
2330 // ======== begin loop ========
2331 // (Loop is rotated; its entry is L_load_element.)
2332 // Loop control:
2333 // for (count = -count; count != 0; count++)
2334 // Base pointers src, dst are biased by 8*(count-1),to last element.
2335 __ align(OptoLoopAlignment);
2336
2337 __ BIND(L_store_element);
2338 __ store_heap_oop(to_element_addr, rax_oop, noreg, noreg, AS_RAW); // store the oop
2339 __ increment(count); // increment the count toward zero
2340 __ jcc(Assembler::zero, L_do_card_marks);
2341
2342 // ======== loop entry is here ========
2343 __ BIND(L_load_element);
2344 __ load_heap_oop(rax_oop, from_element_addr, noreg, noreg, AS_RAW); // load the oop
2345 __ testptr(rax_oop, rax_oop);
2346 __ jcc(Assembler::zero, L_store_element);
2347
2348 __ load_klass(r11_klass, rax_oop);// query the object klass
2349 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
2350 // ======== end loop ========
2351
2352 // It was a real error; we must depend on the caller to finish the job.
2353 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
2354 // Emit GC store barriers for the oops we have copied (r14 + rdx),
2355 // and report their number to the caller.
2356 assert_different_registers(rax, r14_length, count, to, end_to, rcx, rscratch1);
2357 Label L_post_barrier;
2358 __ addptr(r14_length, count); // K = (original - remaining) oops
2359 __ movptr(rax, r14_length); // save the value
2360 __ notptr(rax); // report (-1^K) to caller (does not affect flags)
2361 __ jccb(Assembler::notZero, L_post_barrier);
2362 __ jmp(L_done); // K == 0, nothing was copied, skip post barrier
2363
2364 // Come here on success only.
2365 __ BIND(L_do_card_marks);
2366 __ xorptr(rax, rax); // return 0 on success
2367
2368 __ BIND(L_post_barrier);
2369 bs->arraycopy_epilogue(_masm, decorators, type, from, to, r14_length);
2370
2371 // Common exit point (success or failure).
2372 __ BIND(L_done);
2373 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
2374 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
2375 restore_arg_regs();
2376 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
2377 __ leave(); // required for proper stackwalking of RuntimeStub frame
2378 __ ret(0);
2379
2380 return start;
2381 }
2382
2383 //
2384 // Generate 'unsafe' array copy stub
2385 // Though just as safe as the other stubs, it takes an unscaled
2386 // size_t argument instead of an element count.
2387 //
2388 // Input:
2389 // c_rarg0 - source array address
2390 // c_rarg1 - destination array address
2391 // c_rarg2 - byte count, treated as ssize_t, can be zero
2392 //
2393 // Examines the alignment of the operands and dispatches
2394 // to a long, int, short, or byte copy loop.
2395 //
2396 address generate_unsafe_copy(const char *name,
2397 address byte_copy_entry, address short_copy_entry,
2398 address int_copy_entry, address long_copy_entry) {
2399
2400 Label L_long_aligned, L_int_aligned, L_short_aligned;
2401
2402 // Input registers (before setup_arg_regs)
2403 const Register from = c_rarg0; // source array address
2404 const Register to = c_rarg1; // destination array address
2405 const Register size = c_rarg2; // byte count (size_t)
2406
2407 // Register used as a temp
2408 const Register bits = rax; // test copy of low bits
2409
2410 __ align(CodeEntryAlignment);
2411 StubCodeMark mark(this, "StubRoutines", name);
2412 address start = __ pc();
2413
2414 __ enter(); // required for proper stackwalking of RuntimeStub frame
2415
2416 // bump this on entry, not on exit:
2417 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
2418
2419 __ mov(bits, from);
2420 __ orptr(bits, to);
2421 __ orptr(bits, size);
2422
2423 __ testb(bits, BytesPerLong-1);
2424 __ jccb(Assembler::zero, L_long_aligned);
2425
2426 __ testb(bits, BytesPerInt-1);
2427 __ jccb(Assembler::zero, L_int_aligned);
2428
2429 __ testb(bits, BytesPerShort-1);
2430 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
2431
2432 __ BIND(L_short_aligned);
2433 __ shrptr(size, LogBytesPerShort); // size => short_count
2434 __ jump(RuntimeAddress(short_copy_entry));
2435
2436 __ BIND(L_int_aligned);
2437 __ shrptr(size, LogBytesPerInt); // size => int_count
2438 __ jump(RuntimeAddress(int_copy_entry));
2439
2440 __ BIND(L_long_aligned);
2441 __ shrptr(size, LogBytesPerLong); // size => qword_count
2442 __ jump(RuntimeAddress(long_copy_entry));
2443
2444 return start;
2445 }
2446
2447 // Perform range checks on the proposed arraycopy.
2448 // Kills temp, but nothing else.
2449 // Also, clean the sign bits of src_pos and dst_pos.
2450 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
2451 Register src_pos, // source position (c_rarg1)
2452 Register dst, // destination array oo (c_rarg2)
2453 Register dst_pos, // destination position (c_rarg3)
2454 Register length,
2455 Register temp,
2456 Label& L_failed) {
2457 BLOCK_COMMENT("arraycopy_range_checks:");
2458
2459 // if (src_pos + length > arrayOop(src)->length()) FAIL;
2460 __ movl(temp, length);
2461 __ addl(temp, src_pos); // src_pos + length
2462 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
2463 __ jcc(Assembler::above, L_failed);
2464
2465 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
2466 __ movl(temp, length);
2467 __ addl(temp, dst_pos); // dst_pos + length
2468 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
2469 __ jcc(Assembler::above, L_failed);
2470
2471 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
2472 // Move with sign extension can be used since they are positive.
2473 __ movslq(src_pos, src_pos);
2474 __ movslq(dst_pos, dst_pos);
2475
2476 BLOCK_COMMENT("arraycopy_range_checks done");
2477 }
2478
2479 //
2480 // Generate generic array copy stubs
2481 //
2482 // Input:
2483 // c_rarg0 - src oop
2484 // c_rarg1 - src_pos (32-bits)
2485 // c_rarg2 - dst oop
2486 // c_rarg3 - dst_pos (32-bits)
2487 // not Win64
2488 // c_rarg4 - element count (32-bits)
2489 // Win64
2490 // rsp+40 - element count (32-bits)
2491 //
2492 // Output:
2493 // rax == 0 - success
2494 // rax == -1^K - failure, where K is partial transfer count
2495 //
2496 address generate_generic_copy(const char *name,
2497 address byte_copy_entry, address short_copy_entry,
2498 address int_copy_entry, address oop_copy_entry,
2499 address long_copy_entry, address checkcast_copy_entry) {
2500
2501 Label L_failed, L_failed_0, L_objArray;
2502 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
2503
2504 // Input registers
2505 const Register src = c_rarg0; // source array oop
2506 const Register src_pos = c_rarg1; // source position
2507 const Register dst = c_rarg2; // destination array oop
2508 const Register dst_pos = c_rarg3; // destination position
2509 #ifndef _WIN64
2510 const Register length = c_rarg4;
2511 #else
2512 const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
2513 #endif
2514
2515 { int modulus = CodeEntryAlignment;
2516 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
2517 int advance = target - (__ offset() % modulus);
2518 if (advance < 0) advance += modulus;
2519 if (advance > 0) __ nop(advance);
2520 }
2521 StubCodeMark mark(this, "StubRoutines", name);
2522
2523 // Short-hop target to L_failed. Makes for denser prologue code.
2524 __ BIND(L_failed_0);
2525 __ jmp(L_failed);
2526 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
2527
2528 __ align(CodeEntryAlignment);
2529 address start = __ pc();
2530
2531 __ enter(); // required for proper stackwalking of RuntimeStub frame
2532
2533 // bump this on entry, not on exit:
2534 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
2535
2536 //-----------------------------------------------------------------------
2537 // Assembler stub will be used for this call to arraycopy
2538 // if the following conditions are met:
2539 //
2540 // (1) src and dst must not be null.
2541 // (2) src_pos must not be negative.
2542 // (3) dst_pos must not be negative.
2543 // (4) length must not be negative.
2544 // (5) src klass and dst klass should be the same and not NULL.
2545 // (6) src and dst should be arrays.
2546 // (7) src_pos + length must not exceed length of src.
2547 // (8) dst_pos + length must not exceed length of dst.
2548 //
2549
2550 // if (src == NULL) return -1;
2551 __ testptr(src, src); // src oop
2552 size_t j1off = __ offset();
2553 __ jccb(Assembler::zero, L_failed_0);
2554
2555 // if (src_pos < 0) return -1;
2556 __ testl(src_pos, src_pos); // src_pos (32-bits)
2557 __ jccb(Assembler::negative, L_failed_0);
2558
2559 // if (dst == NULL) return -1;
2560 __ testptr(dst, dst); // dst oop
2561 __ jccb(Assembler::zero, L_failed_0);
2562
2563 // if (dst_pos < 0) return -1;
2564 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
2565 size_t j4off = __ offset();
2566 __ jccb(Assembler::negative, L_failed_0);
2567
2568 // The first four tests are very dense code,
2569 // but not quite dense enough to put four
2570 // jumps in a 16-byte instruction fetch buffer.
2571 // That's good, because some branch predicters
2572 // do not like jumps so close together.
2573 // Make sure of this.
2574 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
2575
2576 // registers used as temp
2577 const Register r11_length = r11; // elements count to copy
2578 const Register r10_src_klass = r10; // array klass
2579
2580 // if (length < 0) return -1;
2581 __ movl(r11_length, length); // length (elements count, 32-bits value)
2582 __ testl(r11_length, r11_length);
2583 __ jccb(Assembler::negative, L_failed_0);
2584
2585 __ load_klass(r10_src_klass, src);
2586 #ifdef ASSERT
2587 // assert(src->klass() != NULL);
2588 {
2589 BLOCK_COMMENT("assert klasses not null {");
2590 Label L1, L2;
2591 __ testptr(r10_src_klass, r10_src_klass);
2592 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
2593 __ bind(L1);
2594 __ stop("broken null klass");
2595 __ bind(L2);
2596 __ load_klass(rax, dst);
2597 __ cmpq(rax, 0);
2598 __ jcc(Assembler::equal, L1); // this would be broken also
2599 BLOCK_COMMENT("} assert klasses not null done");
2600 }
2601 #endif
2602
2603 // Load layout helper (32-bits)
2604 //
2605 // |array_tag| | header_size | element_type | |log2_element_size|
2606 // 32 30 24 16 8 2 0
2607 //
2608 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
2609 //
2610
2611 const int lh_offset = in_bytes(Klass::layout_helper_offset());
2612
2613 // Handle objArrays completely differently...
2614 const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
2615 __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
2616 __ jcc(Assembler::equal, L_objArray);
2617
2618 // if (src->klass() != dst->klass()) return -1;
2619 __ load_klass(rax, dst);
2620 __ cmpq(r10_src_klass, rax);
2621 __ jcc(Assembler::notEqual, L_failed);
2622
2623 const Register rax_lh = rax; // layout helper
2624 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
2625
2626 // if (!src->is_Array()) return -1;
2627 __ cmpl(rax_lh, Klass::_lh_neutral_value);
2628 __ jcc(Assembler::greaterEqual, L_failed);
2629
2630 // At this point, it is known to be a typeArray (array_tag 0x3).
2631 #ifdef ASSERT
2632 {
2633 BLOCK_COMMENT("assert primitive array {");
2634 Label L;
2635 __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
2636 __ jcc(Assembler::greaterEqual, L);
2637 __ stop("must be a primitive array");
2638 __ bind(L);
2639 BLOCK_COMMENT("} assert primitive array done");
2640 }
2641 #endif
2642
2643 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2644 r10, L_failed);
2645
2646 // TypeArrayKlass
2647 //
2648 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
2649 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
2650 //
2651
2652 const Register r10_offset = r10; // array offset
2653 const Register rax_elsize = rax_lh; // element size
2654
2655 __ movl(r10_offset, rax_lh);
2656 __ shrl(r10_offset, Klass::_lh_header_size_shift);
2657 __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
2658 __ addptr(src, r10_offset); // src array offset
2659 __ addptr(dst, r10_offset); // dst array offset
2660 BLOCK_COMMENT("choose copy loop based on element size");
2661 __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
2662
2663 // next registers should be set before the jump to corresponding stub
2664 const Register from = c_rarg0; // source array address
2665 const Register to = c_rarg1; // destination array address
2666 const Register count = c_rarg2; // elements count
2667
2668 // 'from', 'to', 'count' registers should be set in such order
2669 // since they are the same as 'src', 'src_pos', 'dst'.
2670
2671 __ BIND(L_copy_bytes);
2672 __ cmpl(rax_elsize, 0);
2673 __ jccb(Assembler::notEqual, L_copy_shorts);
2674 __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
2675 __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
2676 __ movl2ptr(count, r11_length); // length
2677 __ jump(RuntimeAddress(byte_copy_entry));
2678
2679 __ BIND(L_copy_shorts);
2680 __ cmpl(rax_elsize, LogBytesPerShort);
2681 __ jccb(Assembler::notEqual, L_copy_ints);
2682 __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
2683 __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
2684 __ movl2ptr(count, r11_length); // length
2685 __ jump(RuntimeAddress(short_copy_entry));
2686
2687 __ BIND(L_copy_ints);
2688 __ cmpl(rax_elsize, LogBytesPerInt);
2689 __ jccb(Assembler::notEqual, L_copy_longs);
2690 __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
2691 __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
2692 __ movl2ptr(count, r11_length); // length
2693 __ jump(RuntimeAddress(int_copy_entry));
2694
2695 __ BIND(L_copy_longs);
2696 #ifdef ASSERT
2697 {
2698 BLOCK_COMMENT("assert long copy {");
2699 Label L;
2700 __ cmpl(rax_elsize, LogBytesPerLong);
2701 __ jcc(Assembler::equal, L);
2702 __ stop("must be long copy, but elsize is wrong");
2703 __ bind(L);
2704 BLOCK_COMMENT("} assert long copy done");
2705 }
2706 #endif
2707 __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
2708 __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
2709 __ movl2ptr(count, r11_length); // length
2710 __ jump(RuntimeAddress(long_copy_entry));
2711
2712 // ObjArrayKlass
2713 __ BIND(L_objArray);
2714 // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
2715
2716 Label L_plain_copy, L_checkcast_copy;
2717 // test array classes for subtyping
2718 __ load_klass(rax, dst);
2719 __ cmpq(r10_src_klass, rax); // usual case is exact equality
2720 __ jcc(Assembler::notEqual, L_checkcast_copy);
2721
2722 // Identically typed arrays can be copied without element-wise checks.
2723 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2724 r10, L_failed);
2725
2726 __ lea(from, Address(src, src_pos, TIMES_OOP,
2727 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
2728 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2729 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
2730 __ movl2ptr(count, r11_length); // length
2731 __ BIND(L_plain_copy);
2732 __ jump(RuntimeAddress(oop_copy_entry));
2733
2734 __ BIND(L_checkcast_copy);
2735 // live at this point: r10_src_klass, r11_length, rax (dst_klass)
2736 {
2737 // Before looking at dst.length, make sure dst is also an objArray.
2738 __ cmpl(Address(rax, lh_offset), objArray_lh);
2739 __ jcc(Assembler::notEqual, L_failed);
2740
2741 // It is safe to examine both src.length and dst.length.
2742 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2743 rax, L_failed);
2744
2745 const Register r11_dst_klass = r11;
2746 __ load_klass(r11_dst_klass, dst); // reload
2747
2748 // Marshal the base address arguments now, freeing registers.
2749 __ lea(from, Address(src, src_pos, TIMES_OOP,
2750 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2751 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2752 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2753 __ movl(count, length); // length (reloaded)
2754 Register sco_temp = c_rarg3; // this register is free now
2755 assert_different_registers(from, to, count, sco_temp,
2756 r11_dst_klass, r10_src_klass);
2757 assert_clean_int(count, sco_temp);
2758
2759 // Generate the type check.
2760 const int sco_offset = in_bytes(Klass::super_check_offset_offset());
2761 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2762 assert_clean_int(sco_temp, rax);
2763 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
2764
2765 // Fetch destination element klass from the ObjArrayKlass header.
2766 int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
2767 __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2768 __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
2769 assert_clean_int(sco_temp, rax);
2770
2771 // the checkcast_copy loop needs two extra arguments:
2772 assert(c_rarg3 == sco_temp, "#3 already in place");
2773 // Set up arguments for checkcast_copy_entry.
2774 setup_arg_regs(4);
2775 __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
2776 __ jump(RuntimeAddress(checkcast_copy_entry));
2777 }
2778
2779 __ BIND(L_failed);
2780 __ xorptr(rax, rax);
2781 __ notptr(rax); // return -1
2782 __ leave(); // required for proper stackwalking of RuntimeStub frame
2783 __ ret(0);
2784
2785 return start;
2786 }
2787
2788 address generate_data_cache_writeback() {
2789 bool optimized = VM_Version::supports_clflushopt();
2790 bool no_evict = VM_Version::supports_clwb();
2791
2792 const Register src = c_rarg0; // source address
2793
2794 __ align(CodeEntryAlignment);
2795
2796 StubCodeMark mark(this, "StubRoutines", "_data_cache_writeback");
2797
2798 address start = __ pc();
2799 __ enter();
2800 const Address line(src, 0);
2801 __ cache_wb(line);
2802 __ leave();
2803 __ ret(0);
2804
2805 return start;
2806 }
2807
2808 address generate_data_cache_writeback_sync() {
2809 const Register is_pre = c_rarg0; // pre or post sync
2810
2811 __ align(CodeEntryAlignment);
2812
2813 StubCodeMark mark(this, "StubRoutines", "_data_cache_writeback_sync");
2814
2815 // pre wbsync is a no-op
2816 // post wbsync translates to an sfence
2817
2818 Label skip;
2819 address start = __ pc();
2820 __ enter();
2821 __ cmpl(is_pre, 0);
2822 __ jcc(Assembler::notEqual, skip);
2823 __ cache_wbsync(false);
2824 __ bind(skip);
2825 __ leave();
2826 __ ret(0);
2827
2828 return start;
2829 }
2830
2831 void generate_arraycopy_stubs() {
2832 address entry;
2833 address entry_jbyte_arraycopy;
2834 address entry_jshort_arraycopy;
2835 address entry_jint_arraycopy;
2836 address entry_oop_arraycopy;
2837 address entry_jlong_arraycopy;
2838 address entry_checkcast_arraycopy;
2839
2840 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
2841 "jbyte_disjoint_arraycopy");
2842 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
2843 "jbyte_arraycopy");
2844
2845 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
2846 "jshort_disjoint_arraycopy");
2847 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
2848 "jshort_arraycopy");
2849
2850 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
2851 "jint_disjoint_arraycopy");
2852 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
2853 &entry_jint_arraycopy, "jint_arraycopy");
2854
2855 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
2856 "jlong_disjoint_arraycopy");
2857 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
2858 &entry_jlong_arraycopy, "jlong_arraycopy");
2859
2860
2861 if (UseCompressedOops) {
2862 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
2863 "oop_disjoint_arraycopy");
2864 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
2865 &entry_oop_arraycopy, "oop_arraycopy");
2866 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
2867 "oop_disjoint_arraycopy_uninit",
2868 /*dest_uninitialized*/true);
2869 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
2870 NULL, "oop_arraycopy_uninit",
2871 /*dest_uninitialized*/true);
2872 } else {
2873 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
2874 "oop_disjoint_arraycopy");
2875 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
2876 &entry_oop_arraycopy, "oop_arraycopy");
2877 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
2878 "oop_disjoint_arraycopy_uninit",
2879 /*dest_uninitialized*/true);
2880 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
2881 NULL, "oop_arraycopy_uninit",
2882 /*dest_uninitialized*/true);
2883 }
2884
2885 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
2886 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
2887 /*dest_uninitialized*/true);
2888
2889 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
2890 entry_jbyte_arraycopy,
2891 entry_jshort_arraycopy,
2892 entry_jint_arraycopy,
2893 entry_jlong_arraycopy);
2894 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
2895 entry_jbyte_arraycopy,
2896 entry_jshort_arraycopy,
2897 entry_jint_arraycopy,
2898 entry_oop_arraycopy,
2899 entry_jlong_arraycopy,
2900 entry_checkcast_arraycopy);
2901
2902 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
2903 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
2904 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
2905 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
2906 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
2907 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
2908
2909 // We don't generate specialized code for HeapWord-aligned source
2910 // arrays, so just use the code we've already generated
2911 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
2912 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
2913
2914 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
2915 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
2916
2917 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
2918 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
2919
2920 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
2921 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
2922
2923 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
2924 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2925
2926 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
2927 StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
2928 }
2929
2930 // AES intrinsic stubs
2931 enum {AESBlockSize = 16};
2932
2933 address generate_key_shuffle_mask() {
2934 __ align(16);
2935 StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
2936 address start = __ pc();
2937 __ emit_data64( 0x0405060700010203, relocInfo::none );
2938 __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
2939 return start;
2940 }
2941
2942 address generate_counter_shuffle_mask() {
2943 __ align(16);
2944 StubCodeMark mark(this, "StubRoutines", "counter_shuffle_mask");
2945 address start = __ pc();
2946 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
2947 __ emit_data64(0x0001020304050607, relocInfo::none);
2948 return start;
2949 }
2950
2951 // Utility routine for loading a 128-bit key word in little endian format
2952 // can optionally specify that the shuffle mask is already in an xmmregister
2953 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
2954 __ movdqu(xmmdst, Address(key, offset));
2955 if (xmm_shuf_mask != NULL) {
2956 __ pshufb(xmmdst, xmm_shuf_mask);
2957 } else {
2958 __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
2959 }
2960 }
2961
2962 // Utility routine for increase 128bit counter (iv in CTR mode)
2963 void inc_counter(Register reg, XMMRegister xmmdst, int inc_delta, Label& next_block) {
2964 __ pextrq(reg, xmmdst, 0x0);
2965 __ addq(reg, inc_delta);
2966 __ pinsrq(xmmdst, reg, 0x0);
2967 __ jcc(Assembler::carryClear, next_block); // jump if no carry
2968 __ pextrq(reg, xmmdst, 0x01); // Carry
2969 __ addq(reg, 0x01);
2970 __ pinsrq(xmmdst, reg, 0x01); //Carry end
2971 __ BIND(next_block); // next instruction
2972 }
2973
2974 // Arguments:
2975 //
2976 // Inputs:
2977 // c_rarg0 - source byte array address
2978 // c_rarg1 - destination byte array address
2979 // c_rarg2 - K (key) in little endian int array
2980 //
2981 address generate_aescrypt_encryptBlock() {
2982 assert(UseAES, "need AES instructions and misaligned SSE support");
2983 __ align(CodeEntryAlignment);
2984 StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
2985 Label L_doLast;
2986 address start = __ pc();
2987
2988 const Register from = c_rarg0; // source array address
2989 const Register to = c_rarg1; // destination array address
2990 const Register key = c_rarg2; // key array address
2991 const Register keylen = rax;
2992
2993 const XMMRegister xmm_result = xmm0;
2994 const XMMRegister xmm_key_shuf_mask = xmm1;
2995 // On win64 xmm6-xmm15 must be preserved so don't use them.
2996 const XMMRegister xmm_temp1 = xmm2;
2997 const XMMRegister xmm_temp2 = xmm3;
2998 const XMMRegister xmm_temp3 = xmm4;
2999 const XMMRegister xmm_temp4 = xmm5;
3000
3001 __ enter(); // required for proper stackwalking of RuntimeStub frame
3002
3003 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3004 // context for the registers used, where all instructions below are using 128-bit mode
3005 // On EVEX without VL and BW, these instructions will all be AVX.
3006 if (VM_Version::supports_avx512vlbw()) {
3007 __ movl(rax, 0xffff);
3008 __ kmovql(k1, rax);
3009 }
3010
3011 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3012 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3013
3014 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3015 __ movdqu(xmm_result, Address(from, 0)); // get 16 bytes of input
3016
3017 // For encryption, the java expanded key ordering is just what we need
3018 // we don't know if the key is aligned, hence not using load-execute form
3019
3020 load_key(xmm_temp1, key, 0x00, xmm_key_shuf_mask);
3021 __ pxor(xmm_result, xmm_temp1);
3022
3023 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3024 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3025 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3026 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3027
3028 __ aesenc(xmm_result, xmm_temp1);
3029 __ aesenc(xmm_result, xmm_temp2);
3030 __ aesenc(xmm_result, xmm_temp3);
3031 __ aesenc(xmm_result, xmm_temp4);
3032
3033 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3034 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3035 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3036 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3037
3038 __ aesenc(xmm_result, xmm_temp1);
3039 __ aesenc(xmm_result, xmm_temp2);
3040 __ aesenc(xmm_result, xmm_temp3);
3041 __ aesenc(xmm_result, xmm_temp4);
3042
3043 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3044 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3045
3046 __ cmpl(keylen, 44);
3047 __ jccb(Assembler::equal, L_doLast);
3048
3049 __ aesenc(xmm_result, xmm_temp1);
3050 __ aesenc(xmm_result, xmm_temp2);
3051
3052 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3053 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3054
3055 __ cmpl(keylen, 52);
3056 __ jccb(Assembler::equal, L_doLast);
3057
3058 __ aesenc(xmm_result, xmm_temp1);
3059 __ aesenc(xmm_result, xmm_temp2);
3060
3061 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3062 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3063
3064 __ BIND(L_doLast);
3065 __ aesenc(xmm_result, xmm_temp1);
3066 __ aesenclast(xmm_result, xmm_temp2);
3067 __ movdqu(Address(to, 0), xmm_result); // store the result
3068 __ xorptr(rax, rax); // return 0
3069 __ leave(); // required for proper stackwalking of RuntimeStub frame
3070 __ ret(0);
3071
3072 return start;
3073 }
3074
3075
3076 // Arguments:
3077 //
3078 // Inputs:
3079 // c_rarg0 - source byte array address
3080 // c_rarg1 - destination byte array address
3081 // c_rarg2 - K (key) in little endian int array
3082 //
3083 address generate_aescrypt_decryptBlock() {
3084 assert(UseAES, "need AES instructions and misaligned SSE support");
3085 __ align(CodeEntryAlignment);
3086 StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3087 Label L_doLast;
3088 address start = __ pc();
3089
3090 const Register from = c_rarg0; // source array address
3091 const Register to = c_rarg1; // destination array address
3092 const Register key = c_rarg2; // key array address
3093 const Register keylen = rax;
3094
3095 const XMMRegister xmm_result = xmm0;
3096 const XMMRegister xmm_key_shuf_mask = xmm1;
3097 // On win64 xmm6-xmm15 must be preserved so don't use them.
3098 const XMMRegister xmm_temp1 = xmm2;
3099 const XMMRegister xmm_temp2 = xmm3;
3100 const XMMRegister xmm_temp3 = xmm4;
3101 const XMMRegister xmm_temp4 = xmm5;
3102
3103 __ enter(); // required for proper stackwalking of RuntimeStub frame
3104
3105 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3106 // context for the registers used, where all instructions below are using 128-bit mode
3107 // On EVEX without VL and BW, these instructions will all be AVX.
3108 if (VM_Version::supports_avx512vlbw()) {
3109 __ movl(rax, 0xffff);
3110 __ kmovql(k1, rax);
3111 }
3112
3113 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3114 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3115
3116 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3117 __ movdqu(xmm_result, Address(from, 0));
3118
3119 // for decryption java expanded key ordering is rotated one position from what we want
3120 // so we start from 0x10 here and hit 0x00 last
3121 // we don't know if the key is aligned, hence not using load-execute form
3122 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3123 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3124 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3125 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3126
3127 __ pxor (xmm_result, xmm_temp1);
3128 __ aesdec(xmm_result, xmm_temp2);
3129 __ aesdec(xmm_result, xmm_temp3);
3130 __ aesdec(xmm_result, xmm_temp4);
3131
3132 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3133 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3134 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3135 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3136
3137 __ aesdec(xmm_result, xmm_temp1);
3138 __ aesdec(xmm_result, xmm_temp2);
3139 __ aesdec(xmm_result, xmm_temp3);
3140 __ aesdec(xmm_result, xmm_temp4);
3141
3142 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3143 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3144 load_key(xmm_temp3, key, 0x00, xmm_key_shuf_mask);
3145
3146 __ cmpl(keylen, 44);
3147 __ jccb(Assembler::equal, L_doLast);
3148
3149 __ aesdec(xmm_result, xmm_temp1);
3150 __ aesdec(xmm_result, xmm_temp2);
3151
3152 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3153 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3154
3155 __ cmpl(keylen, 52);
3156 __ jccb(Assembler::equal, L_doLast);
3157
3158 __ aesdec(xmm_result, xmm_temp1);
3159 __ aesdec(xmm_result, xmm_temp2);
3160
3161 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3162 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3163
3164 __ BIND(L_doLast);
3165 __ aesdec(xmm_result, xmm_temp1);
3166 __ aesdec(xmm_result, xmm_temp2);
3167
3168 // for decryption the aesdeclast operation is always on key+0x00
3169 __ aesdeclast(xmm_result, xmm_temp3);
3170 __ movdqu(Address(to, 0), xmm_result); // store the result
3171 __ xorptr(rax, rax); // return 0
3172 __ leave(); // required for proper stackwalking of RuntimeStub frame
3173 __ ret(0);
3174
3175 return start;
3176 }
3177
3178
3179 // Arguments:
3180 //
3181 // Inputs:
3182 // c_rarg0 - source byte array address
3183 // c_rarg1 - destination byte array address
3184 // c_rarg2 - K (key) in little endian int array
3185 // c_rarg3 - r vector byte array address
3186 // c_rarg4 - input length
3187 //
3188 // Output:
3189 // rax - input length
3190 //
3191 address generate_cipherBlockChaining_encryptAESCrypt() {
3192 assert(UseAES, "need AES instructions and misaligned SSE support");
3193 __ align(CodeEntryAlignment);
3194 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3195 address start = __ pc();
3196
3197 Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3198 const Register from = c_rarg0; // source array address
3199 const Register to = c_rarg1; // destination array address
3200 const Register key = c_rarg2; // key array address
3201 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3202 // and left with the results of the last encryption block
3203 #ifndef _WIN64
3204 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3205 #else
3206 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3207 const Register len_reg = r11; // pick the volatile windows register
3208 #endif
3209 const Register pos = rax;
3210
3211 // xmm register assignments for the loops below
3212 const XMMRegister xmm_result = xmm0;
3213 const XMMRegister xmm_temp = xmm1;
3214 // keys 0-10 preloaded into xmm2-xmm12
3215 const int XMM_REG_NUM_KEY_FIRST = 2;
3216 const int XMM_REG_NUM_KEY_LAST = 15;
3217 const XMMRegister xmm_key0 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3218 const XMMRegister xmm_key10 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+10);
3219 const XMMRegister xmm_key11 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+11);
3220 const XMMRegister xmm_key12 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+12);
3221 const XMMRegister xmm_key13 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+13);
3222
3223 __ enter(); // required for proper stackwalking of RuntimeStub frame
3224
3225 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3226 // context for the registers used, where all instructions below are using 128-bit mode
3227 // On EVEX without VL and BW, these instructions will all be AVX.
3228 if (VM_Version::supports_avx512vlbw()) {
3229 __ movl(rax, 0xffff);
3230 __ kmovql(k1, rax);
3231 }
3232
3233 #ifdef _WIN64
3234 // on win64, fill len_reg from stack position
3235 __ movl(len_reg, len_mem);
3236 #else
3237 __ push(len_reg); // Save
3238 #endif
3239
3240 const XMMRegister xmm_key_shuf_mask = xmm_temp; // used temporarily to swap key bytes up front
3241 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3242 // load up xmm regs xmm2 thru xmm12 with key 0x00 - 0xa0
3243 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_FIRST+10; rnum++) {
3244 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3245 offset += 0x10;
3246 }
3247 __ movdqu(xmm_result, Address(rvec, 0x00)); // initialize xmm_result with r vec
3248
3249 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3250 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3251 __ cmpl(rax, 44);
3252 __ jcc(Assembler::notEqual, L_key_192_256);
3253
3254 // 128 bit code follows here
3255 __ movptr(pos, 0);
3256 __ align(OptoLoopAlignment);
3257
3258 __ BIND(L_loopTop_128);
3259 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3260 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3261 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3262 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 9; rnum++) {
3263 __ aesenc(xmm_result, as_XMMRegister(rnum));
3264 }
3265 __ aesenclast(xmm_result, xmm_key10);
3266 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3267 // no need to store r to memory until we exit
3268 __ addptr(pos, AESBlockSize);
3269 __ subptr(len_reg, AESBlockSize);
3270 __ jcc(Assembler::notEqual, L_loopTop_128);
3271
3272 __ BIND(L_exit);
3273 __ movdqu(Address(rvec, 0), xmm_result); // final value of r stored in rvec of CipherBlockChaining object
3274
3275 #ifdef _WIN64
3276 __ movl(rax, len_mem);
3277 #else
3278 __ pop(rax); // return length
3279 #endif
3280 __ leave(); // required for proper stackwalking of RuntimeStub frame
3281 __ ret(0);
3282
3283 __ BIND(L_key_192_256);
3284 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3285 load_key(xmm_key11, key, 0xb0, xmm_key_shuf_mask);
3286 load_key(xmm_key12, key, 0xc0, xmm_key_shuf_mask);
3287 __ cmpl(rax, 52);
3288 __ jcc(Assembler::notEqual, L_key_256);
3289
3290 // 192-bit code follows here (could be changed to use more xmm registers)
3291 __ movptr(pos, 0);
3292 __ align(OptoLoopAlignment);
3293
3294 __ BIND(L_loopTop_192);
3295 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3296 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3297 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3298 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 11; rnum++) {
3299 __ aesenc(xmm_result, as_XMMRegister(rnum));
3300 }
3301 __ aesenclast(xmm_result, xmm_key12);
3302 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3303 // no need to store r to memory until we exit
3304 __ addptr(pos, AESBlockSize);
3305 __ subptr(len_reg, AESBlockSize);
3306 __ jcc(Assembler::notEqual, L_loopTop_192);
3307 __ jmp(L_exit);
3308
3309 __ BIND(L_key_256);
3310 // 256-bit code follows here (could be changed to use more xmm registers)
3311 load_key(xmm_key13, key, 0xd0, xmm_key_shuf_mask);
3312 __ movptr(pos, 0);
3313 __ align(OptoLoopAlignment);
3314
3315 __ BIND(L_loopTop_256);
3316 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3317 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3318 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3319 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 13; rnum++) {
3320 __ aesenc(xmm_result, as_XMMRegister(rnum));
3321 }
3322 load_key(xmm_temp, key, 0xe0);
3323 __ aesenclast(xmm_result, xmm_temp);
3324 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3325 // no need to store r to memory until we exit
3326 __ addptr(pos, AESBlockSize);
3327 __ subptr(len_reg, AESBlockSize);
3328 __ jcc(Assembler::notEqual, L_loopTop_256);
3329 __ jmp(L_exit);
3330
3331 return start;
3332 }
3333
3334 // Safefetch stubs.
3335 void generate_safefetch(const char* name, int size, address* entry,
3336 address* fault_pc, address* continuation_pc) {
3337 // safefetch signatures:
3338 // int SafeFetch32(int* adr, int errValue);
3339 // intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue);
3340 //
3341 // arguments:
3342 // c_rarg0 = adr
3343 // c_rarg1 = errValue
3344 //
3345 // result:
3346 // PPC_RET = *adr or errValue
3347
3348 StubCodeMark mark(this, "StubRoutines", name);
3349
3350 // Entry point, pc or function descriptor.
3351 *entry = __ pc();
3352
3353 // Load *adr into c_rarg1, may fault.
3354 *fault_pc = __ pc();
3355 switch (size) {
3356 case 4:
3357 // int32_t
3358 __ movl(c_rarg1, Address(c_rarg0, 0));
3359 break;
3360 case 8:
3361 // int64_t
3362 __ movq(c_rarg1, Address(c_rarg0, 0));
3363 break;
3364 default:
3365 ShouldNotReachHere();
3366 }
3367
3368 // return errValue or *adr
3369 *continuation_pc = __ pc();
3370 __ movq(rax, c_rarg1);
3371 __ ret(0);
3372 }
3373
3374 // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
3375 // to hide instruction latency
3376 //
3377 // Arguments:
3378 //
3379 // Inputs:
3380 // c_rarg0 - source byte array address
3381 // c_rarg1 - destination byte array address
3382 // c_rarg2 - K (key) in little endian int array
3383 // c_rarg3 - r vector byte array address
3384 // c_rarg4 - input length
3385 //
3386 // Output:
3387 // rax - input length
3388 //
3389 address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
3390 assert(UseAES, "need AES instructions and misaligned SSE support");
3391 __ align(CodeEntryAlignment);
3392 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3393 address start = __ pc();
3394
3395 const Register from = c_rarg0; // source array address
3396 const Register to = c_rarg1; // destination array address
3397 const Register key = c_rarg2; // key array address
3398 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3399 // and left with the results of the last encryption block
3400 #ifndef _WIN64
3401 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3402 #else
3403 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3404 const Register len_reg = r11; // pick the volatile windows register
3405 #endif
3406 const Register pos = rax;
3407
3408 const int PARALLEL_FACTOR = 4;
3409 const int ROUNDS[3] = { 10, 12, 14 }; // aes rounds for key128, key192, key256
3410
3411 Label L_exit;
3412 Label L_singleBlock_loopTopHead[3]; // 128, 192, 256
3413 Label L_singleBlock_loopTopHead2[3]; // 128, 192, 256
3414 Label L_singleBlock_loopTop[3]; // 128, 192, 256
3415 Label L_multiBlock_loopTopHead[3]; // 128, 192, 256
3416 Label L_multiBlock_loopTop[3]; // 128, 192, 256
3417
3418 // keys 0-10 preloaded into xmm5-xmm15
3419 const int XMM_REG_NUM_KEY_FIRST = 5;
3420 const int XMM_REG_NUM_KEY_LAST = 15;
3421 const XMMRegister xmm_key_first = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3422 const XMMRegister xmm_key_last = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
3423
3424 __ enter(); // required for proper stackwalking of RuntimeStub frame
3425
3426 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3427 // context for the registers used, where all instructions below are using 128-bit mode
3428 // On EVEX without VL and BW, these instructions will all be AVX.
3429 if (VM_Version::supports_avx512vlbw()) {
3430 __ movl(rax, 0xffff);
3431 __ kmovql(k1, rax);
3432 }
3433
3434 #ifdef _WIN64
3435 // on win64, fill len_reg from stack position
3436 __ movl(len_reg, len_mem);
3437 #else
3438 __ push(len_reg); // Save
3439 #endif
3440 __ push(rbx);
3441 // the java expanded key ordering is rotated one position from what we want
3442 // so we start from 0x10 here and hit 0x00 last
3443 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
3444 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3445 // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
3446 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum < XMM_REG_NUM_KEY_LAST; rnum++) {
3447 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3448 offset += 0x10;
3449 }
3450 load_key(xmm_key_last, key, 0x00, xmm_key_shuf_mask);
3451
3452 const XMMRegister xmm_prev_block_cipher = xmm1; // holds cipher of previous block
3453
3454 // registers holding the four results in the parallelized loop
3455 const XMMRegister xmm_result0 = xmm0;
3456 const XMMRegister xmm_result1 = xmm2;
3457 const XMMRegister xmm_result2 = xmm3;
3458 const XMMRegister xmm_result3 = xmm4;
3459
3460 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
3461
3462 __ xorptr(pos, pos);
3463
3464 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3465 __ movl(rbx, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3466 __ cmpl(rbx, 52);
3467 __ jcc(Assembler::equal, L_multiBlock_loopTopHead[1]);
3468 __ cmpl(rbx, 60);
3469 __ jcc(Assembler::equal, L_multiBlock_loopTopHead[2]);
3470
3471 #define DoFour(opc, src_reg) \
3472 __ opc(xmm_result0, src_reg); \
3473 __ opc(xmm_result1, src_reg); \
3474 __ opc(xmm_result2, src_reg); \
3475 __ opc(xmm_result3, src_reg); \
3476
3477 for (int k = 0; k < 3; ++k) {
3478 __ BIND(L_multiBlock_loopTopHead[k]);
3479 if (k != 0) {
3480 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least 4 blocks left
3481 __ jcc(Assembler::less, L_singleBlock_loopTopHead2[k]);
3482 }
3483 if (k == 1) {
3484 __ subptr(rsp, 6 * wordSize);
3485 __ movdqu(Address(rsp, 0), xmm15); //save last_key from xmm15
3486 load_key(xmm15, key, 0xb0); // 0xb0; 192-bit key goes up to 0xc0
3487 __ movdqu(Address(rsp, 2 * wordSize), xmm15);
3488 load_key(xmm1, key, 0xc0); // 0xc0;
3489 __ movdqu(Address(rsp, 4 * wordSize), xmm1);
3490 } else if (k == 2) {
3491 __ subptr(rsp, 10 * wordSize);
3492 __ movdqu(Address(rsp, 0), xmm15); //save last_key from xmm15
3493 load_key(xmm15, key, 0xd0); // 0xd0; 256-bit key goes upto 0xe0
3494 __ movdqu(Address(rsp, 6 * wordSize), xmm15);
3495 load_key(xmm1, key, 0xe0); // 0xe0;
3496 __ movdqu(Address(rsp, 8 * wordSize), xmm1);
3497 load_key(xmm15, key, 0xb0); // 0xb0;
3498 __ movdqu(Address(rsp, 2 * wordSize), xmm15);
3499 load_key(xmm1, key, 0xc0); // 0xc0;
3500 __ movdqu(Address(rsp, 4 * wordSize), xmm1);
3501 }
3502 __ align(OptoLoopAlignment);
3503 __ BIND(L_multiBlock_loopTop[k]);
3504 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least 4 blocks left
3505 __ jcc(Assembler::less, L_singleBlock_loopTopHead[k]);
3506
3507 if (k != 0) {
3508 __ movdqu(xmm15, Address(rsp, 2 * wordSize));
3509 __ movdqu(xmm1, Address(rsp, 4 * wordSize));
3510 }
3511
3512 __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0 * AESBlockSize)); // get next 4 blocks into xmmresult registers
3513 __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
3514 __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
3515 __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
3516
3517 DoFour(pxor, xmm_key_first);
3518 if (k == 0) {
3519 for (int rnum = 1; rnum < ROUNDS[k]; rnum++) {
3520 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3521 }
3522 DoFour(aesdeclast, xmm_key_last);
3523 } else if (k == 1) {
3524 for (int rnum = 1; rnum <= ROUNDS[k]-2; rnum++) {
3525 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3526 }
3527 __ movdqu(xmm_key_last, Address(rsp, 0)); // xmm15 needs to be loaded again.
3528 DoFour(aesdec, xmm1); // key : 0xc0
3529 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // xmm1 needs to be loaded again
3530 DoFour(aesdeclast, xmm_key_last);
3531 } else if (k == 2) {
3532 for (int rnum = 1; rnum <= ROUNDS[k] - 4; rnum++) {
3533 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3534 }
3535 DoFour(aesdec, xmm1); // key : 0xc0
3536 __ movdqu(xmm15, Address(rsp, 6 * wordSize));
3537 __ movdqu(xmm1, Address(rsp, 8 * wordSize));
3538 DoFour(aesdec, xmm15); // key : 0xd0
3539 __ movdqu(xmm_key_last, Address(rsp, 0)); // xmm15 needs to be loaded again.
3540 DoFour(aesdec, xmm1); // key : 0xe0
3541 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // xmm1 needs to be loaded again
3542 DoFour(aesdeclast, xmm_key_last);
3543 }
3544
3545 // for each result, xor with the r vector of previous cipher block
3546 __ pxor(xmm_result0, xmm_prev_block_cipher);
3547 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0 * AESBlockSize));
3548 __ pxor(xmm_result1, xmm_prev_block_cipher);
3549 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1 * AESBlockSize));
3550 __ pxor(xmm_result2, xmm_prev_block_cipher);
3551 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2 * AESBlockSize));
3552 __ pxor(xmm_result3, xmm_prev_block_cipher);
3553 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3 * AESBlockSize)); // this will carry over to next set of blocks
3554 if (k != 0) {
3555 __ movdqu(Address(rvec, 0x00), xmm_prev_block_cipher);
3556 }
3557
3558 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0); // store 4 results into the next 64 bytes of output
3559 __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
3560 __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
3561 __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
3562
3563 __ addptr(pos, PARALLEL_FACTOR * AESBlockSize);
3564 __ subptr(len_reg, PARALLEL_FACTOR * AESBlockSize);
3565 __ jmp(L_multiBlock_loopTop[k]);
3566
3567 // registers used in the non-parallelized loops
3568 // xmm register assignments for the loops below
3569 const XMMRegister xmm_result = xmm0;
3570 const XMMRegister xmm_prev_block_cipher_save = xmm2;
3571 const XMMRegister xmm_key11 = xmm3;
3572 const XMMRegister xmm_key12 = xmm4;
3573 const XMMRegister key_tmp = xmm4;
3574
3575 __ BIND(L_singleBlock_loopTopHead[k]);
3576 if (k == 1) {
3577 __ addptr(rsp, 6 * wordSize);
3578 } else if (k == 2) {
3579 __ addptr(rsp, 10 * wordSize);
3580 }
3581 __ cmpptr(len_reg, 0); // any blocks left??
3582 __ jcc(Assembler::equal, L_exit);
3583 __ BIND(L_singleBlock_loopTopHead2[k]);
3584 if (k == 1) {
3585 load_key(xmm_key11, key, 0xb0); // 0xb0; 192-bit key goes upto 0xc0
3586 load_key(xmm_key12, key, 0xc0); // 0xc0; 192-bit key goes upto 0xc0
3587 }
3588 if (k == 2) {
3589 load_key(xmm_key11, key, 0xb0); // 0xb0; 256-bit key goes upto 0xe0
3590 }
3591 __ align(OptoLoopAlignment);
3592 __ BIND(L_singleBlock_loopTop[k]);
3593 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
3594 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
3595 __ pxor(xmm_result, xmm_key_first); // do the aes dec rounds
3596 for (int rnum = 1; rnum <= 9 ; rnum++) {
3597 __ aesdec(xmm_result, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3598 }
3599 if (k == 1) {
3600 __ aesdec(xmm_result, xmm_key11);
3601 __ aesdec(xmm_result, xmm_key12);
3602 }
3603 if (k == 2) {
3604 __ aesdec(xmm_result, xmm_key11);
3605 load_key(key_tmp, key, 0xc0);
3606 __ aesdec(xmm_result, key_tmp);
3607 load_key(key_tmp, key, 0xd0);
3608 __ aesdec(xmm_result, key_tmp);
3609 load_key(key_tmp, key, 0xe0);
3610 __ aesdec(xmm_result, key_tmp);
3611 }
3612
3613 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 always came from key+0
3614 __ pxor(xmm_result, xmm_prev_block_cipher); // xor with the current r vector
3615 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3616 // no need to store r to memory until we exit
3617 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
3618 __ addptr(pos, AESBlockSize);
3619 __ subptr(len_reg, AESBlockSize);
3620 __ jcc(Assembler::notEqual, L_singleBlock_loopTop[k]);
3621 if (k != 2) {
3622 __ jmp(L_exit);
3623 }
3624 } //for 128/192/256
3625
3626 __ BIND(L_exit);
3627 __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
3628 __ pop(rbx);
3629 #ifdef _WIN64
3630 __ movl(rax, len_mem);
3631 #else
3632 __ pop(rax); // return length
3633 #endif
3634 __ leave(); // required for proper stackwalking of RuntimeStub frame
3635 __ ret(0);
3636 return start;
3637 }
3638
3639 address generate_upper_word_mask() {
3640 __ align(64);
3641 StubCodeMark mark(this, "StubRoutines", "upper_word_mask");
3642 address start = __ pc();
3643 __ emit_data64(0x0000000000000000, relocInfo::none);
3644 __ emit_data64(0xFFFFFFFF00000000, relocInfo::none);
3645 return start;
3646 }
3647
3648 address generate_shuffle_byte_flip_mask() {
3649 __ align(64);
3650 StubCodeMark mark(this, "StubRoutines", "shuffle_byte_flip_mask");
3651 address start = __ pc();
3652 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
3653 __ emit_data64(0x0001020304050607, relocInfo::none);
3654 return start;
3655 }
3656
3657 // ofs and limit are use for multi-block byte array.
3658 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
3659 address generate_sha1_implCompress(bool multi_block, const char *name) {
3660 __ align(CodeEntryAlignment);
3661 StubCodeMark mark(this, "StubRoutines", name);
3662 address start = __ pc();
3663
3664 Register buf = c_rarg0;
3665 Register state = c_rarg1;
3666 Register ofs = c_rarg2;
3667 Register limit = c_rarg3;
3668
3669 const XMMRegister abcd = xmm0;
3670 const XMMRegister e0 = xmm1;
3671 const XMMRegister e1 = xmm2;
3672 const XMMRegister msg0 = xmm3;
3673
3674 const XMMRegister msg1 = xmm4;
3675 const XMMRegister msg2 = xmm5;
3676 const XMMRegister msg3 = xmm6;
3677 const XMMRegister shuf_mask = xmm7;
3678
3679 __ enter();
3680
3681 __ subptr(rsp, 4 * wordSize);
3682
3683 __ fast_sha1(abcd, e0, e1, msg0, msg1, msg2, msg3, shuf_mask,
3684 buf, state, ofs, limit, rsp, multi_block);
3685
3686 __ addptr(rsp, 4 * wordSize);
3687
3688 __ leave();
3689 __ ret(0);
3690 return start;
3691 }
3692
3693 address generate_pshuffle_byte_flip_mask() {
3694 __ align(64);
3695 StubCodeMark mark(this, "StubRoutines", "pshuffle_byte_flip_mask");
3696 address start = __ pc();
3697 __ emit_data64(0x0405060700010203, relocInfo::none);
3698 __ emit_data64(0x0c0d0e0f08090a0b, relocInfo::none);
3699
3700 if (VM_Version::supports_avx2()) {
3701 __ emit_data64(0x0405060700010203, relocInfo::none); // second copy
3702 __ emit_data64(0x0c0d0e0f08090a0b, relocInfo::none);
3703 // _SHUF_00BA
3704 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3705 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3706 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3707 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3708 // _SHUF_DC00
3709 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3710 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3711 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3712 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3713 }
3714
3715 return start;
3716 }
3717
3718 //Mask for byte-swapping a couple of qwords in an XMM register using (v)pshufb.
3719 address generate_pshuffle_byte_flip_mask_sha512() {
3720 __ align(32);
3721 StubCodeMark mark(this, "StubRoutines", "pshuffle_byte_flip_mask_sha512");
3722 address start = __ pc();
3723 if (VM_Version::supports_avx2()) {
3724 __ emit_data64(0x0001020304050607, relocInfo::none); // PSHUFFLE_BYTE_FLIP_MASK
3725 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
3726 __ emit_data64(0x1011121314151617, relocInfo::none);
3727 __ emit_data64(0x18191a1b1c1d1e1f, relocInfo::none);
3728 __ emit_data64(0x0000000000000000, relocInfo::none); //MASK_YMM_LO
3729 __ emit_data64(0x0000000000000000, relocInfo::none);
3730 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3731 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3732 }
3733
3734 return start;
3735 }
3736
3737 // ofs and limit are use for multi-block byte array.
3738 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
3739 address generate_sha256_implCompress(bool multi_block, const char *name) {
3740 assert(VM_Version::supports_sha() || VM_Version::supports_avx2(), "");
3741 __ align(CodeEntryAlignment);
3742 StubCodeMark mark(this, "StubRoutines", name);
3743 address start = __ pc();
3744
3745 Register buf = c_rarg0;
3746 Register state = c_rarg1;
3747 Register ofs = c_rarg2;
3748 Register limit = c_rarg3;
3749
3750 const XMMRegister msg = xmm0;
3751 const XMMRegister state0 = xmm1;
3752 const XMMRegister state1 = xmm2;
3753 const XMMRegister msgtmp0 = xmm3;
3754
3755 const XMMRegister msgtmp1 = xmm4;
3756 const XMMRegister msgtmp2 = xmm5;
3757 const XMMRegister msgtmp3 = xmm6;
3758 const XMMRegister msgtmp4 = xmm7;
3759
3760 const XMMRegister shuf_mask = xmm8;
3761
3762 __ enter();
3763
3764 __ subptr(rsp, 4 * wordSize);
3765
3766 if (VM_Version::supports_sha()) {
3767 __ fast_sha256(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3768 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3769 } else if (VM_Version::supports_avx2()) {
3770 __ sha256_AVX2(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3771 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3772 }
3773 __ addptr(rsp, 4 * wordSize);
3774 __ vzeroupper();
3775 __ leave();
3776 __ ret(0);
3777 return start;
3778 }
3779
3780 address generate_sha512_implCompress(bool multi_block, const char *name) {
3781 assert(VM_Version::supports_avx2(), "");
3782 assert(VM_Version::supports_bmi2(), "");
3783 __ align(CodeEntryAlignment);
3784 StubCodeMark mark(this, "StubRoutines", name);
3785 address start = __ pc();
3786
3787 Register buf = c_rarg0;
3788 Register state = c_rarg1;
3789 Register ofs = c_rarg2;
3790 Register limit = c_rarg3;
3791
3792 const XMMRegister msg = xmm0;
3793 const XMMRegister state0 = xmm1;
3794 const XMMRegister state1 = xmm2;
3795 const XMMRegister msgtmp0 = xmm3;
3796 const XMMRegister msgtmp1 = xmm4;
3797 const XMMRegister msgtmp2 = xmm5;
3798 const XMMRegister msgtmp3 = xmm6;
3799 const XMMRegister msgtmp4 = xmm7;
3800
3801 const XMMRegister shuf_mask = xmm8;
3802
3803 __ enter();
3804
3805 __ sha512_AVX2(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3806 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3807
3808 __ vzeroupper();
3809 __ leave();
3810 __ ret(0);
3811 return start;
3812 }
3813
3814 // This is a version of CTR/AES crypt which does 6 blocks in a loop at a time
3815 // to hide instruction latency
3816 //
3817 // Arguments:
3818 //
3819 // Inputs:
3820 // c_rarg0 - source byte array address
3821 // c_rarg1 - destination byte array address
3822 // c_rarg2 - K (key) in little endian int array
3823 // c_rarg3 - counter vector byte array address
3824 // Linux
3825 // c_rarg4 - input length
3826 // c_rarg5 - saved encryptedCounter start
3827 // rbp + 6 * wordSize - saved used length
3828 // Windows
3829 // rbp + 6 * wordSize - input length
3830 // rbp + 7 * wordSize - saved encryptedCounter start
3831 // rbp + 8 * wordSize - saved used length
3832 //
3833 // Output:
3834 // rax - input length
3835 //
3836 address generate_counterMode_AESCrypt_Parallel() {
3837 assert(UseAES, "need AES instructions and misaligned SSE support");
3838 __ align(CodeEntryAlignment);
3839 StubCodeMark mark(this, "StubRoutines", "counterMode_AESCrypt");
3840 address start = __ pc();
3841 const Register from = c_rarg0; // source array address
3842 const Register to = c_rarg1; // destination array address
3843 const Register key = c_rarg2; // key array address
3844 const Register counter = c_rarg3; // counter byte array initialized from counter array address
3845 // and updated with the incremented counter in the end
3846 #ifndef _WIN64
3847 const Register len_reg = c_rarg4;
3848 const Register saved_encCounter_start = c_rarg5;
3849 const Register used_addr = r10;
3850 const Address used_mem(rbp, 2 * wordSize);
3851 const Register used = r11;
3852 #else
3853 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3854 const Address saved_encCounter_mem(rbp, 7 * wordSize); // length is on stack on Win64
3855 const Address used_mem(rbp, 8 * wordSize); // length is on stack on Win64
3856 const Register len_reg = r10; // pick the first volatile windows register
3857 const Register saved_encCounter_start = r11;
3858 const Register used_addr = r13;
3859 const Register used = r14;
3860 #endif
3861 const Register pos = rax;
3862
3863 const int PARALLEL_FACTOR = 6;
3864 const XMMRegister xmm_counter_shuf_mask = xmm0;
3865 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
3866 const XMMRegister xmm_curr_counter = xmm2;
3867
3868 const XMMRegister xmm_key_tmp0 = xmm3;
3869 const XMMRegister xmm_key_tmp1 = xmm4;
3870
3871 // registers holding the four results in the parallelized loop
3872 const XMMRegister xmm_result0 = xmm5;
3873 const XMMRegister xmm_result1 = xmm6;
3874 const XMMRegister xmm_result2 = xmm7;
3875 const XMMRegister xmm_result3 = xmm8;
3876 const XMMRegister xmm_result4 = xmm9;
3877 const XMMRegister xmm_result5 = xmm10;
3878
3879 const XMMRegister xmm_from0 = xmm11;
3880 const XMMRegister xmm_from1 = xmm12;
3881 const XMMRegister xmm_from2 = xmm13;
3882 const XMMRegister xmm_from3 = xmm14; //the last one is xmm14. we have to preserve it on WIN64.
3883 const XMMRegister xmm_from4 = xmm3; //reuse xmm3~4. Because xmm_key_tmp0~1 are useless when loading input text
3884 const XMMRegister xmm_from5 = xmm4;
3885
3886 //for key_128, key_192, key_256
3887 const int rounds[3] = {10, 12, 14};
3888 Label L_exit_preLoop, L_preLoop_start;
3889 Label L_multiBlock_loopTop[3];
3890 Label L_singleBlockLoopTop[3];
3891 Label L__incCounter[3][6]; //for 6 blocks
3892 Label L__incCounter_single[3]; //for single block, key128, key192, key256
3893 Label L_processTail_insr[3], L_processTail_4_insr[3], L_processTail_2_insr[3], L_processTail_1_insr[3], L_processTail_exit_insr[3];
3894 Label L_processTail_extr[3], L_processTail_4_extr[3], L_processTail_2_extr[3], L_processTail_1_extr[3], L_processTail_exit_extr[3];
3895
3896 Label L_exit;
3897
3898 __ enter(); // required for proper stackwalking of RuntimeStub frame
3899
3900 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3901 // context for the registers used, where all instructions below are using 128-bit mode
3902 // On EVEX without VL and BW, these instructions will all be AVX.
3903 if (VM_Version::supports_avx512vlbw()) {
3904 __ movl(rax, 0xffff);
3905 __ kmovql(k1, rax);
3906 }
3907
3908 #ifdef _WIN64
3909 // allocate spill slots for r13, r14
3910 enum {
3911 saved_r13_offset,
3912 saved_r14_offset
3913 };
3914 __ subptr(rsp, 2 * wordSize);
3915 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
3916 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
3917
3918 // on win64, fill len_reg from stack position
3919 __ movl(len_reg, len_mem);
3920 __ movptr(saved_encCounter_start, saved_encCounter_mem);
3921 __ movptr(used_addr, used_mem);
3922 __ movl(used, Address(used_addr, 0));
3923 #else
3924 __ push(len_reg); // Save
3925 __ movptr(used_addr, used_mem);
3926 __ movl(used, Address(used_addr, 0));
3927 #endif
3928
3929 __ push(rbx); // Save RBX
3930 __ movdqu(xmm_curr_counter, Address(counter, 0x00)); // initialize counter with initial counter
3931 __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()), pos); // pos as scratch
3932 __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled
3933 __ movptr(pos, 0);
3934
3935 // Use the partially used encrpyted counter from last invocation
3936 __ BIND(L_preLoop_start);
3937 __ cmpptr(used, 16);
3938 __ jcc(Assembler::aboveEqual, L_exit_preLoop);
3939 __ cmpptr(len_reg, 0);
3940 __ jcc(Assembler::lessEqual, L_exit_preLoop);
3941 __ movb(rbx, Address(saved_encCounter_start, used));
3942 __ xorb(rbx, Address(from, pos));
3943 __ movb(Address(to, pos), rbx);
3944 __ addptr(pos, 1);
3945 __ addptr(used, 1);
3946 __ subptr(len_reg, 1);
3947
3948 __ jmp(L_preLoop_start);
3949
3950 __ BIND(L_exit_preLoop);
3951 __ movl(Address(used_addr, 0), used);
3952
3953 // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
3954 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()), rbx); // rbx as scratch
3955 __ movl(rbx, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3956 __ cmpl(rbx, 52);
3957 __ jcc(Assembler::equal, L_multiBlock_loopTop[1]);
3958 __ cmpl(rbx, 60);
3959 __ jcc(Assembler::equal, L_multiBlock_loopTop[2]);
3960
3961 #define CTR_DoSix(opc, src_reg) \
3962 __ opc(xmm_result0, src_reg); \
3963 __ opc(xmm_result1, src_reg); \
3964 __ opc(xmm_result2, src_reg); \
3965 __ opc(xmm_result3, src_reg); \
3966 __ opc(xmm_result4, src_reg); \
3967 __ opc(xmm_result5, src_reg);
3968
3969 // k == 0 : generate code for key_128
3970 // k == 1 : generate code for key_192
3971 // k == 2 : generate code for key_256
3972 for (int k = 0; k < 3; ++k) {
3973 //multi blocks starts here
3974 __ align(OptoLoopAlignment);
3975 __ BIND(L_multiBlock_loopTop[k]);
3976 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least PARALLEL_FACTOR blocks left
3977 __ jcc(Assembler::less, L_singleBlockLoopTop[k]);
3978 load_key(xmm_key_tmp0, key, 0x00, xmm_key_shuf_mask);
3979
3980 //load, then increase counters
3981 CTR_DoSix(movdqa, xmm_curr_counter);
3982 inc_counter(rbx, xmm_result1, 0x01, L__incCounter[k][0]);
3983 inc_counter(rbx, xmm_result2, 0x02, L__incCounter[k][1]);
3984 inc_counter(rbx, xmm_result3, 0x03, L__incCounter[k][2]);
3985 inc_counter(rbx, xmm_result4, 0x04, L__incCounter[k][3]);
3986 inc_counter(rbx, xmm_result5, 0x05, L__incCounter[k][4]);
3987 inc_counter(rbx, xmm_curr_counter, 0x06, L__incCounter[k][5]);
3988 CTR_DoSix(pshufb, xmm_counter_shuf_mask); // after increased, shuffled counters back for PXOR
3989 CTR_DoSix(pxor, xmm_key_tmp0); //PXOR with Round 0 key
3990
3991 //load two ROUND_KEYs at a time
3992 for (int i = 1; i < rounds[k]; ) {
3993 load_key(xmm_key_tmp1, key, (0x10 * i), xmm_key_shuf_mask);
3994 load_key(xmm_key_tmp0, key, (0x10 * (i+1)), xmm_key_shuf_mask);
3995 CTR_DoSix(aesenc, xmm_key_tmp1);
3996 i++;
3997 if (i != rounds[k]) {
3998 CTR_DoSix(aesenc, xmm_key_tmp0);
3999 } else {
4000 CTR_DoSix(aesenclast, xmm_key_tmp0);
4001 }
4002 i++;
4003 }
4004
4005 // get next PARALLEL_FACTOR blocks into xmm_result registers
4006 __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
4007 __ movdqu(xmm_from1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
4008 __ movdqu(xmm_from2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
4009 __ movdqu(xmm_from3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
4010 __ movdqu(xmm_from4, Address(from, pos, Address::times_1, 4 * AESBlockSize));
4011 __ movdqu(xmm_from5, Address(from, pos, Address::times_1, 5 * AESBlockSize));
4012
4013 __ pxor(xmm_result0, xmm_from0);
4014 __ pxor(xmm_result1, xmm_from1);
4015 __ pxor(xmm_result2, xmm_from2);
4016 __ pxor(xmm_result3, xmm_from3);
4017 __ pxor(xmm_result4, xmm_from4);
4018 __ pxor(xmm_result5, xmm_from5);
4019
4020 // store 6 results into the next 64 bytes of output
4021 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
4022 __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
4023 __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
4024 __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
4025 __ movdqu(Address(to, pos, Address::times_1, 4 * AESBlockSize), xmm_result4);
4026 __ movdqu(Address(to, pos, Address::times_1, 5 * AESBlockSize), xmm_result5);
4027
4028 __ addptr(pos, PARALLEL_FACTOR * AESBlockSize); // increase the length of crypt text
4029 __ subptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // decrease the remaining length
4030 __ jmp(L_multiBlock_loopTop[k]);
4031
4032 // singleBlock starts here
4033 __ align(OptoLoopAlignment);
4034 __ BIND(L_singleBlockLoopTop[k]);
4035 __ cmpptr(len_reg, 0);
4036 __ jcc(Assembler::lessEqual, L_exit);
4037 load_key(xmm_key_tmp0, key, 0x00, xmm_key_shuf_mask);
4038 __ movdqa(xmm_result0, xmm_curr_counter);
4039 inc_counter(rbx, xmm_curr_counter, 0x01, L__incCounter_single[k]);
4040 __ pshufb(xmm_result0, xmm_counter_shuf_mask);
4041 __ pxor(xmm_result0, xmm_key_tmp0);
4042 for (int i = 1; i < rounds[k]; i++) {
4043 load_key(xmm_key_tmp0, key, (0x10 * i), xmm_key_shuf_mask);
4044 __ aesenc(xmm_result0, xmm_key_tmp0);
4045 }
4046 load_key(xmm_key_tmp0, key, (rounds[k] * 0x10), xmm_key_shuf_mask);
4047 __ aesenclast(xmm_result0, xmm_key_tmp0);
4048 __ cmpptr(len_reg, AESBlockSize);
4049 __ jcc(Assembler::less, L_processTail_insr[k]);
4050 __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
4051 __ pxor(xmm_result0, xmm_from0);
4052 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
4053 __ addptr(pos, AESBlockSize);
4054 __ subptr(len_reg, AESBlockSize);
4055 __ jmp(L_singleBlockLoopTop[k]);
4056 __ BIND(L_processTail_insr[k]); // Process the tail part of the input array
4057 __ addptr(pos, len_reg); // 1. Insert bytes from src array into xmm_from0 register
4058 __ testptr(len_reg, 8);
4059 __ jcc(Assembler::zero, L_processTail_4_insr[k]);
4060 __ subptr(pos,8);
4061 __ pinsrq(xmm_from0, Address(from, pos), 0);
4062 __ BIND(L_processTail_4_insr[k]);
4063 __ testptr(len_reg, 4);
4064 __ jcc(Assembler::zero, L_processTail_2_insr[k]);
4065 __ subptr(pos,4);
4066 __ pslldq(xmm_from0, 4);
4067 __ pinsrd(xmm_from0, Address(from, pos), 0);
4068 __ BIND(L_processTail_2_insr[k]);
4069 __ testptr(len_reg, 2);
4070 __ jcc(Assembler::zero, L_processTail_1_insr[k]);
4071 __ subptr(pos, 2);
4072 __ pslldq(xmm_from0, 2);
4073 __ pinsrw(xmm_from0, Address(from, pos), 0);
4074 __ BIND(L_processTail_1_insr[k]);
4075 __ testptr(len_reg, 1);
4076 __ jcc(Assembler::zero, L_processTail_exit_insr[k]);
4077 __ subptr(pos, 1);
4078 __ pslldq(xmm_from0, 1);
4079 __ pinsrb(xmm_from0, Address(from, pos), 0);
4080 __ BIND(L_processTail_exit_insr[k]);
4081
4082 __ movdqu(Address(saved_encCounter_start, 0), xmm_result0); // 2. Perform pxor of the encrypted counter and plaintext Bytes.
4083 __ pxor(xmm_result0, xmm_from0); // Also the encrypted counter is saved for next invocation.
4084
4085 __ testptr(len_reg, 8);
4086 __ jcc(Assembler::zero, L_processTail_4_extr[k]); // 3. Extract bytes from xmm_result0 into the dest. array
4087 __ pextrq(Address(to, pos), xmm_result0, 0);
4088 __ psrldq(xmm_result0, 8);
4089 __ addptr(pos, 8);
4090 __ BIND(L_processTail_4_extr[k]);
4091 __ testptr(len_reg, 4);
4092 __ jcc(Assembler::zero, L_processTail_2_extr[k]);
4093 __ pextrd(Address(to, pos), xmm_result0, 0);
4094 __ psrldq(xmm_result0, 4);
4095 __ addptr(pos, 4);
4096 __ BIND(L_processTail_2_extr[k]);
4097 __ testptr(len_reg, 2);
4098 __ jcc(Assembler::zero, L_processTail_1_extr[k]);
4099 __ pextrw(Address(to, pos), xmm_result0, 0);
4100 __ psrldq(xmm_result0, 2);
4101 __ addptr(pos, 2);
4102 __ BIND(L_processTail_1_extr[k]);
4103 __ testptr(len_reg, 1);
4104 __ jcc(Assembler::zero, L_processTail_exit_extr[k]);
4105 __ pextrb(Address(to, pos), xmm_result0, 0);
4106
4107 __ BIND(L_processTail_exit_extr[k]);
4108 __ movl(Address(used_addr, 0), len_reg);
4109 __ jmp(L_exit);
4110
4111 }
4112
4113 __ BIND(L_exit);
4114 __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled back.
4115 __ movdqu(Address(counter, 0), xmm_curr_counter); //save counter back
4116 __ pop(rbx); // pop the saved RBX.
4117 #ifdef _WIN64
4118 __ movl(rax, len_mem);
4119 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
4120 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
4121 __ addptr(rsp, 2 * wordSize);
4122 #else
4123 __ pop(rax); // return 'len'
4124 #endif
4125 __ leave(); // required for proper stackwalking of RuntimeStub frame
4126 __ ret(0);
4127 return start;
4128 }
4129
4130 void roundDec(XMMRegister xmm_reg) {
4131 __ vaesdec(xmm1, xmm1, xmm_reg, Assembler::AVX_512bit);
4132 __ vaesdec(xmm2, xmm2, xmm_reg, Assembler::AVX_512bit);
4133 __ vaesdec(xmm3, xmm3, xmm_reg, Assembler::AVX_512bit);
4134 __ vaesdec(xmm4, xmm4, xmm_reg, Assembler::AVX_512bit);
4135 __ vaesdec(xmm5, xmm5, xmm_reg, Assembler::AVX_512bit);
4136 __ vaesdec(xmm6, xmm6, xmm_reg, Assembler::AVX_512bit);
4137 __ vaesdec(xmm7, xmm7, xmm_reg, Assembler::AVX_512bit);
4138 __ vaesdec(xmm8, xmm8, xmm_reg, Assembler::AVX_512bit);
4139 }
4140
4141 void roundDeclast(XMMRegister xmm_reg) {
4142 __ vaesdeclast(xmm1, xmm1, xmm_reg, Assembler::AVX_512bit);
4143 __ vaesdeclast(xmm2, xmm2, xmm_reg, Assembler::AVX_512bit);
4144 __ vaesdeclast(xmm3, xmm3, xmm_reg, Assembler::AVX_512bit);
4145 __ vaesdeclast(xmm4, xmm4, xmm_reg, Assembler::AVX_512bit);
4146 __ vaesdeclast(xmm5, xmm5, xmm_reg, Assembler::AVX_512bit);
4147 __ vaesdeclast(xmm6, xmm6, xmm_reg, Assembler::AVX_512bit);
4148 __ vaesdeclast(xmm7, xmm7, xmm_reg, Assembler::AVX_512bit);
4149 __ vaesdeclast(xmm8, xmm8, xmm_reg, Assembler::AVX_512bit);
4150 }
4151
4152 void ev_load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask = NULL) {
4153 __ movdqu(xmmdst, Address(key, offset));
4154 if (xmm_shuf_mask != NULL) {
4155 __ pshufb(xmmdst, xmm_shuf_mask);
4156 } else {
4157 __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4158 }
4159 __ evshufi64x2(xmmdst, xmmdst, xmmdst, 0x0, Assembler::AVX_512bit);
4160
4161 }
4162
4163 address generate_cipherBlockChaining_decryptVectorAESCrypt() {
4164 assert(VM_Version::supports_vaes(), "need AES instructions and misaligned SSE support");
4165 __ align(CodeEntryAlignment);
4166 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
4167 address start = __ pc();
4168
4169 const Register from = c_rarg0; // source array address
4170 const Register to = c_rarg1; // destination array address
4171 const Register key = c_rarg2; // key array address
4172 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
4173 // and left with the results of the last encryption block
4174 #ifndef _WIN64
4175 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
4176 #else
4177 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
4178 const Register len_reg = r11; // pick the volatile windows register
4179 #endif
4180
4181 Label Loop, Loop1, L_128, L_256, L_192, KEY_192, KEY_256, Loop2, Lcbc_dec_rem_loop,
4182 Lcbc_dec_rem_last, Lcbc_dec_ret, Lcbc_dec_rem, Lcbc_exit;
4183
4184 __ enter();
4185
4186 #ifdef _WIN64
4187 // on win64, fill len_reg from stack position
4188 __ movl(len_reg, len_mem);
4189 #else
4190 __ push(len_reg); // Save
4191 #endif
4192 __ push(rbx);
4193 __ vzeroupper();
4194
4195 // Temporary variable declaration for swapping key bytes
4196 const XMMRegister xmm_key_shuf_mask = xmm1;
4197 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4198
4199 // Calculate number of rounds from key size: 44 for 10-rounds, 52 for 12-rounds, 60 for 14-rounds
4200 const Register rounds = rbx;
4201 __ movl(rounds, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
4202
4203 const XMMRegister IV = xmm0;
4204 // Load IV and broadcast value to 512-bits
4205 __ evbroadcasti64x2(IV, Address(rvec, 0), Assembler::AVX_512bit);
4206
4207 // Temporary variables for storing round keys
4208 const XMMRegister RK0 = xmm30;
4209 const XMMRegister RK1 = xmm9;
4210 const XMMRegister RK2 = xmm18;
4211 const XMMRegister RK3 = xmm19;
4212 const XMMRegister RK4 = xmm20;
4213 const XMMRegister RK5 = xmm21;
4214 const XMMRegister RK6 = xmm22;
4215 const XMMRegister RK7 = xmm23;
4216 const XMMRegister RK8 = xmm24;
4217 const XMMRegister RK9 = xmm25;
4218 const XMMRegister RK10 = xmm26;
4219
4220 // Load and shuffle key
4221 // the java expanded key ordering is rotated one position from what we want
4222 // so we start from 1*16 here and hit 0*16 last
4223 ev_load_key(RK1, key, 1 * 16, xmm_key_shuf_mask);
4224 ev_load_key(RK2, key, 2 * 16, xmm_key_shuf_mask);
4225 ev_load_key(RK3, key, 3 * 16, xmm_key_shuf_mask);
4226 ev_load_key(RK4, key, 4 * 16, xmm_key_shuf_mask);
4227 ev_load_key(RK5, key, 5 * 16, xmm_key_shuf_mask);
4228 ev_load_key(RK6, key, 6 * 16, xmm_key_shuf_mask);
4229 ev_load_key(RK7, key, 7 * 16, xmm_key_shuf_mask);
4230 ev_load_key(RK8, key, 8 * 16, xmm_key_shuf_mask);
4231 ev_load_key(RK9, key, 9 * 16, xmm_key_shuf_mask);
4232 ev_load_key(RK10, key, 10 * 16, xmm_key_shuf_mask);
4233 ev_load_key(RK0, key, 0*16, xmm_key_shuf_mask);
4234
4235 // Variables for storing source cipher text
4236 const XMMRegister S0 = xmm10;
4237 const XMMRegister S1 = xmm11;
4238 const XMMRegister S2 = xmm12;
4239 const XMMRegister S3 = xmm13;
4240 const XMMRegister S4 = xmm14;
4241 const XMMRegister S5 = xmm15;
4242 const XMMRegister S6 = xmm16;
4243 const XMMRegister S7 = xmm17;
4244
4245 // Variables for storing decrypted text
4246 const XMMRegister B0 = xmm1;
4247 const XMMRegister B1 = xmm2;
4248 const XMMRegister B2 = xmm3;
4249 const XMMRegister B3 = xmm4;
4250 const XMMRegister B4 = xmm5;
4251 const XMMRegister B5 = xmm6;
4252 const XMMRegister B6 = xmm7;
4253 const XMMRegister B7 = xmm8;
4254
4255 __ cmpl(rounds, 44);
4256 __ jcc(Assembler::greater, KEY_192);
4257 __ jmp(Loop);
4258
4259 __ BIND(KEY_192);
4260 const XMMRegister RK11 = xmm27;
4261 const XMMRegister RK12 = xmm28;
4262 ev_load_key(RK11, key, 11*16, xmm_key_shuf_mask);
4263 ev_load_key(RK12, key, 12*16, xmm_key_shuf_mask);
4264
4265 __ cmpl(rounds, 52);
4266 __ jcc(Assembler::greater, KEY_256);
4267 __ jmp(Loop);
4268
4269 __ BIND(KEY_256);
4270 const XMMRegister RK13 = xmm29;
4271 const XMMRegister RK14 = xmm31;
4272 ev_load_key(RK13, key, 13*16, xmm_key_shuf_mask);
4273 ev_load_key(RK14, key, 14*16, xmm_key_shuf_mask);
4274
4275 __ BIND(Loop);
4276 __ cmpl(len_reg, 512);
4277 __ jcc(Assembler::below, Lcbc_dec_rem);
4278 __ BIND(Loop1);
4279 __ subl(len_reg, 512);
4280 __ evmovdquq(S0, Address(from, 0 * 64), Assembler::AVX_512bit);
4281 __ evmovdquq(S1, Address(from, 1 * 64), Assembler::AVX_512bit);
4282 __ evmovdquq(S2, Address(from, 2 * 64), Assembler::AVX_512bit);
4283 __ evmovdquq(S3, Address(from, 3 * 64), Assembler::AVX_512bit);
4284 __ evmovdquq(S4, Address(from, 4 * 64), Assembler::AVX_512bit);
4285 __ evmovdquq(S5, Address(from, 5 * 64), Assembler::AVX_512bit);
4286 __ evmovdquq(S6, Address(from, 6 * 64), Assembler::AVX_512bit);
4287 __ evmovdquq(S7, Address(from, 7 * 64), Assembler::AVX_512bit);
4288 __ leaq(from, Address(from, 8 * 64));
4289
4290 __ evpxorq(B0, S0, RK1, Assembler::AVX_512bit);
4291 __ evpxorq(B1, S1, RK1, Assembler::AVX_512bit);
4292 __ evpxorq(B2, S2, RK1, Assembler::AVX_512bit);
4293 __ evpxorq(B3, S3, RK1, Assembler::AVX_512bit);
4294 __ evpxorq(B4, S4, RK1, Assembler::AVX_512bit);
4295 __ evpxorq(B5, S5, RK1, Assembler::AVX_512bit);
4296 __ evpxorq(B6, S6, RK1, Assembler::AVX_512bit);
4297 __ evpxorq(B7, S7, RK1, Assembler::AVX_512bit);
4298
4299 __ evalignq(IV, S0, IV, 0x06);
4300 __ evalignq(S0, S1, S0, 0x06);
4301 __ evalignq(S1, S2, S1, 0x06);
4302 __ evalignq(S2, S3, S2, 0x06);
4303 __ evalignq(S3, S4, S3, 0x06);
4304 __ evalignq(S4, S5, S4, 0x06);
4305 __ evalignq(S5, S6, S5, 0x06);
4306 __ evalignq(S6, S7, S6, 0x06);
4307
4308 roundDec(RK2);
4309 roundDec(RK3);
4310 roundDec(RK4);
4311 roundDec(RK5);
4312 roundDec(RK6);
4313 roundDec(RK7);
4314 roundDec(RK8);
4315 roundDec(RK9);
4316 roundDec(RK10);
4317
4318 __ cmpl(rounds, 44);
4319 __ jcc(Assembler::belowEqual, L_128);
4320 roundDec(RK11);
4321 roundDec(RK12);
4322
4323 __ cmpl(rounds, 52);
4324 __ jcc(Assembler::belowEqual, L_192);
4325 roundDec(RK13);
4326 roundDec(RK14);
4327
4328 __ BIND(L_256);
4329 roundDeclast(RK0);
4330 __ jmp(Loop2);
4331
4332 __ BIND(L_128);
4333 roundDeclast(RK0);
4334 __ jmp(Loop2);
4335
4336 __ BIND(L_192);
4337 roundDeclast(RK0);
4338
4339 __ BIND(Loop2);
4340 __ evpxorq(B0, B0, IV, Assembler::AVX_512bit);
4341 __ evpxorq(B1, B1, S0, Assembler::AVX_512bit);
4342 __ evpxorq(B2, B2, S1, Assembler::AVX_512bit);
4343 __ evpxorq(B3, B3, S2, Assembler::AVX_512bit);
4344 __ evpxorq(B4, B4, S3, Assembler::AVX_512bit);
4345 __ evpxorq(B5, B5, S4, Assembler::AVX_512bit);
4346 __ evpxorq(B6, B6, S5, Assembler::AVX_512bit);
4347 __ evpxorq(B7, B7, S6, Assembler::AVX_512bit);
4348 __ evmovdquq(IV, S7, Assembler::AVX_512bit);
4349
4350 __ evmovdquq(Address(to, 0 * 64), B0, Assembler::AVX_512bit);
4351 __ evmovdquq(Address(to, 1 * 64), B1, Assembler::AVX_512bit);
4352 __ evmovdquq(Address(to, 2 * 64), B2, Assembler::AVX_512bit);
4353 __ evmovdquq(Address(to, 3 * 64), B3, Assembler::AVX_512bit);
4354 __ evmovdquq(Address(to, 4 * 64), B4, Assembler::AVX_512bit);
4355 __ evmovdquq(Address(to, 5 * 64), B5, Assembler::AVX_512bit);
4356 __ evmovdquq(Address(to, 6 * 64), B6, Assembler::AVX_512bit);
4357 __ evmovdquq(Address(to, 7 * 64), B7, Assembler::AVX_512bit);
4358 __ leaq(to, Address(to, 8 * 64));
4359 __ jmp(Loop);
4360
4361 __ BIND(Lcbc_dec_rem);
4362 __ evshufi64x2(IV, IV, IV, 0x03, Assembler::AVX_512bit);
4363
4364 __ BIND(Lcbc_dec_rem_loop);
4365 __ subl(len_reg, 16);
4366 __ jcc(Assembler::carrySet, Lcbc_dec_ret);
4367
4368 __ movdqu(S0, Address(from, 0));
4369 __ evpxorq(B0, S0, RK1, Assembler::AVX_512bit);
4370 __ vaesdec(B0, B0, RK2, Assembler::AVX_512bit);
4371 __ vaesdec(B0, B0, RK3, Assembler::AVX_512bit);
4372 __ vaesdec(B0, B0, RK4, Assembler::AVX_512bit);
4373 __ vaesdec(B0, B0, RK5, Assembler::AVX_512bit);
4374 __ vaesdec(B0, B0, RK6, Assembler::AVX_512bit);
4375 __ vaesdec(B0, B0, RK7, Assembler::AVX_512bit);
4376 __ vaesdec(B0, B0, RK8, Assembler::AVX_512bit);
4377 __ vaesdec(B0, B0, RK9, Assembler::AVX_512bit);
4378 __ vaesdec(B0, B0, RK10, Assembler::AVX_512bit);
4379 __ cmpl(rounds, 44);
4380 __ jcc(Assembler::belowEqual, Lcbc_dec_rem_last);
4381
4382 __ vaesdec(B0, B0, RK11, Assembler::AVX_512bit);
4383 __ vaesdec(B0, B0, RK12, Assembler::AVX_512bit);
4384 __ cmpl(rounds, 52);
4385 __ jcc(Assembler::belowEqual, Lcbc_dec_rem_last);
4386
4387 __ vaesdec(B0, B0, RK13, Assembler::AVX_512bit);
4388 __ vaesdec(B0, B0, RK14, Assembler::AVX_512bit);
4389
4390 __ BIND(Lcbc_dec_rem_last);
4391 __ vaesdeclast(B0, B0, RK0, Assembler::AVX_512bit);
4392
4393 __ evpxorq(B0, B0, IV, Assembler::AVX_512bit);
4394 __ evmovdquq(IV, S0, Assembler::AVX_512bit);
4395 __ movdqu(Address(to, 0), B0);
4396 __ leaq(from, Address(from, 16));
4397 __ leaq(to, Address(to, 16));
4398 __ jmp(Lcbc_dec_rem_loop);
4399
4400 __ BIND(Lcbc_dec_ret);
4401 __ movdqu(Address(rvec, 0), IV);
4402
4403 // Zero out the round keys
4404 __ evpxorq(RK0, RK0, RK0, Assembler::AVX_512bit);
4405 __ evpxorq(RK1, RK1, RK1, Assembler::AVX_512bit);
4406 __ evpxorq(RK2, RK2, RK2, Assembler::AVX_512bit);
4407 __ evpxorq(RK3, RK3, RK3, Assembler::AVX_512bit);
4408 __ evpxorq(RK4, RK4, RK4, Assembler::AVX_512bit);
4409 __ evpxorq(RK5, RK5, RK5, Assembler::AVX_512bit);
4410 __ evpxorq(RK6, RK6, RK6, Assembler::AVX_512bit);
4411 __ evpxorq(RK7, RK7, RK7, Assembler::AVX_512bit);
4412 __ evpxorq(RK8, RK8, RK8, Assembler::AVX_512bit);
4413 __ evpxorq(RK9, RK9, RK9, Assembler::AVX_512bit);
4414 __ evpxorq(RK10, RK10, RK10, Assembler::AVX_512bit);
4415 __ cmpl(rounds, 44);
4416 __ jcc(Assembler::belowEqual, Lcbc_exit);
4417 __ evpxorq(RK11, RK11, RK11, Assembler::AVX_512bit);
4418 __ evpxorq(RK12, RK12, RK12, Assembler::AVX_512bit);
4419 __ cmpl(rounds, 52);
4420 __ jcc(Assembler::belowEqual, Lcbc_exit);
4421 __ evpxorq(RK13, RK13, RK13, Assembler::AVX_512bit);
4422 __ evpxorq(RK14, RK14, RK14, Assembler::AVX_512bit);
4423
4424 __ BIND(Lcbc_exit);
4425 __ pop(rbx);
4426 #ifdef _WIN64
4427 __ movl(rax, len_mem);
4428 #else
4429 __ pop(rax); // return length
4430 #endif
4431 __ leave(); // required for proper stackwalking of RuntimeStub frame
4432 __ ret(0);
4433 return start;
4434 }
4435
4436 // byte swap x86 long
4437 address generate_ghash_long_swap_mask() {
4438 __ align(CodeEntryAlignment);
4439 StubCodeMark mark(this, "StubRoutines", "ghash_long_swap_mask");
4440 address start = __ pc();
4441 __ emit_data64(0x0f0e0d0c0b0a0908, relocInfo::none );
4442 __ emit_data64(0x0706050403020100, relocInfo::none );
4443 return start;
4444 }
4445
4446 // byte swap x86 byte array
4447 address generate_ghash_byte_swap_mask() {
4448 __ align(CodeEntryAlignment);
4449 StubCodeMark mark(this, "StubRoutines", "ghash_byte_swap_mask");
4450 address start = __ pc();
4451 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none );
4452 __ emit_data64(0x0001020304050607, relocInfo::none );
4453 return start;
4454 }
4455
4456 /* Single and multi-block ghash operations */
4457 address generate_ghash_processBlocks() {
4458 __ align(CodeEntryAlignment);
4459 Label L_ghash_loop, L_exit;
4460 StubCodeMark mark(this, "StubRoutines", "ghash_processBlocks");
4461 address start = __ pc();
4462
4463 const Register state = c_rarg0;
4464 const Register subkeyH = c_rarg1;
4465 const Register data = c_rarg2;
4466 const Register blocks = c_rarg3;
4467
4468 const XMMRegister xmm_temp0 = xmm0;
4469 const XMMRegister xmm_temp1 = xmm1;
4470 const XMMRegister xmm_temp2 = xmm2;
4471 const XMMRegister xmm_temp3 = xmm3;
4472 const XMMRegister xmm_temp4 = xmm4;
4473 const XMMRegister xmm_temp5 = xmm5;
4474 const XMMRegister xmm_temp6 = xmm6;
4475 const XMMRegister xmm_temp7 = xmm7;
4476 const XMMRegister xmm_temp8 = xmm8;
4477 const XMMRegister xmm_temp9 = xmm9;
4478 const XMMRegister xmm_temp10 = xmm10;
4479
4480 __ enter();
4481
4482 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
4483 // context for the registers used, where all instructions below are using 128-bit mode
4484 // On EVEX without VL and BW, these instructions will all be AVX.
4485 if (VM_Version::supports_avx512vlbw()) {
4486 __ movl(rax, 0xffff);
4487 __ kmovql(k1, rax);
4488 }
4489
4490 __ movdqu(xmm_temp10, ExternalAddress(StubRoutines::x86::ghash_long_swap_mask_addr()));
4491
4492 __ movdqu(xmm_temp0, Address(state, 0));
4493 __ pshufb(xmm_temp0, xmm_temp10);
4494
4495
4496 __ BIND(L_ghash_loop);
4497 __ movdqu(xmm_temp2, Address(data, 0));
4498 __ pshufb(xmm_temp2, ExternalAddress(StubRoutines::x86::ghash_byte_swap_mask_addr()));
4499
4500 __ movdqu(xmm_temp1, Address(subkeyH, 0));
4501 __ pshufb(xmm_temp1, xmm_temp10);
4502
4503 __ pxor(xmm_temp0, xmm_temp2);
4504
4505 //
4506 // Multiply with the hash key
4507 //
4508 __ movdqu(xmm_temp3, xmm_temp0);
4509 __ pclmulqdq(xmm_temp3, xmm_temp1, 0); // xmm3 holds a0*b0
4510 __ movdqu(xmm_temp4, xmm_temp0);
4511 __ pclmulqdq(xmm_temp4, xmm_temp1, 16); // xmm4 holds a0*b1
4512
4513 __ movdqu(xmm_temp5, xmm_temp0);
4514 __ pclmulqdq(xmm_temp5, xmm_temp1, 1); // xmm5 holds a1*b0
4515 __ movdqu(xmm_temp6, xmm_temp0);
4516 __ pclmulqdq(xmm_temp6, xmm_temp1, 17); // xmm6 holds a1*b1
4517
4518 __ pxor(xmm_temp4, xmm_temp5); // xmm4 holds a0*b1 + a1*b0
4519
4520 __ movdqu(xmm_temp5, xmm_temp4); // move the contents of xmm4 to xmm5
4521 __ psrldq(xmm_temp4, 8); // shift by xmm4 64 bits to the right
4522 __ pslldq(xmm_temp5, 8); // shift by xmm5 64 bits to the left
4523 __ pxor(xmm_temp3, xmm_temp5);
4524 __ pxor(xmm_temp6, xmm_temp4); // Register pair <xmm6:xmm3> holds the result
4525 // of the carry-less multiplication of
4526 // xmm0 by xmm1.
4527
4528 // We shift the result of the multiplication by one bit position
4529 // to the left to cope for the fact that the bits are reversed.
4530 __ movdqu(xmm_temp7, xmm_temp3);
4531 __ movdqu(xmm_temp8, xmm_temp6);
4532 __ pslld(xmm_temp3, 1);
4533 __ pslld(xmm_temp6, 1);
4534 __ psrld(xmm_temp7, 31);
4535 __ psrld(xmm_temp8, 31);
4536 __ movdqu(xmm_temp9, xmm_temp7);
4537 __ pslldq(xmm_temp8, 4);
4538 __ pslldq(xmm_temp7, 4);
4539 __ psrldq(xmm_temp9, 12);
4540 __ por(xmm_temp3, xmm_temp7);
4541 __ por(xmm_temp6, xmm_temp8);
4542 __ por(xmm_temp6, xmm_temp9);
4543
4544 //
4545 // First phase of the reduction
4546 //
4547 // Move xmm3 into xmm7, xmm8, xmm9 in order to perform the shifts
4548 // independently.
4549 __ movdqu(xmm_temp7, xmm_temp3);
4550 __ movdqu(xmm_temp8, xmm_temp3);
4551 __ movdqu(xmm_temp9, xmm_temp3);
4552 __ pslld(xmm_temp7, 31); // packed right shift shifting << 31
4553 __ pslld(xmm_temp8, 30); // packed right shift shifting << 30
4554 __ pslld(xmm_temp9, 25); // packed right shift shifting << 25
4555 __ pxor(xmm_temp7, xmm_temp8); // xor the shifted versions
4556 __ pxor(xmm_temp7, xmm_temp9);
4557 __ movdqu(xmm_temp8, xmm_temp7);
4558 __ pslldq(xmm_temp7, 12);
4559 __ psrldq(xmm_temp8, 4);
4560 __ pxor(xmm_temp3, xmm_temp7); // first phase of the reduction complete
4561
4562 //
4563 // Second phase of the reduction
4564 //
4565 // Make 3 copies of xmm3 in xmm2, xmm4, xmm5 for doing these
4566 // shift operations.
4567 __ movdqu(xmm_temp2, xmm_temp3);
4568 __ movdqu(xmm_temp4, xmm_temp3);
4569 __ movdqu(xmm_temp5, xmm_temp3);
4570 __ psrld(xmm_temp2, 1); // packed left shifting >> 1
4571 __ psrld(xmm_temp4, 2); // packed left shifting >> 2
4572 __ psrld(xmm_temp5, 7); // packed left shifting >> 7
4573 __ pxor(xmm_temp2, xmm_temp4); // xor the shifted versions
4574 __ pxor(xmm_temp2, xmm_temp5);
4575 __ pxor(xmm_temp2, xmm_temp8);
4576 __ pxor(xmm_temp3, xmm_temp2);
4577 __ pxor(xmm_temp6, xmm_temp3); // the result is in xmm6
4578
4579 __ decrement(blocks);
4580 __ jcc(Assembler::zero, L_exit);
4581 __ movdqu(xmm_temp0, xmm_temp6);
4582 __ addptr(data, 16);
4583 __ jmp(L_ghash_loop);
4584
4585 __ BIND(L_exit);
4586 __ pshufb(xmm_temp6, xmm_temp10); // Byte swap 16-byte result
4587 __ movdqu(Address(state, 0), xmm_temp6); // store the result
4588 __ leave();
4589 __ ret(0);
4590 return start;
4591 }
4592
4593 //base64 character set
4594 address base64_charset_addr() {
4595 __ align(CodeEntryAlignment);
4596 StubCodeMark mark(this, "StubRoutines", "base64_charset");
4597 address start = __ pc();
4598 __ emit_data64(0x0000004200000041, relocInfo::none);
4599 __ emit_data64(0x0000004400000043, relocInfo::none);
4600 __ emit_data64(0x0000004600000045, relocInfo::none);
4601 __ emit_data64(0x0000004800000047, relocInfo::none);
4602 __ emit_data64(0x0000004a00000049, relocInfo::none);
4603 __ emit_data64(0x0000004c0000004b, relocInfo::none);
4604 __ emit_data64(0x0000004e0000004d, relocInfo::none);
4605 __ emit_data64(0x000000500000004f, relocInfo::none);
4606 __ emit_data64(0x0000005200000051, relocInfo::none);
4607 __ emit_data64(0x0000005400000053, relocInfo::none);
4608 __ emit_data64(0x0000005600000055, relocInfo::none);
4609 __ emit_data64(0x0000005800000057, relocInfo::none);
4610 __ emit_data64(0x0000005a00000059, relocInfo::none);
4611 __ emit_data64(0x0000006200000061, relocInfo::none);
4612 __ emit_data64(0x0000006400000063, relocInfo::none);
4613 __ emit_data64(0x0000006600000065, relocInfo::none);
4614 __ emit_data64(0x0000006800000067, relocInfo::none);
4615 __ emit_data64(0x0000006a00000069, relocInfo::none);
4616 __ emit_data64(0x0000006c0000006b, relocInfo::none);
4617 __ emit_data64(0x0000006e0000006d, relocInfo::none);
4618 __ emit_data64(0x000000700000006f, relocInfo::none);
4619 __ emit_data64(0x0000007200000071, relocInfo::none);
4620 __ emit_data64(0x0000007400000073, relocInfo::none);
4621 __ emit_data64(0x0000007600000075, relocInfo::none);
4622 __ emit_data64(0x0000007800000077, relocInfo::none);
4623 __ emit_data64(0x0000007a00000079, relocInfo::none);
4624 __ emit_data64(0x0000003100000030, relocInfo::none);
4625 __ emit_data64(0x0000003300000032, relocInfo::none);
4626 __ emit_data64(0x0000003500000034, relocInfo::none);
4627 __ emit_data64(0x0000003700000036, relocInfo::none);
4628 __ emit_data64(0x0000003900000038, relocInfo::none);
4629 __ emit_data64(0x0000002f0000002b, relocInfo::none);
4630 return start;
4631 }
4632
4633 //base64 url character set
4634 address base64url_charset_addr() {
4635 __ align(CodeEntryAlignment);
4636 StubCodeMark mark(this, "StubRoutines", "base64url_charset");
4637 address start = __ pc();
4638 __ emit_data64(0x0000004200000041, relocInfo::none);
4639 __ emit_data64(0x0000004400000043, relocInfo::none);
4640 __ emit_data64(0x0000004600000045, relocInfo::none);
4641 __ emit_data64(0x0000004800000047, relocInfo::none);
4642 __ emit_data64(0x0000004a00000049, relocInfo::none);
4643 __ emit_data64(0x0000004c0000004b, relocInfo::none);
4644 __ emit_data64(0x0000004e0000004d, relocInfo::none);
4645 __ emit_data64(0x000000500000004f, relocInfo::none);
4646 __ emit_data64(0x0000005200000051, relocInfo::none);
4647 __ emit_data64(0x0000005400000053, relocInfo::none);
4648 __ emit_data64(0x0000005600000055, relocInfo::none);
4649 __ emit_data64(0x0000005800000057, relocInfo::none);
4650 __ emit_data64(0x0000005a00000059, relocInfo::none);
4651 __ emit_data64(0x0000006200000061, relocInfo::none);
4652 __ emit_data64(0x0000006400000063, relocInfo::none);
4653 __ emit_data64(0x0000006600000065, relocInfo::none);
4654 __ emit_data64(0x0000006800000067, relocInfo::none);
4655 __ emit_data64(0x0000006a00000069, relocInfo::none);
4656 __ emit_data64(0x0000006c0000006b, relocInfo::none);
4657 __ emit_data64(0x0000006e0000006d, relocInfo::none);
4658 __ emit_data64(0x000000700000006f, relocInfo::none);
4659 __ emit_data64(0x0000007200000071, relocInfo::none);
4660 __ emit_data64(0x0000007400000073, relocInfo::none);
4661 __ emit_data64(0x0000007600000075, relocInfo::none);
4662 __ emit_data64(0x0000007800000077, relocInfo::none);
4663 __ emit_data64(0x0000007a00000079, relocInfo::none);
4664 __ emit_data64(0x0000003100000030, relocInfo::none);
4665 __ emit_data64(0x0000003300000032, relocInfo::none);
4666 __ emit_data64(0x0000003500000034, relocInfo::none);
4667 __ emit_data64(0x0000003700000036, relocInfo::none);
4668 __ emit_data64(0x0000003900000038, relocInfo::none);
4669 __ emit_data64(0x0000005f0000002d, relocInfo::none);
4670
4671 return start;
4672 }
4673
4674 address base64_bswap_mask_addr() {
4675 __ align(CodeEntryAlignment);
4676 StubCodeMark mark(this, "StubRoutines", "bswap_mask_base64");
4677 address start = __ pc();
4678 __ emit_data64(0x0504038002010080, relocInfo::none);
4679 __ emit_data64(0x0b0a098008070680, relocInfo::none);
4680 __ emit_data64(0x0908078006050480, relocInfo::none);
4681 __ emit_data64(0x0f0e0d800c0b0a80, relocInfo::none);
4682 __ emit_data64(0x0605048003020180, relocInfo::none);
4683 __ emit_data64(0x0c0b0a8009080780, relocInfo::none);
4684 __ emit_data64(0x0504038002010080, relocInfo::none);
4685 __ emit_data64(0x0b0a098008070680, relocInfo::none);
4686
4687 return start;
4688 }
4689
4690 address base64_right_shift_mask_addr() {
4691 __ align(CodeEntryAlignment);
4692 StubCodeMark mark(this, "StubRoutines", "right_shift_mask");
4693 address start = __ pc();
4694 __ emit_data64(0x0006000400020000, relocInfo::none);
4695 __ emit_data64(0x0006000400020000, relocInfo::none);
4696 __ emit_data64(0x0006000400020000, relocInfo::none);
4697 __ emit_data64(0x0006000400020000, relocInfo::none);
4698 __ emit_data64(0x0006000400020000, relocInfo::none);
4699 __ emit_data64(0x0006000400020000, relocInfo::none);
4700 __ emit_data64(0x0006000400020000, relocInfo::none);
4701 __ emit_data64(0x0006000400020000, relocInfo::none);
4702
4703 return start;
4704 }
4705
4706 address base64_left_shift_mask_addr() {
4707 __ align(CodeEntryAlignment);
4708 StubCodeMark mark(this, "StubRoutines", "left_shift_mask");
4709 address start = __ pc();
4710 __ emit_data64(0x0000000200040000, relocInfo::none);
4711 __ emit_data64(0x0000000200040000, relocInfo::none);
4712 __ emit_data64(0x0000000200040000, relocInfo::none);
4713 __ emit_data64(0x0000000200040000, relocInfo::none);
4714 __ emit_data64(0x0000000200040000, relocInfo::none);
4715 __ emit_data64(0x0000000200040000, relocInfo::none);
4716 __ emit_data64(0x0000000200040000, relocInfo::none);
4717 __ emit_data64(0x0000000200040000, relocInfo::none);
4718
4719 return start;
4720 }
4721
4722 address base64_and_mask_addr() {
4723 __ align(CodeEntryAlignment);
4724 StubCodeMark mark(this, "StubRoutines", "and_mask");
4725 address start = __ pc();
4726 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4727 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4728 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4729 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4730 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4731 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4732 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4733 __ emit_data64(0x3f003f003f000000, relocInfo::none);
4734 return start;
4735 }
4736
4737 address base64_gather_mask_addr() {
4738 __ align(CodeEntryAlignment);
4739 StubCodeMark mark(this, "StubRoutines", "gather_mask");
4740 address start = __ pc();
4741 __ emit_data64(0xffffffffffffffff, relocInfo::none);
4742 return start;
4743 }
4744
4745 // Code for generating Base64 encoding.
4746 // Intrinsic function prototype in Base64.java:
4747 // private void encodeBlock(byte[] src, int sp, int sl, byte[] dst, int dp, boolean isURL) {
4748 address generate_base64_encodeBlock() {
4749 __ align(CodeEntryAlignment);
4750 StubCodeMark mark(this, "StubRoutines", "implEncode");
4751 address start = __ pc();
4752 __ enter();
4753
4754 // Save callee-saved registers before using them
4755 __ push(r12);
4756 __ push(r13);
4757 __ push(r14);
4758 __ push(r15);
4759 __ push(rbx);
4760
4761 // arguments
4762 const Register source = c_rarg0; // Source Array
4763 const Register start_offset = c_rarg1; // start offset
4764 const Register end_offset = c_rarg2; // end offset
4765 const Register dest = c_rarg3; // destination array
4766
4767 #ifndef _WIN64
4768 const Register dp = c_rarg4; // Position for writing to dest array
4769 const Register isURL = c_rarg5;// Base64 or URL character set
4770 #else
4771 const Address dp_mem(rbp, 6 * wordSize); // length is on stack on Win64
4772 const Address isURL_mem(rbp, 7 * wordSize);
4773 const Register isURL = r10; // pick the volatile windows register
4774 const Register dp = r12;
4775 __ movl(dp, dp_mem);
4776 __ movl(isURL, isURL_mem);
4777 #endif
4778
4779 const Register length = r14;
4780 Label L_process80, L_process32, L_process3, L_exit, L_processdata;
4781
4782 // calculate length from offsets
4783 __ movl(length, end_offset);
4784 __ subl(length, start_offset);
4785 __ cmpl(length, 0);
4786 __ jcc(Assembler::lessEqual, L_exit);
4787
4788 // Save k1 value in rbx
4789 __ kmovql(rbx, k1);
4790 __ lea(r11, ExternalAddress(StubRoutines::x86::base64_charset_addr()));
4791 // check if base64 charset(isURL=0) or base64 url charset(isURL=1) needs to be loaded
4792 __ cmpl(isURL, 0);
4793 __ jcc(Assembler::equal, L_processdata);
4794 __ lea(r11, ExternalAddress(StubRoutines::x86::base64url_charset_addr()));
4795
4796 // load masks required for encoding data
4797 __ BIND(L_processdata);
4798 __ movdqu(xmm16, ExternalAddress(StubRoutines::x86::base64_gather_mask_addr()));
4799 // Set 64 bits of K register.
4800 __ evpcmpeqb(k1, xmm16, xmm16, Assembler::AVX_512bit);
4801 __ evmovdquq(xmm12, ExternalAddress(StubRoutines::x86::base64_bswap_mask_addr()), Assembler::AVX_256bit, r13);
4802 __ evmovdquq(xmm13, ExternalAddress(StubRoutines::x86::base64_right_shift_mask_addr()), Assembler::AVX_512bit, r13);
4803 __ evmovdquq(xmm14, ExternalAddress(StubRoutines::x86::base64_left_shift_mask_addr()), Assembler::AVX_512bit, r13);
4804 __ evmovdquq(xmm15, ExternalAddress(StubRoutines::x86::base64_and_mask_addr()), Assembler::AVX_512bit, r13);
4805
4806 // Vector Base64 implementation, producing 96 bytes of encoded data
4807 __ BIND(L_process80);
4808 __ cmpl(length, 80);
4809 __ jcc(Assembler::below, L_process32);
4810 __ evmovdquq(xmm0, Address(source, start_offset, Address::times_1, 0), Assembler::AVX_256bit);
4811 __ evmovdquq(xmm1, Address(source, start_offset, Address::times_1, 24), Assembler::AVX_256bit);
4812 __ evmovdquq(xmm2, Address(source, start_offset, Address::times_1, 48), Assembler::AVX_256bit);
4813
4814 //permute the input data in such a manner that we have continuity of the source
4815 __ vpermq(xmm3, xmm0, 148, Assembler::AVX_256bit);
4816 __ vpermq(xmm4, xmm1, 148, Assembler::AVX_256bit);
4817 __ vpermq(xmm5, xmm2, 148, Assembler::AVX_256bit);
4818
4819 //shuffle input and group 3 bytes of data and to it add 0 as the 4th byte.
4820 //we can deal with 12 bytes at a time in a 128 bit register
4821 __ vpshufb(xmm3, xmm3, xmm12, Assembler::AVX_256bit);
4822 __ vpshufb(xmm4, xmm4, xmm12, Assembler::AVX_256bit);
4823 __ vpshufb(xmm5, xmm5, xmm12, Assembler::AVX_256bit);
4824
4825 //convert byte to word. Each 128 bit register will have 6 bytes for processing
4826 __ vpmovzxbw(xmm3, xmm3, Assembler::AVX_512bit);
4827 __ vpmovzxbw(xmm4, xmm4, Assembler::AVX_512bit);
4828 __ vpmovzxbw(xmm5, xmm5, Assembler::AVX_512bit);
4829
4830 // Extract bits in the following pattern 6, 4+2, 2+4, 6 to convert 3, 8 bit numbers to 4, 6 bit numbers
4831 __ evpsrlvw(xmm0, xmm3, xmm13, Assembler::AVX_512bit);
4832 __ evpsrlvw(xmm1, xmm4, xmm13, Assembler::AVX_512bit);
4833 __ evpsrlvw(xmm2, xmm5, xmm13, Assembler::AVX_512bit);
4834
4835 __ evpsllvw(xmm3, xmm3, xmm14, Assembler::AVX_512bit);
4836 __ evpsllvw(xmm4, xmm4, xmm14, Assembler::AVX_512bit);
4837 __ evpsllvw(xmm5, xmm5, xmm14, Assembler::AVX_512bit);
4838
4839 __ vpsrlq(xmm0, xmm0, 8, Assembler::AVX_512bit);
4840 __ vpsrlq(xmm1, xmm1, 8, Assembler::AVX_512bit);
4841 __ vpsrlq(xmm2, xmm2, 8, Assembler::AVX_512bit);
4842
4843 __ vpsllq(xmm3, xmm3, 8, Assembler::AVX_512bit);
4844 __ vpsllq(xmm4, xmm4, 8, Assembler::AVX_512bit);
4845 __ vpsllq(xmm5, xmm5, 8, Assembler::AVX_512bit);
4846
4847 __ vpandq(xmm3, xmm3, xmm15, Assembler::AVX_512bit);
4848 __ vpandq(xmm4, xmm4, xmm15, Assembler::AVX_512bit);
4849 __ vpandq(xmm5, xmm5, xmm15, Assembler::AVX_512bit);
4850
4851 // Get the final 4*6 bits base64 encoding
4852 __ vporq(xmm3, xmm3, xmm0, Assembler::AVX_512bit);
4853 __ vporq(xmm4, xmm4, xmm1, Assembler::AVX_512bit);
4854 __ vporq(xmm5, xmm5, xmm2, Assembler::AVX_512bit);
4855
4856 // Shift
4857 __ vpsrlq(xmm3, xmm3, 8, Assembler::AVX_512bit);
4858 __ vpsrlq(xmm4, xmm4, 8, Assembler::AVX_512bit);
4859 __ vpsrlq(xmm5, xmm5, 8, Assembler::AVX_512bit);
4860
4861 // look up 6 bits in the base64 character set to fetch the encoding
4862 // we are converting word to dword as gather instructions need dword indices for looking up encoding
4863 __ vextracti64x4(xmm6, xmm3, 0);
4864 __ vpmovzxwd(xmm0, xmm6, Assembler::AVX_512bit);
4865 __ vextracti64x4(xmm6, xmm3, 1);
4866 __ vpmovzxwd(xmm1, xmm6, Assembler::AVX_512bit);
4867
4868 __ vextracti64x4(xmm6, xmm4, 0);
4869 __ vpmovzxwd(xmm2, xmm6, Assembler::AVX_512bit);
4870 __ vextracti64x4(xmm6, xmm4, 1);
4871 __ vpmovzxwd(xmm3, xmm6, Assembler::AVX_512bit);
4872
4873 __ vextracti64x4(xmm4, xmm5, 0);
4874 __ vpmovzxwd(xmm6, xmm4, Assembler::AVX_512bit);
4875
4876 __ vextracti64x4(xmm4, xmm5, 1);
4877 __ vpmovzxwd(xmm7, xmm4, Assembler::AVX_512bit);
4878
4879 __ kmovql(k2, k1);
4880 __ evpgatherdd(xmm4, k2, Address(r11, xmm0, Address::times_4, 0), Assembler::AVX_512bit);
4881 __ kmovql(k2, k1);
4882 __ evpgatherdd(xmm5, k2, Address(r11, xmm1, Address::times_4, 0), Assembler::AVX_512bit);
4883 __ kmovql(k2, k1);
4884 __ evpgatherdd(xmm8, k2, Address(r11, xmm2, Address::times_4, 0), Assembler::AVX_512bit);
4885 __ kmovql(k2, k1);
4886 __ evpgatherdd(xmm9, k2, Address(r11, xmm3, Address::times_4, 0), Assembler::AVX_512bit);
4887 __ kmovql(k2, k1);
4888 __ evpgatherdd(xmm10, k2, Address(r11, xmm6, Address::times_4, 0), Assembler::AVX_512bit);
4889 __ kmovql(k2, k1);
4890 __ evpgatherdd(xmm11, k2, Address(r11, xmm7, Address::times_4, 0), Assembler::AVX_512bit);
4891
4892 //Down convert dword to byte. Final output is 16*6 = 96 bytes long
4893 __ evpmovdb(Address(dest, dp, Address::times_1, 0), xmm4, Assembler::AVX_512bit);
4894 __ evpmovdb(Address(dest, dp, Address::times_1, 16), xmm5, Assembler::AVX_512bit);
4895 __ evpmovdb(Address(dest, dp, Address::times_1, 32), xmm8, Assembler::AVX_512bit);
4896 __ evpmovdb(Address(dest, dp, Address::times_1, 48), xmm9, Assembler::AVX_512bit);
4897 __ evpmovdb(Address(dest, dp, Address::times_1, 64), xmm10, Assembler::AVX_512bit);
4898 __ evpmovdb(Address(dest, dp, Address::times_1, 80), xmm11, Assembler::AVX_512bit);
4899
4900 __ addq(dest, 96);
4901 __ addq(source, 72);
4902 __ subq(length, 72);
4903 __ jmp(L_process80);
4904
4905 // Vector Base64 implementation generating 32 bytes of encoded data
4906 __ BIND(L_process32);
4907 __ cmpl(length, 32);
4908 __ jcc(Assembler::below, L_process3);
4909 __ evmovdquq(xmm0, Address(source, start_offset), Assembler::AVX_256bit);
4910 __ vpermq(xmm0, xmm0, 148, Assembler::AVX_256bit);
4911 __ vpshufb(xmm6, xmm0, xmm12, Assembler::AVX_256bit);
4912 __ vpmovzxbw(xmm6, xmm6, Assembler::AVX_512bit);
4913 __ evpsrlvw(xmm2, xmm6, xmm13, Assembler::AVX_512bit);
4914 __ evpsllvw(xmm3, xmm6, xmm14, Assembler::AVX_512bit);
4915
4916 __ vpsrlq(xmm2, xmm2, 8, Assembler::AVX_512bit);
4917 __ vpsllq(xmm3, xmm3, 8, Assembler::AVX_512bit);
4918 __ vpandq(xmm3, xmm3, xmm15, Assembler::AVX_512bit);
4919 __ vporq(xmm1, xmm2, xmm3, Assembler::AVX_512bit);
4920 __ vpsrlq(xmm1, xmm1, 8, Assembler::AVX_512bit);
4921 __ vextracti64x4(xmm9, xmm1, 0);
4922 __ vpmovzxwd(xmm6, xmm9, Assembler::AVX_512bit);
4923 __ vextracti64x4(xmm9, xmm1, 1);
4924 __ vpmovzxwd(xmm5, xmm9, Assembler::AVX_512bit);
4925 __ kmovql(k2, k1);
4926 __ evpgatherdd(xmm8, k2, Address(r11, xmm6, Address::times_4, 0), Assembler::AVX_512bit);
4927 __ kmovql(k2, k1);
4928 __ evpgatherdd(xmm10, k2, Address(r11, xmm5, Address::times_4, 0), Assembler::AVX_512bit);
4929 __ evpmovdb(Address(dest, dp, Address::times_1, 0), xmm8, Assembler::AVX_512bit);
4930 __ evpmovdb(Address(dest, dp, Address::times_1, 16), xmm10, Assembler::AVX_512bit);
4931 __ subq(length, 24);
4932 __ addq(dest, 32);
4933 __ addq(source, 24);
4934 __ jmp(L_process32);
4935
4936 // Scalar data processing takes 3 bytes at a time and produces 4 bytes of encoded data
4937 /* This code corresponds to the scalar version of the following snippet in Base64.java
4938 ** int bits = (src[sp0++] & 0xff) << 16 |(src[sp0++] & 0xff) << 8 |(src[sp0++] & 0xff);
4939 ** dst[dp0++] = (byte)base64[(bits >> > 18) & 0x3f];
4940 ** dst[dp0++] = (byte)base64[(bits >> > 12) & 0x3f];
4941 ** dst[dp0++] = (byte)base64[(bits >> > 6) & 0x3f];
4942 ** dst[dp0++] = (byte)base64[bits & 0x3f];*/
4943 __ BIND(L_process3);
4944 __ cmpl(length, 3);
4945 __ jcc(Assembler::below, L_exit);
4946 // Read 1 byte at a time
4947 __ movzbl(rax, Address(source, start_offset));
4948 __ shll(rax, 0x10);
4949 __ movl(r15, rax);
4950 __ movzbl(rax, Address(source, start_offset, Address::times_1, 1));
4951 __ shll(rax, 0x8);
4952 __ movzwl(rax, rax);
4953 __ orl(r15, rax);
4954 __ movzbl(rax, Address(source, start_offset, Address::times_1, 2));
4955 __ orl(rax, r15);
4956 // Save 3 bytes read in r15
4957 __ movl(r15, rax);
4958 __ shrl(rax, 0x12);
4959 __ andl(rax, 0x3f);
4960 // rax contains the index, r11 contains base64 lookup table
4961 __ movb(rax, Address(r11, rax, Address::times_4));
4962 // Write the encoded byte to destination
4963 __ movb(Address(dest, dp, Address::times_1, 0), rax);
4964 __ movl(rax, r15);
4965 __ shrl(rax, 0xc);
4966 __ andl(rax, 0x3f);
4967 __ movb(rax, Address(r11, rax, Address::times_4));
4968 __ movb(Address(dest, dp, Address::times_1, 1), rax);
4969 __ movl(rax, r15);
4970 __ shrl(rax, 0x6);
4971 __ andl(rax, 0x3f);
4972 __ movb(rax, Address(r11, rax, Address::times_4));
4973 __ movb(Address(dest, dp, Address::times_1, 2), rax);
4974 __ movl(rax, r15);
4975 __ andl(rax, 0x3f);
4976 __ movb(rax, Address(r11, rax, Address::times_4));
4977 __ movb(Address(dest, dp, Address::times_1, 3), rax);
4978 __ subl(length, 3);
4979 __ addq(dest, 4);
4980 __ addq(source, 3);
4981 __ jmp(L_process3);
4982 __ BIND(L_exit);
4983 // restore k1 register value
4984 __ kmovql(k1, rbx);
4985 __ pop(rbx);
4986 __ pop(r15);
4987 __ pop(r14);
4988 __ pop(r13);
4989 __ pop(r12);
4990 __ leave();
4991 __ ret(0);
4992 return start;
4993 }
4994
4995 /**
4996 * Arguments:
4997 *
4998 * Inputs:
4999 * c_rarg0 - int crc
5000 * c_rarg1 - byte* buf
5001 * c_rarg2 - int length
5002 *
5003 * Ouput:
5004 * rax - int crc result
5005 */
5006 address generate_updateBytesCRC32() {
5007 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
5008
5009 __ align(CodeEntryAlignment);
5010 StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
5011
5012 address start = __ pc();
5013 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
5014 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
5015 // rscratch1: r10
5016 const Register crc = c_rarg0; // crc
5017 const Register buf = c_rarg1; // source java byte array address
5018 const Register len = c_rarg2; // length
5019 const Register table = c_rarg3; // crc_table address (reuse register)
5020 const Register tmp = r11;
5021 assert_different_registers(crc, buf, len, table, tmp, rax);
5022
5023 BLOCK_COMMENT("Entry:");
5024 __ enter(); // required for proper stackwalking of RuntimeStub frame
5025
5026 __ kernel_crc32(crc, buf, len, table, tmp);
5027
5028 __ movl(rax, crc);
5029 __ vzeroupper();
5030 __ leave(); // required for proper stackwalking of RuntimeStub frame
5031 __ ret(0);
5032
5033 return start;
5034 }
5035
5036 /**
5037 * Arguments:
5038 *
5039 * Inputs:
5040 * c_rarg0 - int crc
5041 * c_rarg1 - byte* buf
5042 * c_rarg2 - long length
5043 * c_rarg3 - table_start - optional (present only when doing a library_call,
5044 * not used by x86 algorithm)
5045 *
5046 * Ouput:
5047 * rax - int crc result
5048 */
5049 address generate_updateBytesCRC32C(bool is_pclmulqdq_supported) {
5050 assert(UseCRC32CIntrinsics, "need SSE4_2");
5051 __ align(CodeEntryAlignment);
5052 StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32C");
5053 address start = __ pc();
5054 //reg.arg int#0 int#1 int#2 int#3 int#4 int#5 float regs
5055 //Windows RCX RDX R8 R9 none none XMM0..XMM3
5056 //Lin / Sol RDI RSI RDX RCX R8 R9 XMM0..XMM7
5057 const Register crc = c_rarg0; // crc
5058 const Register buf = c_rarg1; // source java byte array address
5059 const Register len = c_rarg2; // length
5060 const Register a = rax;
5061 const Register j = r9;
5062 const Register k = r10;
5063 const Register l = r11;
5064 #ifdef _WIN64
5065 const Register y = rdi;
5066 const Register z = rsi;
5067 #else
5068 const Register y = rcx;
5069 const Register z = r8;
5070 #endif
5071 assert_different_registers(crc, buf, len, a, j, k, l, y, z);
5072
5073 BLOCK_COMMENT("Entry:");
5074 __ enter(); // required for proper stackwalking of RuntimeStub frame
5075 #ifdef _WIN64
5076 __ push(y);
5077 __ push(z);
5078 #endif
5079 __ crc32c_ipl_alg2_alt2(crc, buf, len,
5080 a, j, k,
5081 l, y, z,
5082 c_farg0, c_farg1, c_farg2,
5083 is_pclmulqdq_supported);
5084 __ movl(rax, crc);
5085 #ifdef _WIN64
5086 __ pop(z);
5087 __ pop(y);
5088 #endif
5089 __ vzeroupper();
5090 __ leave(); // required for proper stackwalking of RuntimeStub frame
5091 __ ret(0);
5092
5093 return start;
5094 }
5095
5096 /**
5097 * Arguments:
5098 *
5099 * Input:
5100 * c_rarg0 - x address
5101 * c_rarg1 - x length
5102 * c_rarg2 - y address
5103 * c_rarg3 - y length
5104 * not Win64
5105 * c_rarg4 - z address
5106 * c_rarg5 - z length
5107 * Win64
5108 * rsp+40 - z address
5109 * rsp+48 - z length
5110 */
5111 address generate_multiplyToLen() {
5112 __ align(CodeEntryAlignment);
5113 StubCodeMark mark(this, "StubRoutines", "multiplyToLen");
5114
5115 address start = __ pc();
5116 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
5117 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
5118 const Register x = rdi;
5119 const Register xlen = rax;
5120 const Register y = rsi;
5121 const Register ylen = rcx;
5122 const Register z = r8;
5123 const Register zlen = r11;
5124
5125 // Next registers will be saved on stack in multiply_to_len().
5126 const Register tmp1 = r12;
5127 const Register tmp2 = r13;
5128 const Register tmp3 = r14;
5129 const Register tmp4 = r15;
5130 const Register tmp5 = rbx;
5131
5132 BLOCK_COMMENT("Entry:");
5133 __ enter(); // required for proper stackwalking of RuntimeStub frame
5134
5135 #ifndef _WIN64
5136 __ movptr(zlen, r9); // Save r9 in r11 - zlen
5137 #endif
5138 setup_arg_regs(4); // x => rdi, xlen => rsi, y => rdx
5139 // ylen => rcx, z => r8, zlen => r11
5140 // r9 and r10 may be used to save non-volatile registers
5141 #ifdef _WIN64
5142 // last 2 arguments (#4, #5) are on stack on Win64
5143 __ movptr(z, Address(rsp, 6 * wordSize));
5144 __ movptr(zlen, Address(rsp, 7 * wordSize));
5145 #endif
5146
5147 __ movptr(xlen, rsi);
5148 __ movptr(y, rdx);
5149 __ multiply_to_len(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5);
5150
5151 restore_arg_regs();
5152
5153 __ leave(); // required for proper stackwalking of RuntimeStub frame
5154 __ ret(0);
5155
5156 return start;
5157 }
5158
5159 /**
5160 * Arguments:
5161 *
5162 * Input:
5163 * c_rarg0 - obja address
5164 * c_rarg1 - objb address
5165 * c_rarg3 - length length
5166 * c_rarg4 - scale log2_array_indxscale
5167 *
5168 * Output:
5169 * rax - int >= mismatched index, < 0 bitwise complement of tail
5170 */
5171 address generate_vectorizedMismatch() {
5172 __ align(CodeEntryAlignment);
5173 StubCodeMark mark(this, "StubRoutines", "vectorizedMismatch");
5174 address start = __ pc();
5175
5176 BLOCK_COMMENT("Entry:");
5177 __ enter();
5178
5179 #ifdef _WIN64 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
5180 const Register scale = c_rarg0; //rcx, will exchange with r9
5181 const Register objb = c_rarg1; //rdx
5182 const Register length = c_rarg2; //r8
5183 const Register obja = c_rarg3; //r9
5184 __ xchgq(obja, scale); //now obja and scale contains the correct contents
5185
5186 const Register tmp1 = r10;
5187 const Register tmp2 = r11;
5188 #endif
5189 #ifndef _WIN64 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
5190 const Register obja = c_rarg0; //U:rdi
5191 const Register objb = c_rarg1; //U:rsi
5192 const Register length = c_rarg2; //U:rdx
5193 const Register scale = c_rarg3; //U:rcx
5194 const Register tmp1 = r8;
5195 const Register tmp2 = r9;
5196 #endif
5197 const Register result = rax; //return value
5198 const XMMRegister vec0 = xmm0;
5199 const XMMRegister vec1 = xmm1;
5200 const XMMRegister vec2 = xmm2;
5201
5202 __ vectorized_mismatch(obja, objb, length, scale, result, tmp1, tmp2, vec0, vec1, vec2);
5203
5204 __ vzeroupper();
5205 __ leave();
5206 __ ret(0);
5207
5208 return start;
5209 }
5210
5211 /**
5212 * Arguments:
5213 *
5214 // Input:
5215 // c_rarg0 - x address
5216 // c_rarg1 - x length
5217 // c_rarg2 - z address
5218 // c_rarg3 - z lenth
5219 *
5220 */
5221 address generate_squareToLen() {
5222
5223 __ align(CodeEntryAlignment);
5224 StubCodeMark mark(this, "StubRoutines", "squareToLen");
5225
5226 address start = __ pc();
5227 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
5228 // Unix: rdi, rsi, rdx, rcx (c_rarg0, c_rarg1, ...)
5229 const Register x = rdi;
5230 const Register len = rsi;
5231 const Register z = r8;
5232 const Register zlen = rcx;
5233
5234 const Register tmp1 = r12;
5235 const Register tmp2 = r13;
5236 const Register tmp3 = r14;
5237 const Register tmp4 = r15;
5238 const Register tmp5 = rbx;
5239
5240 BLOCK_COMMENT("Entry:");
5241 __ enter(); // required for proper stackwalking of RuntimeStub frame
5242
5243 setup_arg_regs(4); // x => rdi, len => rsi, z => rdx
5244 // zlen => rcx
5245 // r9 and r10 may be used to save non-volatile registers
5246 __ movptr(r8, rdx);
5247 __ square_to_len(x, len, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
5248
5249 restore_arg_regs();
5250
5251 __ leave(); // required for proper stackwalking of RuntimeStub frame
5252 __ ret(0);
5253
5254 return start;
5255 }
5256
5257 /**
5258 * Arguments:
5259 *
5260 * Input:
5261 * c_rarg0 - out address
5262 * c_rarg1 - in address
5263 * c_rarg2 - offset
5264 * c_rarg3 - len
5265 * not Win64
5266 * c_rarg4 - k
5267 * Win64
5268 * rsp+40 - k
5269 */
5270 address generate_mulAdd() {
5271 __ align(CodeEntryAlignment);
5272 StubCodeMark mark(this, "StubRoutines", "mulAdd");
5273
5274 address start = __ pc();
5275 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
5276 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
5277 const Register out = rdi;
5278 const Register in = rsi;
5279 const Register offset = r11;
5280 const Register len = rcx;
5281 const Register k = r8;
5282
5283 // Next registers will be saved on stack in mul_add().
5284 const Register tmp1 = r12;
5285 const Register tmp2 = r13;
5286 const Register tmp3 = r14;
5287 const Register tmp4 = r15;
5288 const Register tmp5 = rbx;
5289
5290 BLOCK_COMMENT("Entry:");
5291 __ enter(); // required for proper stackwalking of RuntimeStub frame
5292
5293 setup_arg_regs(4); // out => rdi, in => rsi, offset => rdx
5294 // len => rcx, k => r8
5295 // r9 and r10 may be used to save non-volatile registers
5296 #ifdef _WIN64
5297 // last argument is on stack on Win64
5298 __ movl(k, Address(rsp, 6 * wordSize));
5299 #endif
5300 __ movptr(r11, rdx); // move offset in rdx to offset(r11)
5301 __ mul_add(out, in, offset, len, k, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
5302
5303 restore_arg_regs();
5304
5305 __ leave(); // required for proper stackwalking of RuntimeStub frame
5306 __ ret(0);
5307
5308 return start;
5309 }
5310
5311 address generate_libmExp() {
5312 StubCodeMark mark(this, "StubRoutines", "libmExp");
5313
5314 address start = __ pc();
5315
5316 const XMMRegister x0 = xmm0;
5317 const XMMRegister x1 = xmm1;
5318 const XMMRegister x2 = xmm2;
5319 const XMMRegister x3 = xmm3;
5320
5321 const XMMRegister x4 = xmm4;
5322 const XMMRegister x5 = xmm5;
5323 const XMMRegister x6 = xmm6;
5324 const XMMRegister x7 = xmm7;
5325
5326 const Register tmp = r11;
5327
5328 BLOCK_COMMENT("Entry:");
5329 __ enter(); // required for proper stackwalking of RuntimeStub frame
5330
5331 __ fast_exp(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
5332
5333 __ leave(); // required for proper stackwalking of RuntimeStub frame
5334 __ ret(0);
5335
5336 return start;
5337
5338 }
5339
5340 address generate_libmLog() {
5341 StubCodeMark mark(this, "StubRoutines", "libmLog");
5342
5343 address start = __ pc();
5344
5345 const XMMRegister x0 = xmm0;
5346 const XMMRegister x1 = xmm1;
5347 const XMMRegister x2 = xmm2;
5348 const XMMRegister x3 = xmm3;
5349
5350 const XMMRegister x4 = xmm4;
5351 const XMMRegister x5 = xmm5;
5352 const XMMRegister x6 = xmm6;
5353 const XMMRegister x7 = xmm7;
5354
5355 const Register tmp1 = r11;
5356 const Register tmp2 = r8;
5357
5358 BLOCK_COMMENT("Entry:");
5359 __ enter(); // required for proper stackwalking of RuntimeStub frame
5360
5361 __ fast_log(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2);
5362
5363 __ leave(); // required for proper stackwalking of RuntimeStub frame
5364 __ ret(0);
5365
5366 return start;
5367
5368 }
5369
5370 address generate_libmLog10() {
5371 StubCodeMark mark(this, "StubRoutines", "libmLog10");
5372
5373 address start = __ pc();
5374
5375 const XMMRegister x0 = xmm0;
5376 const XMMRegister x1 = xmm1;
5377 const XMMRegister x2 = xmm2;
5378 const XMMRegister x3 = xmm3;
5379
5380 const XMMRegister x4 = xmm4;
5381 const XMMRegister x5 = xmm5;
5382 const XMMRegister x6 = xmm6;
5383 const XMMRegister x7 = xmm7;
5384
5385 const Register tmp = r11;
5386
5387 BLOCK_COMMENT("Entry:");
5388 __ enter(); // required for proper stackwalking of RuntimeStub frame
5389
5390 __ fast_log10(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
5391
5392 __ leave(); // required for proper stackwalking of RuntimeStub frame
5393 __ ret(0);
5394
5395 return start;
5396
5397 }
5398
5399 address generate_libmPow() {
5400 StubCodeMark mark(this, "StubRoutines", "libmPow");
5401
5402 address start = __ pc();
5403
5404 const XMMRegister x0 = xmm0;
5405 const XMMRegister x1 = xmm1;
5406 const XMMRegister x2 = xmm2;
5407 const XMMRegister x3 = xmm3;
5408
5409 const XMMRegister x4 = xmm4;
5410 const XMMRegister x5 = xmm5;
5411 const XMMRegister x6 = xmm6;
5412 const XMMRegister x7 = xmm7;
5413
5414 const Register tmp1 = r8;
5415 const Register tmp2 = r9;
5416 const Register tmp3 = r10;
5417 const Register tmp4 = r11;
5418
5419 BLOCK_COMMENT("Entry:");
5420 __ enter(); // required for proper stackwalking of RuntimeStub frame
5421
5422 __ fast_pow(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
5423
5424 __ leave(); // required for proper stackwalking of RuntimeStub frame
5425 __ ret(0);
5426
5427 return start;
5428
5429 }
5430
5431 address generate_libmSin() {
5432 StubCodeMark mark(this, "StubRoutines", "libmSin");
5433
5434 address start = __ pc();
5435
5436 const XMMRegister x0 = xmm0;
5437 const XMMRegister x1 = xmm1;
5438 const XMMRegister x2 = xmm2;
5439 const XMMRegister x3 = xmm3;
5440
5441 const XMMRegister x4 = xmm4;
5442 const XMMRegister x5 = xmm5;
5443 const XMMRegister x6 = xmm6;
5444 const XMMRegister x7 = xmm7;
5445
5446 const Register tmp1 = r8;
5447 const Register tmp2 = r9;
5448 const Register tmp3 = r10;
5449 const Register tmp4 = r11;
5450
5451 BLOCK_COMMENT("Entry:");
5452 __ enter(); // required for proper stackwalking of RuntimeStub frame
5453
5454 #ifdef _WIN64
5455 __ push(rsi);
5456 __ push(rdi);
5457 #endif
5458 __ fast_sin(x0, x1, x2, x3, x4, x5, x6, x7, rax, rbx, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
5459
5460 #ifdef _WIN64
5461 __ pop(rdi);
5462 __ pop(rsi);
5463 #endif
5464
5465 __ leave(); // required for proper stackwalking of RuntimeStub frame
5466 __ ret(0);
5467
5468 return start;
5469
5470 }
5471
5472 address generate_libmCos() {
5473 StubCodeMark mark(this, "StubRoutines", "libmCos");
5474
5475 address start = __ pc();
5476
5477 const XMMRegister x0 = xmm0;
5478 const XMMRegister x1 = xmm1;
5479 const XMMRegister x2 = xmm2;
5480 const XMMRegister x3 = xmm3;
5481
5482 const XMMRegister x4 = xmm4;
5483 const XMMRegister x5 = xmm5;
5484 const XMMRegister x6 = xmm6;
5485 const XMMRegister x7 = xmm7;
5486
5487 const Register tmp1 = r8;
5488 const Register tmp2 = r9;
5489 const Register tmp3 = r10;
5490 const Register tmp4 = r11;
5491
5492 BLOCK_COMMENT("Entry:");
5493 __ enter(); // required for proper stackwalking of RuntimeStub frame
5494
5495 #ifdef _WIN64
5496 __ push(rsi);
5497 __ push(rdi);
5498 #endif
5499 __ fast_cos(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
5500
5501 #ifdef _WIN64
5502 __ pop(rdi);
5503 __ pop(rsi);
5504 #endif
5505
5506 __ leave(); // required for proper stackwalking of RuntimeStub frame
5507 __ ret(0);
5508
5509 return start;
5510
5511 }
5512
5513 address generate_libmTan() {
5514 StubCodeMark mark(this, "StubRoutines", "libmTan");
5515
5516 address start = __ pc();
5517
5518 const XMMRegister x0 = xmm0;
5519 const XMMRegister x1 = xmm1;
5520 const XMMRegister x2 = xmm2;
5521 const XMMRegister x3 = xmm3;
5522
5523 const XMMRegister x4 = xmm4;
5524 const XMMRegister x5 = xmm5;
5525 const XMMRegister x6 = xmm6;
5526 const XMMRegister x7 = xmm7;
5527
5528 const Register tmp1 = r8;
5529 const Register tmp2 = r9;
5530 const Register tmp3 = r10;
5531 const Register tmp4 = r11;
5532
5533 BLOCK_COMMENT("Entry:");
5534 __ enter(); // required for proper stackwalking of RuntimeStub frame
5535
5536 #ifdef _WIN64
5537 __ push(rsi);
5538 __ push(rdi);
5539 #endif
5540 __ fast_tan(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
5541
5542 #ifdef _WIN64
5543 __ pop(rdi);
5544 __ pop(rsi);
5545 #endif
5546
5547 __ leave(); // required for proper stackwalking of RuntimeStub frame
5548 __ ret(0);
5549
5550 return start;
5551
5552 }
5553
5554 #undef __
5555 #define __ masm->
5556
5557 // Continuation point for throwing of implicit exceptions that are
5558 // not handled in the current activation. Fabricates an exception
5559 // oop and initiates normal exception dispatching in this
5560 // frame. Since we need to preserve callee-saved values (currently
5561 // only for C2, but done for C1 as well) we need a callee-saved oop
5562 // map and therefore have to make these stubs into RuntimeStubs
5563 // rather than BufferBlobs. If the compiler needs all registers to
5564 // be preserved between the fault point and the exception handler
5565 // then it must assume responsibility for that in
5566 // AbstractCompiler::continuation_for_implicit_null_exception or
5567 // continuation_for_implicit_division_by_zero_exception. All other
5568 // implicit exceptions (e.g., NullPointerException or
5569 // AbstractMethodError on entry) are either at call sites or
5570 // otherwise assume that stack unwinding will be initiated, so
5571 // caller saved registers were assumed volatile in the compiler.
5572 address generate_throw_exception(const char* name,
5573 address runtime_entry,
5574 Register arg1 = noreg,
5575 Register arg2 = noreg) {
5576 // Information about frame layout at time of blocking runtime call.
5577 // Note that we only have to preserve callee-saved registers since
5578 // the compilers are responsible for supplying a continuation point
5579 // if they expect all registers to be preserved.
5580 enum layout {
5581 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
5582 rbp_off2,
5583 return_off,
5584 return_off2,
5585 framesize // inclusive of return address
5586 };
5587
5588 int insts_size = 512;
5589 int locs_size = 64;
5590
5591 CodeBuffer code(name, insts_size, locs_size);
5592 OopMapSet* oop_maps = new OopMapSet();
5593 MacroAssembler* masm = new MacroAssembler(&code);
5594
5595 address start = __ pc();
5596
5597 // This is an inlined and slightly modified version of call_VM
5598 // which has the ability to fetch the return PC out of
5599 // thread-local storage and also sets up last_Java_sp slightly
5600 // differently than the real call_VM
5601
5602 __ enter(); // required for proper stackwalking of RuntimeStub frame
5603
5604 assert(is_even(framesize/2), "sp not 16-byte aligned");
5605
5606 // return address and rbp are already in place
5607 __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
5608
5609 int frame_complete = __ pc() - start;
5610
5611 // Set up last_Java_sp and last_Java_fp
5612 address the_pc = __ pc();
5613 __ set_last_Java_frame(rsp, rbp, the_pc);
5614 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
5615
5616 // Call runtime
5617 if (arg1 != noreg) {
5618 assert(arg2 != c_rarg1, "clobbered");
5619 __ movptr(c_rarg1, arg1);
5620 }
5621 if (arg2 != noreg) {
5622 __ movptr(c_rarg2, arg2);
5623 }
5624 __ movptr(c_rarg0, r15_thread);
5625 BLOCK_COMMENT("call runtime_entry");
5626 __ call(RuntimeAddress(runtime_entry));
5627
5628 // Generate oop map
5629 OopMap* map = new OopMap(framesize, 0);
5630
5631 oop_maps->add_gc_map(the_pc - start, map);
5632
5633 __ reset_last_Java_frame(true);
5634
5635 __ leave(); // required for proper stackwalking of RuntimeStub frame
5636
5637 // check for pending exceptions
5638 #ifdef ASSERT
5639 Label L;
5640 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
5641 (int32_t) NULL_WORD);
5642 __ jcc(Assembler::notEqual, L);
5643 __ should_not_reach_here();
5644 __ bind(L);
5645 #endif // ASSERT
5646 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
5647
5648
5649 // codeBlob framesize is in words (not VMRegImpl::slot_size)
5650 RuntimeStub* stub =
5651 RuntimeStub::new_runtime_stub(name,
5652 &code,
5653 frame_complete,
5654 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
5655 oop_maps, false);
5656 return stub->entry_point();
5657 }
5658
5659 void create_control_words() {
5660 // Round to nearest, 53-bit mode, exceptions masked
5661 StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
5662 // Round to zero, 53-bit mode, exception mased
5663 StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
5664 // Round to nearest, 24-bit mode, exceptions masked
5665 StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
5666 // Round to nearest, 64-bit mode, exceptions masked
5667 StubRoutines::_fpu_cntrl_wrd_64 = 0x037F;
5668 // Round to nearest, 64-bit mode, exceptions masked
5669 StubRoutines::_mxcsr_std = 0x1F80;
5670 // Note: the following two constants are 80-bit values
5671 // layout is critical for correct loading by FPU.
5672 // Bias for strict fp multiply/divide
5673 StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
5674 StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
5675 StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
5676 // Un-Bias for strict fp multiply/divide
5677 StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
5678 StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
5679 StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
5680 }
5681
5682 // Initialization
5683 void generate_initial() {
5684 // Generates all stubs and initializes the entry points
5685
5686 // This platform-specific settings are needed by generate_call_stub()
5687 create_control_words();
5688
5689 // entry points that exist in all platforms Note: This is code
5690 // that could be shared among different platforms - however the
5691 // benefit seems to be smaller than the disadvantage of having a
5692 // much more complicated generator structure. See also comment in
5693 // stubRoutines.hpp.
5694
5695 StubRoutines::_forward_exception_entry = generate_forward_exception();
5696
5697 StubRoutines::_call_stub_entry =
5698 generate_call_stub(StubRoutines::_call_stub_return_address);
5699
5700 // is referenced by megamorphic call
5701 StubRoutines::_catch_exception_entry = generate_catch_exception();
5702
5703 // atomic calls
5704 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
5705 StubRoutines::_atomic_xchg_long_entry = generate_atomic_xchg_long();
5706 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
5707 StubRoutines::_atomic_cmpxchg_byte_entry = generate_atomic_cmpxchg_byte();
5708 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
5709 StubRoutines::_atomic_add_entry = generate_atomic_add();
5710 StubRoutines::_atomic_add_long_entry = generate_atomic_add_long();
5711 StubRoutines::_fence_entry = generate_orderaccess_fence();
5712
5713 // platform dependent
5714 StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
5715 StubRoutines::x86::_get_previous_sp_entry = generate_get_previous_sp();
5716
5717 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
5718
5719 // Build this early so it's available for the interpreter.
5720 StubRoutines::_throw_StackOverflowError_entry =
5721 generate_throw_exception("StackOverflowError throw_exception",
5722 CAST_FROM_FN_PTR(address,
5723 SharedRuntime::
5724 throw_StackOverflowError));
5725 StubRoutines::_throw_delayed_StackOverflowError_entry =
5726 generate_throw_exception("delayed StackOverflowError throw_exception",
5727 CAST_FROM_FN_PTR(address,
5728 SharedRuntime::
5729 throw_delayed_StackOverflowError));
5730 if (UseCRC32Intrinsics) {
5731 // set table address before stub generation which use it
5732 StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
5733 StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
5734 }
5735
5736 if (UseCRC32CIntrinsics) {
5737 bool supports_clmul = VM_Version::supports_clmul();
5738 StubRoutines::x86::generate_CRC32C_table(supports_clmul);
5739 StubRoutines::_crc32c_table_addr = (address)StubRoutines::x86::_crc32c_table;
5740 StubRoutines::_updateBytesCRC32C = generate_updateBytesCRC32C(supports_clmul);
5741 }
5742 if (VM_Version::supports_sse2() && UseLibmIntrinsic && InlineIntrinsics) {
5743 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin) ||
5744 vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos) ||
5745 vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
5746 StubRoutines::x86::_ONEHALF_adr = (address)StubRoutines::x86::_ONEHALF;
5747 StubRoutines::x86::_P_2_adr = (address)StubRoutines::x86::_P_2;
5748 StubRoutines::x86::_SC_4_adr = (address)StubRoutines::x86::_SC_4;
5749 StubRoutines::x86::_Ctable_adr = (address)StubRoutines::x86::_Ctable;
5750 StubRoutines::x86::_SC_2_adr = (address)StubRoutines::x86::_SC_2;
5751 StubRoutines::x86::_SC_3_adr = (address)StubRoutines::x86::_SC_3;
5752 StubRoutines::x86::_SC_1_adr = (address)StubRoutines::x86::_SC_1;
5753 StubRoutines::x86::_PI_INV_TABLE_adr = (address)StubRoutines::x86::_PI_INV_TABLE;
5754 StubRoutines::x86::_PI_4_adr = (address)StubRoutines::x86::_PI_4;
5755 StubRoutines::x86::_PI32INV_adr = (address)StubRoutines::x86::_PI32INV;
5756 StubRoutines::x86::_SIGN_MASK_adr = (address)StubRoutines::x86::_SIGN_MASK;
5757 StubRoutines::x86::_P_1_adr = (address)StubRoutines::x86::_P_1;
5758 StubRoutines::x86::_P_3_adr = (address)StubRoutines::x86::_P_3;
5759 StubRoutines::x86::_NEG_ZERO_adr = (address)StubRoutines::x86::_NEG_ZERO;
5760 }
5761 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dexp)) {
5762 StubRoutines::_dexp = generate_libmExp();
5763 }
5764 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog)) {
5765 StubRoutines::_dlog = generate_libmLog();
5766 }
5767 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog10)) {
5768 StubRoutines::_dlog10 = generate_libmLog10();
5769 }
5770 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dpow)) {
5771 StubRoutines::_dpow = generate_libmPow();
5772 }
5773 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin)) {
5774 StubRoutines::_dsin = generate_libmSin();
5775 }
5776 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos)) {
5777 StubRoutines::_dcos = generate_libmCos();
5778 }
5779 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
5780 StubRoutines::_dtan = generate_libmTan();
5781 }
5782 }
5783 }
5784
5785 void generate_all() {
5786 // Generates all stubs and initializes the entry points
5787
5788 // These entry points require SharedInfo::stack0 to be set up in
5789 // non-core builds and need to be relocatable, so they each
5790 // fabricate a RuntimeStub internally.
5791 StubRoutines::_throw_AbstractMethodError_entry =
5792 generate_throw_exception("AbstractMethodError throw_exception",
5793 CAST_FROM_FN_PTR(address,
5794 SharedRuntime::
5795 throw_AbstractMethodError));
5796
5797 StubRoutines::_throw_IncompatibleClassChangeError_entry =
5798 generate_throw_exception("IncompatibleClassChangeError throw_exception",
5799 CAST_FROM_FN_PTR(address,
5800 SharedRuntime::
5801 throw_IncompatibleClassChangeError));
5802
5803 StubRoutines::_throw_NullPointerException_at_call_entry =
5804 generate_throw_exception("NullPointerException at call throw_exception",
5805 CAST_FROM_FN_PTR(address,
5806 SharedRuntime::
5807 throw_NullPointerException_at_call));
5808
5809 // entry points that are platform specific
5810 StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
5811 StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
5812 StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
5813 StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
5814
5815 StubRoutines::x86::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
5816 StubRoutines::x86::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
5817 StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
5818 StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
5819
5820 // support for verify_oop (must happen after universe_init)
5821 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
5822
5823 // data cache line writeback
5824 StubRoutines::_data_cache_writeback = generate_data_cache_writeback();
5825 StubRoutines::_data_cache_writeback_sync = generate_data_cache_writeback_sync();
5826
5827 // arraycopy stubs used by compilers
5828 generate_arraycopy_stubs();
5829
5830 // don't bother generating these AES intrinsic stubs unless global flag is set
5831 if (UseAESIntrinsics) {
5832 StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask(); // needed by the others
5833 StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
5834 StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
5835 StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
5836 if (VM_Version::supports_vaes() && VM_Version::supports_avx512vl() && VM_Version::supports_avx512dq() ) {
5837 StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptVectorAESCrypt();
5838 } else {
5839 StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
5840 }
5841 }
5842 if (UseAESCTRIntrinsics){
5843 StubRoutines::x86::_counter_shuffle_mask_addr = generate_counter_shuffle_mask();
5844 StubRoutines::_counterMode_AESCrypt = generate_counterMode_AESCrypt_Parallel();
5845 }
5846
5847 if (UseSHA1Intrinsics) {
5848 StubRoutines::x86::_upper_word_mask_addr = generate_upper_word_mask();
5849 StubRoutines::x86::_shuffle_byte_flip_mask_addr = generate_shuffle_byte_flip_mask();
5850 StubRoutines::_sha1_implCompress = generate_sha1_implCompress(false, "sha1_implCompress");
5851 StubRoutines::_sha1_implCompressMB = generate_sha1_implCompress(true, "sha1_implCompressMB");
5852 }
5853 if (UseSHA256Intrinsics) {
5854 StubRoutines::x86::_k256_adr = (address)StubRoutines::x86::_k256;
5855 char* dst = (char*)StubRoutines::x86::_k256_W;
5856 char* src = (char*)StubRoutines::x86::_k256;
5857 for (int ii = 0; ii < 16; ++ii) {
5858 memcpy(dst + 32 * ii, src + 16 * ii, 16);
5859 memcpy(dst + 32 * ii + 16, src + 16 * ii, 16);
5860 }
5861 StubRoutines::x86::_k256_W_adr = (address)StubRoutines::x86::_k256_W;
5862 StubRoutines::x86::_pshuffle_byte_flip_mask_addr = generate_pshuffle_byte_flip_mask();
5863 StubRoutines::_sha256_implCompress = generate_sha256_implCompress(false, "sha256_implCompress");
5864 StubRoutines::_sha256_implCompressMB = generate_sha256_implCompress(true, "sha256_implCompressMB");
5865 }
5866 if (UseSHA512Intrinsics) {
5867 StubRoutines::x86::_k512_W_addr = (address)StubRoutines::x86::_k512_W;
5868 StubRoutines::x86::_pshuffle_byte_flip_mask_addr_sha512 = generate_pshuffle_byte_flip_mask_sha512();
5869 StubRoutines::_sha512_implCompress = generate_sha512_implCompress(false, "sha512_implCompress");
5870 StubRoutines::_sha512_implCompressMB = generate_sha512_implCompress(true, "sha512_implCompressMB");
5871 }
5872
5873 // Generate GHASH intrinsics code
5874 if (UseGHASHIntrinsics) {
5875 StubRoutines::x86::_ghash_long_swap_mask_addr = generate_ghash_long_swap_mask();
5876 StubRoutines::x86::_ghash_byte_swap_mask_addr = generate_ghash_byte_swap_mask();
5877 StubRoutines::_ghash_processBlocks = generate_ghash_processBlocks();
5878 }
5879
5880 if (UseBASE64Intrinsics) {
5881 StubRoutines::x86::_and_mask = base64_and_mask_addr();
5882 StubRoutines::x86::_bswap_mask = base64_bswap_mask_addr();
5883 StubRoutines::x86::_base64_charset = base64_charset_addr();
5884 StubRoutines::x86::_url_charset = base64url_charset_addr();
5885 StubRoutines::x86::_gather_mask = base64_gather_mask_addr();
5886 StubRoutines::x86::_left_shift_mask = base64_left_shift_mask_addr();
5887 StubRoutines::x86::_right_shift_mask = base64_right_shift_mask_addr();
5888 StubRoutines::_base64_encodeBlock = generate_base64_encodeBlock();
5889 }
5890
5891 // Safefetch stubs.
5892 generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry,
5893 &StubRoutines::_safefetch32_fault_pc,
5894 &StubRoutines::_safefetch32_continuation_pc);
5895 generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry,
5896 &StubRoutines::_safefetchN_fault_pc,
5897 &StubRoutines::_safefetchN_continuation_pc);
5898 #ifdef COMPILER2
5899 if (UseMultiplyToLenIntrinsic) {
5900 StubRoutines::_multiplyToLen = generate_multiplyToLen();
5901 }
5902 if (UseSquareToLenIntrinsic) {
5903 StubRoutines::_squareToLen = generate_squareToLen();
5904 }
5905 if (UseMulAddIntrinsic) {
5906 StubRoutines::_mulAdd = generate_mulAdd();
5907 }
5908 #ifndef _WINDOWS
5909 if (UseMontgomeryMultiplyIntrinsic) {
5910 StubRoutines::_montgomeryMultiply
5911 = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_multiply);
5912 }
5913 if (UseMontgomerySquareIntrinsic) {
5914 StubRoutines::_montgomerySquare
5915 = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_square);
5916 }
5917 #endif // WINDOWS
5918 #endif // COMPILER2
5919
5920 if (UseVectorizedMismatchIntrinsic) {
5921 StubRoutines::_vectorizedMismatch = generate_vectorizedMismatch();
5922 }
5923 }
5924
5925 public:
5926 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
5927 if (all) {
5928 generate_all();
5929 } else {
5930 generate_initial();
5931 }
5932 }
5933 }; // end class declaration
5934
5935 void StubGenerator_generate(CodeBuffer* code, bool all) {
5936 StubGenerator g(code, all);
5937 }
--- EOF ---