1 /* 2 * Copyright (c) 2013, Red Hat Inc. 3 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. 4 * All rights reserved. 5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 6 * 7 * This code is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 only, as 9 * published by the Free Software Foundation. 10 * 11 * This code is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * version 2 for more details (a copy is included in the LICENSE file that 15 * accompanied this code). 16 * 17 * You should have received a copy of the GNU General Public License version 18 * 2 along with this work; if not, write to the Free Software Foundation, 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 20 * 21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 22 * or visit www.oracle.com if you need additional information or have any 23 * questions. 24 * 25 */ 26 27 #include "precompiled.hpp" 28 #include "c1/c1_FrameMap.hpp" 29 #include "c1/c1_LIR.hpp" 30 #include "runtime/sharedRuntime.hpp" 31 #include "vmreg_aarch64.inline.hpp" 32 33 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) { 34 LIR_Opr opr = LIR_OprFact::illegalOpr; 35 VMReg r_1 = reg->first(); 36 VMReg r_2 = reg->second(); 37 if (r_1->is_stack()) { 38 // Convert stack slot to an SP offset 39 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value 40 // so we must add it in here. 41 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 42 opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type)); 43 } else if (r_1->is_Register()) { 44 Register reg = r_1->as_Register(); 45 if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) { 46 Register reg2 = r_2->as_Register(); 47 #ifdef _LP64 48 assert(reg2 == reg, "must be same register"); 49 opr = as_long_opr(reg); 50 #else 51 opr = as_long_opr(reg2, reg); 52 #endif // _LP64 53 } else if (type == T_OBJECT || type == T_ARRAY) { 54 opr = as_oop_opr(reg); 55 } else if (type == T_METADATA) { 56 opr = as_metadata_opr(reg); 57 } else { 58 opr = as_opr(reg); 59 } 60 } else if (r_1->is_FloatRegister()) { 61 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); 62 int num = r_1->as_FloatRegister()->encoding(); 63 if (type == T_FLOAT) { 64 opr = LIR_OprFact::single_fpu(num); 65 } else { 66 opr = LIR_OprFact::double_fpu(num); 67 } 68 } else { 69 ShouldNotReachHere(); 70 } 71 return opr; 72 } 73 74 LIR_Opr FrameMap::r0_opr; 75 LIR_Opr FrameMap::r1_opr; 76 LIR_Opr FrameMap::r2_opr; 77 LIR_Opr FrameMap::r3_opr; 78 LIR_Opr FrameMap::r4_opr; 79 LIR_Opr FrameMap::r5_opr; 80 LIR_Opr FrameMap::r6_opr; 81 LIR_Opr FrameMap::r7_opr; 82 LIR_Opr FrameMap::r8_opr; 83 LIR_Opr FrameMap::r9_opr; 84 LIR_Opr FrameMap::r10_opr; 85 LIR_Opr FrameMap::r11_opr; 86 LIR_Opr FrameMap::r12_opr; 87 LIR_Opr FrameMap::r13_opr; 88 LIR_Opr FrameMap::r14_opr; 89 LIR_Opr FrameMap::r15_opr; 90 LIR_Opr FrameMap::r16_opr; 91 LIR_Opr FrameMap::r17_opr; 92 LIR_Opr FrameMap::r18_opr; 93 LIR_Opr FrameMap::r19_opr; 94 LIR_Opr FrameMap::r20_opr; 95 LIR_Opr FrameMap::r21_opr; 96 LIR_Opr FrameMap::r22_opr; 97 LIR_Opr FrameMap::r23_opr; 98 LIR_Opr FrameMap::r24_opr; 99 LIR_Opr FrameMap::r25_opr; 100 LIR_Opr FrameMap::r26_opr; 101 LIR_Opr FrameMap::r27_opr; 102 LIR_Opr FrameMap::r28_opr; 103 LIR_Opr FrameMap::r29_opr; 104 LIR_Opr FrameMap::r30_opr; 105 106 LIR_Opr FrameMap::rfp_opr; 107 LIR_Opr FrameMap::sp_opr; 108 109 LIR_Opr FrameMap::receiver_opr; 110 111 LIR_Opr FrameMap::r0_oop_opr; 112 LIR_Opr FrameMap::r1_oop_opr; 113 LIR_Opr FrameMap::r2_oop_opr; 114 LIR_Opr FrameMap::r3_oop_opr; 115 LIR_Opr FrameMap::r4_oop_opr; 116 LIR_Opr FrameMap::r5_oop_opr; 117 LIR_Opr FrameMap::r6_oop_opr; 118 LIR_Opr FrameMap::r7_oop_opr; 119 LIR_Opr FrameMap::r8_oop_opr; 120 LIR_Opr FrameMap::r9_oop_opr; 121 LIR_Opr FrameMap::r10_oop_opr; 122 LIR_Opr FrameMap::r11_oop_opr; 123 LIR_Opr FrameMap::r12_oop_opr; 124 LIR_Opr FrameMap::r13_oop_opr; 125 LIR_Opr FrameMap::r14_oop_opr; 126 LIR_Opr FrameMap::r15_oop_opr; 127 LIR_Opr FrameMap::r16_oop_opr; 128 LIR_Opr FrameMap::r17_oop_opr; 129 LIR_Opr FrameMap::r18_oop_opr; 130 LIR_Opr FrameMap::r19_oop_opr; 131 LIR_Opr FrameMap::r20_oop_opr; 132 LIR_Opr FrameMap::r21_oop_opr; 133 LIR_Opr FrameMap::r22_oop_opr; 134 LIR_Opr FrameMap::r23_oop_opr; 135 LIR_Opr FrameMap::r24_oop_opr; 136 LIR_Opr FrameMap::r25_oop_opr; 137 LIR_Opr FrameMap::r26_oop_opr; 138 LIR_Opr FrameMap::r27_oop_opr; 139 LIR_Opr FrameMap::r28_oop_opr; 140 LIR_Opr FrameMap::r29_oop_opr; 141 LIR_Opr FrameMap::r30_oop_opr; 142 143 LIR_Opr FrameMap::rscratch1_opr; 144 LIR_Opr FrameMap::rscratch2_opr; 145 LIR_Opr FrameMap::rscratch1_long_opr; 146 LIR_Opr FrameMap::rscratch2_long_opr; 147 148 LIR_Opr FrameMap::r0_metadata_opr; 149 LIR_Opr FrameMap::r1_metadata_opr; 150 LIR_Opr FrameMap::r2_metadata_opr; 151 LIR_Opr FrameMap::r3_metadata_opr; 152 LIR_Opr FrameMap::r4_metadata_opr; 153 LIR_Opr FrameMap::r5_metadata_opr; 154 155 LIR_Opr FrameMap::long0_opr; 156 LIR_Opr FrameMap::long1_opr; 157 LIR_Opr FrameMap::fpu0_float_opr; 158 LIR_Opr FrameMap::fpu0_double_opr; 159 160 LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; 161 LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, }; 162 163 //-------------------------------------------------------- 164 // FrameMap 165 //-------------------------------------------------------- 166 167 void FrameMap::initialize() { 168 assert(!_init_done, "once"); 169 170 int i=0; 171 map_register(i, r0); r0_opr = LIR_OprFact::single_cpu(i); i++; 172 map_register(i, r1); r1_opr = LIR_OprFact::single_cpu(i); i++; 173 map_register(i, r2); r2_opr = LIR_OprFact::single_cpu(i); i++; 174 map_register(i, r3); r3_opr = LIR_OprFact::single_cpu(i); i++; 175 map_register(i, r4); r4_opr = LIR_OprFact::single_cpu(i); i++; 176 map_register(i, r5); r5_opr = LIR_OprFact::single_cpu(i); i++; 177 map_register(i, r6); r6_opr = LIR_OprFact::single_cpu(i); i++; 178 map_register(i, r7); r7_opr = LIR_OprFact::single_cpu(i); i++; 179 map_register(i, r10); r10_opr = LIR_OprFact::single_cpu(i); i++; 180 map_register(i, r11); r11_opr = LIR_OprFact::single_cpu(i); i++; 181 map_register(i, r12); r12_opr = LIR_OprFact::single_cpu(i); i++; 182 map_register(i, r13); r13_opr = LIR_OprFact::single_cpu(i); i++; 183 map_register(i, r14); r14_opr = LIR_OprFact::single_cpu(i); i++; 184 map_register(i, r15); r15_opr = LIR_OprFact::single_cpu(i); i++; 185 map_register(i, r16); r16_opr = LIR_OprFact::single_cpu(i); i++; 186 map_register(i, r17); r17_opr = LIR_OprFact::single_cpu(i); i++; 187 map_register(i, r18); r18_opr = LIR_OprFact::single_cpu(i); i++; 188 map_register(i, r19); r19_opr = LIR_OprFact::single_cpu(i); i++; 189 map_register(i, r20); r20_opr = LIR_OprFact::single_cpu(i); i++; 190 map_register(i, r21); r21_opr = LIR_OprFact::single_cpu(i); i++; 191 map_register(i, r22); r22_opr = LIR_OprFact::single_cpu(i); i++; 192 map_register(i, r23); r23_opr = LIR_OprFact::single_cpu(i); i++; 193 map_register(i, r24); r24_opr = LIR_OprFact::single_cpu(i); i++; 194 map_register(i, r25); r25_opr = LIR_OprFact::single_cpu(i); i++; 195 map_register(i, r26); r26_opr = LIR_OprFact::single_cpu(i); i++; 196 197 map_register(i, r27); r27_opr = LIR_OprFact::single_cpu(i); i++; // rheapbase 198 map_register(i, r28); r28_opr = LIR_OprFact::single_cpu(i); i++; // rthread 199 map_register(i, r29); r29_opr = LIR_OprFact::single_cpu(i); i++; // rfp 200 map_register(i, r30); r30_opr = LIR_OprFact::single_cpu(i); i++; // lr 201 map_register(i, r31_sp); sp_opr = LIR_OprFact::single_cpu(i); i++; // sp 202 map_register(i, r8); r8_opr = LIR_OprFact::single_cpu(i); i++; // rscratch1 203 map_register(i, r9); r9_opr = LIR_OprFact::single_cpu(i); i++; // rscratch2 204 205 rscratch1_opr = r8_opr; 206 rscratch2_opr = r9_opr; 207 rscratch1_long_opr = LIR_OprFact::double_cpu(r8_opr->cpu_regnr(), r8_opr->cpu_regnr()); 208 rscratch2_long_opr = LIR_OprFact::double_cpu(r9_opr->cpu_regnr(), r9_opr->cpu_regnr()); 209 210 long0_opr = LIR_OprFact::double_cpu(0, 0); 211 long1_opr = LIR_OprFact::double_cpu(1, 1); 212 213 fpu0_float_opr = LIR_OprFact::single_fpu(0); 214 fpu0_double_opr = LIR_OprFact::double_fpu(0); 215 216 _caller_save_cpu_regs[0] = r0_opr; 217 _caller_save_cpu_regs[1] = r1_opr; 218 _caller_save_cpu_regs[2] = r2_opr; 219 _caller_save_cpu_regs[3] = r3_opr; 220 _caller_save_cpu_regs[4] = r4_opr; 221 _caller_save_cpu_regs[5] = r5_opr; 222 _caller_save_cpu_regs[6] = r6_opr; 223 _caller_save_cpu_regs[7] = r7_opr; 224 // rscratch1, rscratch 2 not included 225 _caller_save_cpu_regs[8] = r10_opr; 226 _caller_save_cpu_regs[9] = r11_opr; 227 _caller_save_cpu_regs[10] = r12_opr; 228 _caller_save_cpu_regs[11] = r13_opr; 229 _caller_save_cpu_regs[12] = r14_opr; 230 _caller_save_cpu_regs[13] = r15_opr; 231 _caller_save_cpu_regs[14] = r16_opr; 232 _caller_save_cpu_regs[15] = r17_opr; 233 _caller_save_cpu_regs[16] = r18_opr; 234 235 for (int i = 0; i < 8; i++) { 236 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); 237 } 238 239 _init_done = true; 240 241 r0_oop_opr = as_oop_opr(r0); 242 r1_oop_opr = as_oop_opr(r1); 243 r2_oop_opr = as_oop_opr(r2); 244 r3_oop_opr = as_oop_opr(r3); 245 r4_oop_opr = as_oop_opr(r4); 246 r5_oop_opr = as_oop_opr(r5); 247 r6_oop_opr = as_oop_opr(r6); 248 r7_oop_opr = as_oop_opr(r7); 249 r8_oop_opr = as_oop_opr(r8); 250 r9_oop_opr = as_oop_opr(r9); 251 r10_oop_opr = as_oop_opr(r10); 252 r11_oop_opr = as_oop_opr(r11); 253 r12_oop_opr = as_oop_opr(r12); 254 r13_oop_opr = as_oop_opr(r13); 255 r14_oop_opr = as_oop_opr(r14); 256 r15_oop_opr = as_oop_opr(r15); 257 r16_oop_opr = as_oop_opr(r16); 258 r17_oop_opr = as_oop_opr(r17); 259 r18_oop_opr = as_oop_opr(r18); 260 r19_oop_opr = as_oop_opr(r19); 261 r20_oop_opr = as_oop_opr(r20); 262 r21_oop_opr = as_oop_opr(r21); 263 r22_oop_opr = as_oop_opr(r22); 264 r23_oop_opr = as_oop_opr(r23); 265 r24_oop_opr = as_oop_opr(r24); 266 r25_oop_opr = as_oop_opr(r25); 267 r26_oop_opr = as_oop_opr(r26); 268 r27_oop_opr = as_oop_opr(r27); 269 r28_oop_opr = as_oop_opr(r28); 270 r29_oop_opr = as_oop_opr(r29); 271 r30_oop_opr = as_oop_opr(r30); 272 273 r0_metadata_opr = as_metadata_opr(r0); 274 r1_metadata_opr = as_metadata_opr(r1); 275 r2_metadata_opr = as_metadata_opr(r2); 276 r3_metadata_opr = as_metadata_opr(r3); 277 r4_metadata_opr = as_metadata_opr(r4); 278 r5_metadata_opr = as_metadata_opr(r5); 279 280 sp_opr = as_pointer_opr(r31_sp); 281 rfp_opr = as_pointer_opr(rfp); 282 283 VMRegPair regs; 284 BasicType sig_bt = T_OBJECT; 285 SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true); 286 receiver_opr = as_oop_opr(regs.first()->as_Register()); 287 288 for (int i = 0; i < nof_caller_save_fpu_regs; i++) { 289 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); 290 } 291 } 292 293 294 Address FrameMap::make_new_address(ByteSize sp_offset) const { 295 // for rbp, based address use this: 296 // return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4); 297 return Address(sp, in_bytes(sp_offset)); 298 } 299 300 301 // ----------------mapping----------------------- 302 // all mapping is based on rfp addressing, except for simple leaf methods where we access 303 // the locals sp based (and no frame is built) 304 305 306 // Frame for simple leaf methods (quick entries) 307 // 308 // +----------+ 309 // | ret addr | <- TOS 310 // +----------+ 311 // | args | 312 // | ...... | 313 314 // Frame for standard methods 315 // 316 // | .........| <- TOS 317 // | locals | 318 // +----------+ 319 // | old fp, | <- RFP 320 // +----------+ 321 // | ret addr | 322 // +----------+ 323 // | args | 324 // | .........| 325 326 327 // For OopMaps, map a local variable or spill index to an VMRegImpl name. 328 // This is the offset from sp() in the frame of the slot for the index, 329 // skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.) 330 // 331 // framesize + 332 // stack0 stack0 0 <- VMReg 333 // | | <registers> | 334 // ...........|..............|.............| 335 // 0 1 2 3 x x 4 5 6 ... | <- local indices 336 // ^ ^ sp() ( x x indicate link 337 // | | and return addr) 338 // arguments non-argument locals 339 340 341 VMReg FrameMap::fpu_regname (int n) { 342 // Return the OptoReg name for the fpu stack slot "n" 343 // A spilled fpu stack slot comprises to two single-word OptoReg's. 344 return as_FloatRegister(n)->as_VMReg(); 345 } 346 347 LIR_Opr FrameMap::stack_pointer() { 348 return FrameMap::sp_opr; 349 } 350 351 352 // JSR 292 353 LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() { 354 // assert(rfp == rbp_mh_SP_save, "must be same register"); 355 return rfp_opr; 356 } 357 358 359 bool FrameMap::validate_frame() { 360 return true; 361 }