1 /*
2 * Copyright (c) 2013, Red Hat Inc.
3 * Copyright (c) 1999, 2012, Oracle and/or its affiliates.
4 * All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
28 #define CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
29
30 // On AArch64 the frame looks as follows:
31 //
32 // +-----------------------------+---------+----------------------------------------+----------------+-----------
33 // | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
34 // +-----------------------------+---------+----------------------------------------+----------------+-----------
35
36 public:
37 static const int pd_c_runtime_reserved_arg_size;
38
39 enum {
40 first_available_sp_in_frame = 0,
41 frame_pad_in_bytes = 16,
42 nof_reg_args = 8
43 };
44
45 public:
46 static LIR_Opr receiver_opr;
47
48 static LIR_Opr r0_opr;
49 static LIR_Opr r1_opr;
50 static LIR_Opr r2_opr;
51 static LIR_Opr r3_opr;
52 static LIR_Opr r4_opr;
53 static LIR_Opr r5_opr;
54 static LIR_Opr r6_opr;
55 static LIR_Opr r7_opr;
56 static LIR_Opr r8_opr;
57 static LIR_Opr r9_opr;
58 static LIR_Opr r10_opr;
59 static LIR_Opr r11_opr;
60 static LIR_Opr r12_opr;
61 static LIR_Opr r13_opr;
62 static LIR_Opr r14_opr;
63 static LIR_Opr r15_opr;
64 static LIR_Opr r16_opr;
65 static LIR_Opr r17_opr;
66 static LIR_Opr r18_opr;
67 static LIR_Opr r19_opr;
68 static LIR_Opr r20_opr;
69 static LIR_Opr r21_opr;
70 static LIR_Opr r22_opr;
71 static LIR_Opr r23_opr;
72 static LIR_Opr r24_opr;
73 static LIR_Opr r25_opr;
74 static LIR_Opr r26_opr;
75 static LIR_Opr r27_opr;
76 static LIR_Opr r28_opr;
77 static LIR_Opr r29_opr;
78 static LIR_Opr r30_opr;
79 static LIR_Opr rfp_opr;
80 static LIR_Opr sp_opr;
81
82 static LIR_Opr r0_oop_opr;
83 static LIR_Opr r1_oop_opr;
84 static LIR_Opr r2_oop_opr;
85 static LIR_Opr r3_oop_opr;
86 static LIR_Opr r4_oop_opr;
87 static LIR_Opr r5_oop_opr;
88 static LIR_Opr r6_oop_opr;
89 static LIR_Opr r7_oop_opr;
90 static LIR_Opr r8_oop_opr;
91 static LIR_Opr r9_oop_opr;
92 static LIR_Opr r10_oop_opr;
93 static LIR_Opr r11_oop_opr;
94 static LIR_Opr r12_oop_opr;
95 static LIR_Opr r13_oop_opr;
96 static LIR_Opr r14_oop_opr;
97 static LIR_Opr r15_oop_opr;
98 static LIR_Opr r16_oop_opr;
99 static LIR_Opr r17_oop_opr;
100 static LIR_Opr r18_oop_opr;
101 static LIR_Opr r19_oop_opr;
102 static LIR_Opr r20_oop_opr;
103 static LIR_Opr r21_oop_opr;
104 static LIR_Opr r22_oop_opr;
105 static LIR_Opr r23_oop_opr;
106 static LIR_Opr r24_oop_opr;
107 static LIR_Opr r25_oop_opr;
108 static LIR_Opr r26_oop_opr;
109 static LIR_Opr r27_oop_opr;
110 static LIR_Opr r28_oop_opr;
111 static LIR_Opr r29_oop_opr;
112 static LIR_Opr r30_oop_opr;
113
114 static LIR_Opr rscratch1_opr;
115 static LIR_Opr rscratch2_opr;
116 static LIR_Opr rscratch1_long_opr;
117 static LIR_Opr rscratch2_long_opr;
118
119 static LIR_Opr r0_metadata_opr;
120 static LIR_Opr r1_metadata_opr;
121 static LIR_Opr r2_metadata_opr;
122 static LIR_Opr r3_metadata_opr;
123 static LIR_Opr r4_metadata_opr;
124 static LIR_Opr r5_metadata_opr;
125
126 static LIR_Opr long0_opr;
127 static LIR_Opr long1_opr;
128 static LIR_Opr fpu0_float_opr;
129 static LIR_Opr fpu0_double_opr;
130
131 static LIR_Opr as_long_opr(Register r) {
132 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
133 }
134 static LIR_Opr as_pointer_opr(Register r) {
135 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
136 }
137
138 // VMReg name for spilled physical FPU stack slot n
139 static VMReg fpu_regname (int n);
140
141 static bool is_caller_save_register (LIR_Opr opr) { return true; }
142 static bool is_caller_save_register (Register r) { return true; }
143
144 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
145 static int last_cpu_reg() { return pd_last_cpu_reg; }
146 static int last_byte_reg() { return pd_last_byte_reg; }
147
148 #endif // CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
149