1 /*
2 * Copyright (c) 2013, Red Hat Inc.
3 * Copyright (c) 2000, 2010, Oracle and/or its affiliates.
4 * All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_AARCH64_VM_REGISTER_AARCH64_HPP
28 #define CPU_AARCH64_VM_REGISTER_AARCH64_HPP
29
30 #include "asm/register.hpp"
31 #include "vm_version_aarch64.hpp"
32
33 class VMRegImpl;
34 typedef VMRegImpl* VMReg;
35
36 // Use Register as shortcut
37 class RegisterImpl;
38 typedef RegisterImpl* Register;
39
40 inline Register as_Register(int encoding) {
41 return (Register)(intptr_t) encoding;
42 }
43
44 class RegisterImpl: public AbstractRegisterImpl {
45 public:
46 enum {
47 number_of_registers = 32,
48 number_of_byte_registers = 32
49 };
50
51 // derived registers, offsets, and addresses
52 Register successor() const { return as_Register(encoding() + 1); }
53
54 // construction
55 inline friend Register as_Register(int encoding);
56
57 VMReg as_VMReg();
58
59 // accessors
60 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
61 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
62 bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
63 const char* name() const;
64 int encoding_nocheck() const { return (intptr_t)this; }
65
66 // Return the bit which represents this register. This is intended
67 // to be ORed into a bitmask: for usage see class RegSet below.
68 unsigned long bit(bool should_set = true) const { return should_set ? 1 << encoding() : 0; }
69 };
70
71 // The integer registers of the aarch64 architecture
72
73 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));
74
75
76 CONSTANT_REGISTER_DECLARATION(Register, r0, (0));
77 CONSTANT_REGISTER_DECLARATION(Register, r1, (1));
78 CONSTANT_REGISTER_DECLARATION(Register, r2, (2));
79 CONSTANT_REGISTER_DECLARATION(Register, r3, (3));
80 CONSTANT_REGISTER_DECLARATION(Register, r4, (4));
81 CONSTANT_REGISTER_DECLARATION(Register, r5, (5));
82 CONSTANT_REGISTER_DECLARATION(Register, r6, (6));
83 CONSTANT_REGISTER_DECLARATION(Register, r7, (7));
84 CONSTANT_REGISTER_DECLARATION(Register, r8, (8));
85 CONSTANT_REGISTER_DECLARATION(Register, r9, (9));
86 CONSTANT_REGISTER_DECLARATION(Register, r10, (10));
87 CONSTANT_REGISTER_DECLARATION(Register, r11, (11));
88 CONSTANT_REGISTER_DECLARATION(Register, r12, (12));
89 CONSTANT_REGISTER_DECLARATION(Register, r13, (13));
90 CONSTANT_REGISTER_DECLARATION(Register, r14, (14));
91 CONSTANT_REGISTER_DECLARATION(Register, r15, (15));
92 CONSTANT_REGISTER_DECLARATION(Register, r16, (16));
93 CONSTANT_REGISTER_DECLARATION(Register, r17, (17));
94 CONSTANT_REGISTER_DECLARATION(Register, r18, (18));
95 CONSTANT_REGISTER_DECLARATION(Register, r19, (19));
96 CONSTANT_REGISTER_DECLARATION(Register, r20, (20));
97 CONSTANT_REGISTER_DECLARATION(Register, r21, (21));
98 CONSTANT_REGISTER_DECLARATION(Register, r22, (22));
99 CONSTANT_REGISTER_DECLARATION(Register, r23, (23));
100 CONSTANT_REGISTER_DECLARATION(Register, r24, (24));
101 CONSTANT_REGISTER_DECLARATION(Register, r25, (25));
102 CONSTANT_REGISTER_DECLARATION(Register, r26, (26));
103 CONSTANT_REGISTER_DECLARATION(Register, r27, (27));
104 CONSTANT_REGISTER_DECLARATION(Register, r28, (28));
105 CONSTANT_REGISTER_DECLARATION(Register, r29, (29));
106 CONSTANT_REGISTER_DECLARATION(Register, r30, (30));
107
108 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
109 CONSTANT_REGISTER_DECLARATION(Register, zr, (32));
110 CONSTANT_REGISTER_DECLARATION(Register, sp, (33));
111
112 // Used as a filler in instructions where a register field is unused.
113 const Register dummy_reg = r31_sp;
114
115 // Use FloatRegister as shortcut
116 class FloatRegisterImpl;
117 typedef FloatRegisterImpl* FloatRegister;
118
119 inline FloatRegister as_FloatRegister(int encoding) {
120 return (FloatRegister)(intptr_t) encoding;
121 }
122
123 // The implementation of floating point registers for the architecture
124 class FloatRegisterImpl: public AbstractRegisterImpl {
125 public:
126 enum {
127 number_of_registers = 32
128 };
129
130 // construction
131 inline friend FloatRegister as_FloatRegister(int encoding);
132
133 VMReg as_VMReg();
134
135 // derived registers, offsets, and addresses
136 FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
137
138 // accessors
139 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
140 int encoding_nocheck() const { return (intptr_t)this; }
141 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
142 const char* name() const;
143
144 };
145
146 // The float registers of the AARCH64 architecture
147
148 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg , (-1));
149
150 CONSTANT_REGISTER_DECLARATION(FloatRegister, v0 , ( 0));
151 CONSTANT_REGISTER_DECLARATION(FloatRegister, v1 , ( 1));
152 CONSTANT_REGISTER_DECLARATION(FloatRegister, v2 , ( 2));
153 CONSTANT_REGISTER_DECLARATION(FloatRegister, v3 , ( 3));
154 CONSTANT_REGISTER_DECLARATION(FloatRegister, v4 , ( 4));
155 CONSTANT_REGISTER_DECLARATION(FloatRegister, v5 , ( 5));
156 CONSTANT_REGISTER_DECLARATION(FloatRegister, v6 , ( 6));
157 CONSTANT_REGISTER_DECLARATION(FloatRegister, v7 , ( 7));
158 CONSTANT_REGISTER_DECLARATION(FloatRegister, v8 , ( 8));
159 CONSTANT_REGISTER_DECLARATION(FloatRegister, v9 , ( 9));
160 CONSTANT_REGISTER_DECLARATION(FloatRegister, v10 , (10));
161 CONSTANT_REGISTER_DECLARATION(FloatRegister, v11 , (11));
162 CONSTANT_REGISTER_DECLARATION(FloatRegister, v12 , (12));
163 CONSTANT_REGISTER_DECLARATION(FloatRegister, v13 , (13));
164 CONSTANT_REGISTER_DECLARATION(FloatRegister, v14 , (14));
165 CONSTANT_REGISTER_DECLARATION(FloatRegister, v15 , (15));
166 CONSTANT_REGISTER_DECLARATION(FloatRegister, v16 , (16));
167 CONSTANT_REGISTER_DECLARATION(FloatRegister, v17 , (17));
168 CONSTANT_REGISTER_DECLARATION(FloatRegister, v18 , (18));
169 CONSTANT_REGISTER_DECLARATION(FloatRegister, v19 , (19));
170 CONSTANT_REGISTER_DECLARATION(FloatRegister, v20 , (20));
171 CONSTANT_REGISTER_DECLARATION(FloatRegister, v21 , (21));
172 CONSTANT_REGISTER_DECLARATION(FloatRegister, v22 , (22));
173 CONSTANT_REGISTER_DECLARATION(FloatRegister, v23 , (23));
174 CONSTANT_REGISTER_DECLARATION(FloatRegister, v24 , (24));
175 CONSTANT_REGISTER_DECLARATION(FloatRegister, v25 , (25));
176 CONSTANT_REGISTER_DECLARATION(FloatRegister, v26 , (26));
177 CONSTANT_REGISTER_DECLARATION(FloatRegister, v27 , (27));
178 CONSTANT_REGISTER_DECLARATION(FloatRegister, v28 , (28));
179 CONSTANT_REGISTER_DECLARATION(FloatRegister, v29 , (29));
180 CONSTANT_REGISTER_DECLARATION(FloatRegister, v30 , (30));
181 CONSTANT_REGISTER_DECLARATION(FloatRegister, v31 , (31));
182
183 // Need to know the total number of registers of all sorts for SharedInfo.
184 // Define a class that exports it.
185 class ConcreteRegisterImpl : public AbstractRegisterImpl {
186 public:
187 enum {
188 // A big enough number for C2: all the registers plus flags
189 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
190 // There is no requirement that any ordering here matches any ordering c2 gives
191 // it's optoregs.
192
193 number_of_registers = (2 * RegisterImpl::number_of_registers +
194 4 * FloatRegisterImpl::number_of_registers +
195 1) // flags
196 };
197
198 // added to make it compile
199 static const int max_gpr;
200 static const int max_fpr;
201 };
202
203 // A set of registers
204 class RegSet {
205 uint32_t _bitset;
206
207 RegSet(uint32_t bitset) : _bitset(bitset) { }
208
209 public:
210
211 RegSet() : _bitset(0) { }
212
213 RegSet(Register r1) : _bitset(r1->bit()) { }
214
215 RegSet operator+(const RegSet aSet) const {
216 RegSet result(_bitset | aSet._bitset);
217 return result;
218 }
219
220 RegSet operator-(const RegSet aSet) const {
221 RegSet result(_bitset & ~aSet._bitset);
222 return result;
223 }
224
225 RegSet &operator+=(const RegSet aSet) {
226 *this = *this + aSet;
227 return *this;
228 }
229
230 static RegSet of(Register r1) {
231 return RegSet(r1);
232 }
233
234 static RegSet of(Register r1, Register r2) {
235 return of(r1) + r2;
236 }
237
238 static RegSet of(Register r1, Register r2, Register r3) {
239 return of(r1, r2) + r3;
240 }
241
242 static RegSet of(Register r1, Register r2, Register r3, Register r4) {
243 return of(r1, r2, r3) + r4;
244 }
245
246 static RegSet range(Register start, Register end) {
247 uint32_t bits = ~0;
248 bits <<= start->encoding();
249 bits <<= 31 - end->encoding();
250 bits >>= 31 - end->encoding();
251
252 return RegSet(bits);
253 }
254
255 uint32_t bits() const { return _bitset; }
256 };
257
258 #endif // CPU_AARCH64_VM_REGISTER_AARCH64_HPP