1 /*
   2  * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_CODE_VMREG_HPP
  26 #define SHARE_VM_CODE_VMREG_HPP
  27 
  28 #include "memory/allocation.hpp"
  29 #include "utilities/globalDefinitions.hpp"
  30 #include "asm/register.hpp"
  31 
  32 #ifdef COMPILER2
  33 #include "opto/adlcVMDeps.hpp"
  34 #include "utilities/ostream.hpp"
  35 #if defined ADGLOBALS_MD_HPP
  36 # include ADGLOBALS_MD_HPP
  37 #elif defined TARGET_ARCH_MODEL_x86_32
  38 # include "adfiles/adGlobals_x86_32.hpp"
  39 #elif defined TARGET_ARCH_MODEL_x86_64
  40 # include "adfiles/adGlobals_x86_64.hpp"
  41 #elif defined TARGET_ARCH_MODEL_aarch64
  42 # include "adfiles/adGlobals_aarch64.hpp"
  43 #elif defined TARGET_ARCH_MODEL_sparc
  44 # include "adfiles/adGlobals_sparc.hpp"
  45 #elif defined TARGET_ARCH_MODEL_zero
  46 # include "adfiles/adGlobals_zero.hpp"
  47 #elif defined TARGET_ARCH_MODEL_ppc_64
  48 # include "adfiles/adGlobals_ppc_64.hpp"
  49 #endif
  50 #endif
  51 
  52 //------------------------------VMReg------------------------------------------
  53 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
  54 // Register numbers below VMRegImpl::stack0 are the same for both.  Register
  55 // numbers above stack0 are either warped (in the compiler) or unwarped
  56 // (in the VM).  Unwarped numbers represent stack indices, offsets from
  57 // the current stack pointer.  Warped numbers are required during compilation
  58 // when we do not yet know how big the frame will be.
  59 
  60 class VMRegImpl;
  61 typedef VMRegImpl* VMReg;
  62 
  63 class VMRegImpl {
  64 // friend class OopMap;
  65 friend class VMStructs;
  66 friend class OptoReg;
  67 // friend class Location;
  68 private:
  69   enum {
  70     BAD_REG = -1
  71   };
  72 
  73 
  74 
  75   static VMReg stack0;
  76   // Names for registers
  77   static const char *regName[];
  78   static const int register_count;
  79 
  80 
  81 public:
  82 
  83   static VMReg  as_VMReg(int val, bool bad_ok = false) { assert(val > BAD_REG || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
  84 
  85   const char*  name() {
  86     if (is_reg()) {
  87       return regName[value()];
  88     } else if (!is_valid()) {
  89       return "BAD";
  90     } else {
  91       // shouldn't really be called with stack
  92       return "STACKED REG";
  93     }
  94   }
  95   static VMReg Bad() { return (VMReg) (intptr_t) BAD_REG; }
  96   bool is_valid() const { return ((intptr_t) this) != BAD_REG; }
  97   bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
  98   bool is_reg()   const { return is_valid() && !is_stack(); }
  99 
 100   // A concrete register is a value that returns true for is_reg() and is
 101   // also a register you could use in the assembler. On machines with
 102   // 64bit registers only one half of the VMReg (and OptoReg) is considered
 103   // concrete.
 104   bool is_concrete();
 105 
 106   // VMRegs are 4 bytes wide on all platforms
 107   static const int stack_slot_size;
 108   static const int slots_per_word;
 109 
 110 
 111   // This really ought to check that the register is "real" in the sense that
 112   // we don't try and get the VMReg number of a physical register that doesn't
 113   // have an expressible part. That would be pd specific code
 114   VMReg next() {
 115     assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
 116     return (VMReg)(intptr_t)(value() + 1);
 117   }
 118   VMReg next(int i) {
 119     assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
 120     return (VMReg)(intptr_t)(value() + i);
 121   }
 122   VMReg prev() {
 123     assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
 124     return (VMReg)(intptr_t)(value() - 1);
 125   }
 126 
 127 
 128   intptr_t value() const         {return (intptr_t) this; }
 129 
 130   void print_on(outputStream* st) const;
 131   void print() const { print_on(tty); }
 132 
 133   // bias a stack slot.
 134   // Typically used to adjust a virtual frame slots by amounts that are offset by
 135   // amounts that are part of the native abi. The VMReg must be a stack slot
 136   // and the result must be also.
 137 
 138   VMReg bias(int offset) {
 139     assert(is_stack(), "must be");
 140     // VMReg res = VMRegImpl::as_VMReg(value() + offset);
 141     VMReg res = stack2reg(reg2stack() + offset);
 142     assert(res->is_stack(), "must be");
 143     return res;
 144   }
 145 
 146   // Convert register numbers to stack slots and vice versa
 147   static VMReg stack2reg( int idx ) {
 148     return (VMReg) (intptr_t) (stack0->value() + idx);
 149   }
 150 
 151   uintptr_t reg2stack() {
 152     assert( is_stack(), "Not a stack-based register" );
 153     return value() - stack0->value();
 154   }
 155 
 156   static void set_regName();
 157 
 158 #ifdef TARGET_ARCH_x86
 159 # include "vmreg_x86.hpp"
 160 #endif
 161 #ifdef TARGET_ARCH_aarch64
 162 # include "vmreg_aarch64.hpp"
 163 #endif
 164 #ifdef TARGET_ARCH_sparc
 165 # include "vmreg_sparc.hpp"
 166 #endif
 167 #ifdef TARGET_ARCH_zero
 168 # include "vmreg_zero.hpp"
 169 #endif
 170 #ifdef TARGET_ARCH_arm
 171 # include "vmreg_arm.hpp"
 172 #endif
 173 #ifdef TARGET_ARCH_ppc
 174 # include "vmreg_ppc.hpp"
 175 #endif
 176 
 177 
 178 };
 179 
 180 //---------------------------VMRegPair-------------------------------------------
 181 // Pairs of 32-bit registers for arguments.
 182 // SharedRuntime::java_calling_convention will overwrite the structs with
 183 // the calling convention's registers.  VMRegImpl::Bad is returned for any
 184 // unused 32-bit register.  This happens for the unused high half of Int
 185 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
 186 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
 187 // 32-bits of O0/O1 are set to VMRegImpl::Bad).  Longs in one register & doubles
 188 // always return a high and a low register, as do 64-bit pointers.
 189 //
 190 class VMRegPair {
 191 private:
 192   VMReg _second;
 193   VMReg _first;
 194 public:
 195   void set_bad (                   ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
 196   void set1    (         VMReg v  ) { _second=VMRegImpl::Bad(); _first=v; }
 197   void set2    (         VMReg v  ) { _second=v->next();  _first=v; }
 198   void set_pair( VMReg second, VMReg first    ) { _second= second;    _first= first; }
 199   void set_ptr ( VMReg ptr ) {
 200 #ifdef _LP64
 201     _second = ptr->next();
 202 #else
 203     _second = VMRegImpl::Bad();
 204 #endif
 205     _first = ptr;
 206   }
 207   // Return true if single register, even if the pair is really just adjacent stack slots
 208   bool is_single_reg() const {
 209     return (_first->is_valid()) && (_first->value() + 1 == _second->value());
 210   }
 211 
 212   // Return true if single stack based "register" where the slot alignment matches input alignment
 213   bool is_adjacent_on_stack(int alignment) const {
 214     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 215   }
 216 
 217   // Return true if single stack based "register" where the slot alignment matches input alignment
 218   bool is_adjacent_aligned_on_stack(int alignment) const {
 219     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 220   }
 221 
 222   // Return true if single register but adjacent stack slots do not count
 223   bool is_single_phys_reg() const {
 224     return (_first->is_reg() && (_first->value() + 1 == _second->value()));
 225   }
 226 
 227   VMReg second() const { return _second; }
 228   VMReg first()  const { return _first; }
 229   VMRegPair(VMReg s, VMReg f) {  _second = s; _first = f; }
 230   VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
 231   VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
 232 };
 233 
 234 #endif // SHARE_VM_CODE_VMREG_HPP