56 #include "opto/opcodes.hpp"
57 #include "opto/output.hpp"
58 #include "opto/parse.hpp"
59 #include "opto/phaseX.hpp"
60 #include "opto/rootnode.hpp"
61 #include "opto/runtime.hpp"
62 #include "opto/stringopts.hpp"
63 #include "opto/type.hpp"
64 #include "opto/vectornode.hpp"
65 #include "runtime/arguments.hpp"
66 #include "runtime/signature.hpp"
67 #include "runtime/stubRoutines.hpp"
68 #include "runtime/timer.hpp"
69 #include "utilities/copy.hpp"
70 #if defined AD_MD_HPP
71 # include AD_MD_HPP
72 #elif defined TARGET_ARCH_MODEL_x86_32
73 # include "adfiles/ad_x86_32.hpp"
74 #elif defined TARGET_ARCH_MODEL_x86_64
75 # include "adfiles/ad_x86_64.hpp"
76 #elif defined TARGET_ARCH_MODEL_sparc
77 # include "adfiles/ad_sparc.hpp"
78 #elif defined TARGET_ARCH_MODEL_zero
79 # include "adfiles/ad_zero.hpp"
80 #elif defined TARGET_ARCH_MODEL_ppc_64
81 # include "adfiles/ad_ppc_64.hpp"
82 #endif
83
84 // -------------------- Compile::mach_constant_base_node -----------------------
85 // Constant table base node singleton.
86 MachConstantBaseNode* Compile::mach_constant_base_node() {
87 if (_mach_constant_base_node == NULL) {
88 _mach_constant_base_node = new (C) MachConstantBaseNode();
89 _mach_constant_base_node->add_req(C->root());
90 }
91 return _mach_constant_base_node;
92 }
93
94
95 /// Support for intrinsics.
2655 case Op_MulI: case Op_MulF: case Op_MulD: case Op_MulL:
2656 case Op_AndL: case Op_XorL: case Op_OrL:
2657 case Op_AndI: case Op_XorI: case Op_OrI: {
2658 // Move "last use" input to left by swapping inputs
2659 n->swap_edges(1, 2);
2660 break;
2661 }
2662 default:
2663 break;
2664 }
2665 }
2666
2667 #ifdef ASSERT
2668 if( n->is_Mem() ) {
2669 int alias_idx = get_alias_index(n->as_Mem()->adr_type());
2670 assert( n->in(0) != NULL || alias_idx != Compile::AliasIdxRaw ||
2671 // oop will be recorded in oop map if load crosses safepoint
2672 n->is_Load() && (n->as_Load()->bottom_type()->isa_oopptr() ||
2673 LoadNode::is_immutable_value(n->in(MemNode::Address))),
2674 "raw memory operations should have control edge");
2675 }
2676 #endif
2677 // Count FPU ops and common calls, implements item (3)
2678 switch( nop ) {
2679 // Count all float operations that may use FPU
2680 case Op_AddF:
2681 case Op_SubF:
2682 case Op_MulF:
2683 case Op_DivF:
2684 case Op_NegF:
2685 case Op_ModF:
2686 case Op_ConvI2F:
2687 case Op_ConF:
2688 case Op_CmpF:
2689 case Op_CmpF3:
2690 // case Op_ConvL2F: // longs are split into 32-bit halves
2691 frc.inc_float_count();
2692 break;
2693
2694 case Op_ConvF2D:
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56 #include "opto/opcodes.hpp"
57 #include "opto/output.hpp"
58 #include "opto/parse.hpp"
59 #include "opto/phaseX.hpp"
60 #include "opto/rootnode.hpp"
61 #include "opto/runtime.hpp"
62 #include "opto/stringopts.hpp"
63 #include "opto/type.hpp"
64 #include "opto/vectornode.hpp"
65 #include "runtime/arguments.hpp"
66 #include "runtime/signature.hpp"
67 #include "runtime/stubRoutines.hpp"
68 #include "runtime/timer.hpp"
69 #include "utilities/copy.hpp"
70 #if defined AD_MD_HPP
71 # include AD_MD_HPP
72 #elif defined TARGET_ARCH_MODEL_x86_32
73 # include "adfiles/ad_x86_32.hpp"
74 #elif defined TARGET_ARCH_MODEL_x86_64
75 # include "adfiles/ad_x86_64.hpp"
76 #elif defined TARGET_ARCH_MODEL_aarch64
77 # include "adfiles/ad_aarch64.hpp"
78 #elif defined TARGET_ARCH_MODEL_sparc
79 # include "adfiles/ad_sparc.hpp"
80 #elif defined TARGET_ARCH_MODEL_zero
81 # include "adfiles/ad_zero.hpp"
82 #elif defined TARGET_ARCH_MODEL_ppc_64
83 # include "adfiles/ad_ppc_64.hpp"
84 #endif
85
86 // -------------------- Compile::mach_constant_base_node -----------------------
87 // Constant table base node singleton.
88 MachConstantBaseNode* Compile::mach_constant_base_node() {
89 if (_mach_constant_base_node == NULL) {
90 _mach_constant_base_node = new (C) MachConstantBaseNode();
91 _mach_constant_base_node->add_req(C->root());
92 }
93 return _mach_constant_base_node;
94 }
95
96
97 /// Support for intrinsics.
2657 case Op_MulI: case Op_MulF: case Op_MulD: case Op_MulL:
2658 case Op_AndL: case Op_XorL: case Op_OrL:
2659 case Op_AndI: case Op_XorI: case Op_OrI: {
2660 // Move "last use" input to left by swapping inputs
2661 n->swap_edges(1, 2);
2662 break;
2663 }
2664 default:
2665 break;
2666 }
2667 }
2668
2669 #ifdef ASSERT
2670 if( n->is_Mem() ) {
2671 int alias_idx = get_alias_index(n->as_Mem()->adr_type());
2672 assert( n->in(0) != NULL || alias_idx != Compile::AliasIdxRaw ||
2673 // oop will be recorded in oop map if load crosses safepoint
2674 n->is_Load() && (n->as_Load()->bottom_type()->isa_oopptr() ||
2675 LoadNode::is_immutable_value(n->in(MemNode::Address))),
2676 "raw memory operations should have control edge");
2677 }
2678 if (n->is_MemBar()) {
2679 MemBarNode* mb = n->as_MemBar();
2680 if (mb->trailing_store() || mb->trailing_load_store()) {
2681 assert(mb->leading_membar()->trailing_membar() == mb, "bad membar pair");
2682 Node* mem = mb->in(MemBarNode::Precedent);
2683 assert((mb->trailing_store() && mem->is_Store() && mem->as_Store()->is_release()) ||
2684 (mb->trailing_load_store() && mem->is_LoadStore()), "missing mem op");
2685 } else if (mb->leading()) {
2686 assert(mb->trailing_membar()->leading_membar() == mb, "bad membar pair");
2687 }
2688 }
2689 #endif
2690 // Count FPU ops and common calls, implements item (3)
2691 switch( nop ) {
2692 // Count all float operations that may use FPU
2693 case Op_AddF:
2694 case Op_SubF:
2695 case Op_MulF:
2696 case Op_DivF:
2697 case Op_NegF:
2698 case Op_ModF:
2699 case Op_ConvI2F:
2700 case Op_ConF:
2701 case Op_CmpF:
2702 case Op_CmpF3:
2703 // case Op_ConvL2F: // longs are split into 32-bit halves
2704 frc.inc_float_count();
2705 break;
2706
2707 case Op_ConvF2D:
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