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src/share/vm/runtime/vframeArray.cpp

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 460   result->set_unroll_block(NULL); // initialize it
 461   result->fill_in(thread, frame_size, chunk, reg_map, realloc_failures);
 462   return result;
 463 }
 464 
 465 void vframeArray::fill_in(JavaThread* thread,
 466                           int frame_size,
 467                           GrowableArray<compiledVFrame*>* chunk,
 468                           const RegisterMap *reg_map,
 469                           bool realloc_failures) {
 470   // Set owner first, it is used when adding monitor chunks
 471 
 472   _frame_size = frame_size;
 473   for(int i = 0; i < chunk->length(); i++) {
 474     element(i)->fill_in(chunk->at(i), realloc_failures);
 475   }
 476 
 477   // Copy registers for callee-saved registers
 478   if (reg_map != NULL) {
 479     for(int i = 0; i < RegisterMap::reg_count; i++) {
 480 #ifdef AMD64
 481       // The register map has one entry for every int (32-bit value), so
 482       // 64-bit physical registers have two entries in the map, one for
 483       // each half.  Ignore the high halves of 64-bit registers, just like
 484       // frame::oopmapreg_to_location does.
 485       //
 486       // [phh] FIXME: this is a temporary hack!  This code *should* work
 487       // correctly w/o this hack, possibly by changing RegisterMap::pd_location
 488       // in frame_amd64.cpp and the values of the phantom high half registers
 489       // in amd64.ad.
 490       //      if (VMReg::Name(i) < SharedInfo::stack0 && is_even(i)) {
 491         intptr_t* src = (intptr_t*) reg_map->location(VMRegImpl::as_VMReg(i));
 492         _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 493         //      } else {
 494         //      jint* src = (jint*) reg_map->location(VMReg::Name(i));
 495         //      _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 496         //      }
 497 #else
 498       jint* src = (jint*) reg_map->location(VMRegImpl::as_VMReg(i));
 499       _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 500 #endif




 460   result->set_unroll_block(NULL); // initialize it
 461   result->fill_in(thread, frame_size, chunk, reg_map, realloc_failures);
 462   return result;
 463 }
 464 
 465 void vframeArray::fill_in(JavaThread* thread,
 466                           int frame_size,
 467                           GrowableArray<compiledVFrame*>* chunk,
 468                           const RegisterMap *reg_map,
 469                           bool realloc_failures) {
 470   // Set owner first, it is used when adding monitor chunks
 471 
 472   _frame_size = frame_size;
 473   for(int i = 0; i < chunk->length(); i++) {
 474     element(i)->fill_in(chunk->at(i), realloc_failures);
 475   }
 476 
 477   // Copy registers for callee-saved registers
 478   if (reg_map != NULL) {
 479     for(int i = 0; i < RegisterMap::reg_count; i++) {
 480 #if defined(AMD64) || defined(AARCH64)
 481       // The register map has one entry for every int (32-bit value), so
 482       // 64-bit physical registers have two entries in the map, one for
 483       // each half.  Ignore the high halves of 64-bit registers, just like
 484       // frame::oopmapreg_to_location does.
 485       //
 486       // [phh] FIXME: this is a temporary hack!  This code *should* work
 487       // correctly w/o this hack, possibly by changing RegisterMap::pd_location
 488       // in frame_amd64.cpp and the values of the phantom high half registers
 489       // in amd64.ad.
 490       //      if (VMReg::Name(i) < SharedInfo::stack0 && is_even(i)) {
 491         intptr_t* src = (intptr_t*) reg_map->location(VMRegImpl::as_VMReg(i));
 492         _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 493         //      } else {
 494         //      jint* src = (jint*) reg_map->location(VMReg::Name(i));
 495         //      _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 496         //      }
 497 #else
 498       jint* src = (jint*) reg_map->location(VMRegImpl::as_VMReg(i));
 499       _callee_registers[i] = src != NULL ? *src : NULL_WORD;
 500 #endif


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