1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
676 break;
677
678 case T_ADDRESS:
679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
680 LIR_OprDesc::address_type |
681 LIR_OprDesc::cpu_register |
682 LIR_OprDesc::single_size |
683 LIR_OprDesc::virtual_mask);
684 break;
685
686 case T_LONG:
687 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
688 LIR_OprDesc::long_type |
689 LIR_OprDesc::cpu_register |
690 LIR_OprDesc::double_size |
691 LIR_OprDesc::virtual_mask);
692 break;
693
694 #ifdef __SOFTFP__
695 case T_FLOAT:
696 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
697 LIR_OprDesc::float_type |
698 LIR_OprDesc::cpu_register |
699 LIR_OprDesc::single_size |
700 LIR_OprDesc::virtual_mask);
701 break;
702 case T_DOUBLE:
703 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
704 LIR_OprDesc::double_type |
705 LIR_OprDesc::cpu_register |
706 LIR_OprDesc::double_size |
707 LIR_OprDesc::virtual_mask);
708 break;
709 #else // __SOFTFP__
710 case T_FLOAT:
711 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
712 LIR_OprDesc::float_type |
713 LIR_OprDesc::fpu_register |
714 LIR_OprDesc::single_size |
715 LIR_OprDesc::virtual_mask);
716 break;
717
718 case
719 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
720 LIR_OprDesc::double_type |
721 LIR_OprDesc::fpu_register |
722 LIR_OprDesc::double_size |
723 LIR_OprDesc::virtual_mask);
724 break;
725 #endif // __SOFTFP__
726 default: ShouldNotReachHere(); res = illegalOpr;
727 }
|
1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
677 break;
678
679 case T_ADDRESS:
680 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
681 LIR_OprDesc::address_type |
682 LIR_OprDesc::cpu_register |
683 LIR_OprDesc::single_size |
684 LIR_OprDesc::virtual_mask);
685 break;
686
687 case T_LONG:
688 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
689 LIR_OprDesc::long_type |
690 LIR_OprDesc::cpu_register |
691 LIR_OprDesc::double_size |
692 LIR_OprDesc::virtual_mask);
693 break;
694
695 #ifdef __SOFTFP__
696 case T_FLOAT:
697 #ifdef AARCH32
698 if (hasFPU()) {
699 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
700 LIR_OprDesc::float_type |
701 LIR_OprDesc::fpu_register |
702 LIR_OprDesc::single_size |
703 LIR_OprDesc::virtual_mask);
704 } else
705 #endif // AARCH32
706 {
707 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
708 LIR_OprDesc::float_type |
709 LIR_OprDesc::cpu_register |
710 LIR_OprDesc::single_size |
711 LIR_OprDesc::virtual_mask);
712 }
713 break;
714 case T_DOUBLE:
715 #ifdef AARCH32
716 if(hasFPU()) {
717 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
718 LIR_OprDesc::double_type |
719 LIR_OprDesc::fpu_register |
720 LIR_OprDesc::double_size |
721 LIR_OprDesc::virtual_mask);
722 } else
723 #endif
724 {
725 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
726 LIR_OprDesc::double_type |
727 LIR_OprDesc::cpu_register |
728 LIR_OprDesc::double_size |
729 LIR_OprDesc::virtual_mask);
730 }
731 break;
732 #else // __SOFTFP__
733 case T_FLOAT:
734 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
735 LIR_OprDesc::float_type |
736 LIR_OprDesc::fpu_register |
737 LIR_OprDesc::single_size |
738 LIR_OprDesc::virtual_mask);
739 break;
740
741 case
742 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
743 LIR_OprDesc::double_type |
744 LIR_OprDesc::fpu_register |
745 LIR_OprDesc::double_size |
746 LIR_OprDesc::virtual_mask);
747 break;
748 #endif // __SOFTFP__
749 default: ShouldNotReachHere(); res = illegalOpr;
750 }
|