9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_ICACHE_AARCH64_HPP
27 #define CPU_AARCH64_ICACHE_AARCH64_HPP
28
29 // Interface for updating the instruction cache. Whenever the VM
30 // modifies code, part of the processor instruction cache potentially
31 // has to be flushed.
32
33 class ICache : public AbstractICache {
34 public:
35 static void initialize();
36 static void invalidate_word(address addr) {
37 __builtin___clear_cache((char *)addr, (char *)(addr + 3));
38 }
39 static void invalidate_range(address start, int nbytes) {
40 __builtin___clear_cache((char *)start, (char *)(start + nbytes));
41 }
42 };
43
44 #endif // CPU_AARCH64_ICACHE_AARCH64_HPP
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_ICACHE_AARCH64_HPP
27 #define CPU_AARCH64_ICACHE_AARCH64_HPP
28
29 #include OS_CPU_HEADER(icache)
30
31 #endif // CPU_AARCH64_ICACHE_AARCH64_HPP
|