74
75
76 CONSTANT_REGISTER_DECLARATION(Register, r0, (0));
77 CONSTANT_REGISTER_DECLARATION(Register, r1, (1));
78 CONSTANT_REGISTER_DECLARATION(Register, r2, (2));
79 CONSTANT_REGISTER_DECLARATION(Register, r3, (3));
80 CONSTANT_REGISTER_DECLARATION(Register, r4, (4));
81 CONSTANT_REGISTER_DECLARATION(Register, r5, (5));
82 CONSTANT_REGISTER_DECLARATION(Register, r6, (6));
83 CONSTANT_REGISTER_DECLARATION(Register, r7, (7));
84 CONSTANT_REGISTER_DECLARATION(Register, r8, (8));
85 CONSTANT_REGISTER_DECLARATION(Register, r9, (9));
86 CONSTANT_REGISTER_DECLARATION(Register, r10, (10));
87 CONSTANT_REGISTER_DECLARATION(Register, r11, (11));
88 CONSTANT_REGISTER_DECLARATION(Register, r12, (12));
89 CONSTANT_REGISTER_DECLARATION(Register, r13, (13));
90 CONSTANT_REGISTER_DECLARATION(Register, r14, (14));
91 CONSTANT_REGISTER_DECLARATION(Register, r15, (15));
92 CONSTANT_REGISTER_DECLARATION(Register, r16, (16));
93 CONSTANT_REGISTER_DECLARATION(Register, r17, (17));
94 CONSTANT_REGISTER_DECLARATION(Register, r18, (18));
95 CONSTANT_REGISTER_DECLARATION(Register, r19, (19));
96 CONSTANT_REGISTER_DECLARATION(Register, r20, (20));
97 CONSTANT_REGISTER_DECLARATION(Register, r21, (21));
98 CONSTANT_REGISTER_DECLARATION(Register, r22, (22));
99 CONSTANT_REGISTER_DECLARATION(Register, r23, (23));
100 CONSTANT_REGISTER_DECLARATION(Register, r24, (24));
101 CONSTANT_REGISTER_DECLARATION(Register, r25, (25));
102 CONSTANT_REGISTER_DECLARATION(Register, r26, (26));
103 CONSTANT_REGISTER_DECLARATION(Register, r27, (27));
104 CONSTANT_REGISTER_DECLARATION(Register, r28, (28));
105 CONSTANT_REGISTER_DECLARATION(Register, r29, (29));
106 CONSTANT_REGISTER_DECLARATION(Register, r30, (30));
107
108
109 // r31 is not a general purpose register, but represents either the
110 // stack pointer or the zero/discard register depending on the
111 // instruction.
112 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
113 CONSTANT_REGISTER_DECLARATION(Register, zr, (32));
114 CONSTANT_REGISTER_DECLARATION(Register, sp, (33));
190 // Need to know the total number of registers of all sorts for SharedInfo.
191 // Define a class that exports it.
192 class ConcreteRegisterImpl : public AbstractRegisterImpl {
193 public:
194 enum {
195 // A big enough number for C2: all the registers plus flags
196 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
197 // There is no requirement that any ordering here matches any ordering c2 gives
198 // it's optoregs.
199
200 number_of_registers = (RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers +
201 FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers +
202 1) // flags
203 };
204
205 // added to make it compile
206 static const int max_gpr;
207 static const int max_fpr;
208 };
209
210 // A set of registers
211 class RegSet {
212 uint32_t _bitset;
213
214 RegSet(uint32_t bitset) : _bitset(bitset) { }
215
216 public:
217
218 RegSet() : _bitset(0) { }
219
220 RegSet(Register r1) : _bitset(r1->bit()) { }
221
222 RegSet operator+(const RegSet aSet) const {
223 RegSet result(_bitset | aSet._bitset);
224 return result;
225 }
226
227 RegSet operator-(const RegSet aSet) const {
228 RegSet result(_bitset & ~aSet._bitset);
229 return result;
248 }
249
250 static RegSet of(Register r1, Register r2, Register r3) {
251 return of(r1, r2) + r3;
252 }
253
254 static RegSet of(Register r1, Register r2, Register r3, Register r4) {
255 return of(r1, r2, r3) + r4;
256 }
257
258 static RegSet range(Register start, Register end) {
259 uint32_t bits = ~0;
260 bits <<= start->encoding();
261 bits <<= 31 - end->encoding();
262 bits >>= 31 - end->encoding();
263
264 return RegSet(bits);
265 }
266
267 uint32_t bits() const { return _bitset; }
268 };
269
270 #endif // CPU_AARCH64_REGISTER_AARCH64_HPP
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74
75
76 CONSTANT_REGISTER_DECLARATION(Register, r0, (0));
77 CONSTANT_REGISTER_DECLARATION(Register, r1, (1));
78 CONSTANT_REGISTER_DECLARATION(Register, r2, (2));
79 CONSTANT_REGISTER_DECLARATION(Register, r3, (3));
80 CONSTANT_REGISTER_DECLARATION(Register, r4, (4));
81 CONSTANT_REGISTER_DECLARATION(Register, r5, (5));
82 CONSTANT_REGISTER_DECLARATION(Register, r6, (6));
83 CONSTANT_REGISTER_DECLARATION(Register, r7, (7));
84 CONSTANT_REGISTER_DECLARATION(Register, r8, (8));
85 CONSTANT_REGISTER_DECLARATION(Register, r9, (9));
86 CONSTANT_REGISTER_DECLARATION(Register, r10, (10));
87 CONSTANT_REGISTER_DECLARATION(Register, r11, (11));
88 CONSTANT_REGISTER_DECLARATION(Register, r12, (12));
89 CONSTANT_REGISTER_DECLARATION(Register, r13, (13));
90 CONSTANT_REGISTER_DECLARATION(Register, r14, (14));
91 CONSTANT_REGISTER_DECLARATION(Register, r15, (15));
92 CONSTANT_REGISTER_DECLARATION(Register, r16, (16));
93 CONSTANT_REGISTER_DECLARATION(Register, r17, (17));
94
95 // In the ABI for Windows+AArch64 the register r18 is used to store the pointer
96 // to the current thread's TEB (where TLS variables are stored). We could
97 // carefully save and restore r18 at key places, however Win32 Structured
98 // Exception Handling (SEH) is using TLS to unwind the stack. If r18 is used
99 // for any other purpose at the time of an exception happening, SEH would not
100 // be able to unwind the stack properly and most likely crash.
101 //
102 // It's easier to avoid allocating r18 altogether.
103 //
104 // See https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#integer-registers
105 CONSTANT_REGISTER_DECLARATION(Register, r18_tls, (18));
106 CONSTANT_REGISTER_DECLARATION(Register, r19, (19));
107 CONSTANT_REGISTER_DECLARATION(Register, r20, (20));
108 CONSTANT_REGISTER_DECLARATION(Register, r21, (21));
109 CONSTANT_REGISTER_DECLARATION(Register, r22, (22));
110 CONSTANT_REGISTER_DECLARATION(Register, r23, (23));
111 CONSTANT_REGISTER_DECLARATION(Register, r24, (24));
112 CONSTANT_REGISTER_DECLARATION(Register, r25, (25));
113 CONSTANT_REGISTER_DECLARATION(Register, r26, (26));
114 CONSTANT_REGISTER_DECLARATION(Register, r27, (27));
115 CONSTANT_REGISTER_DECLARATION(Register, r28, (28));
116 CONSTANT_REGISTER_DECLARATION(Register, r29, (29));
117 CONSTANT_REGISTER_DECLARATION(Register, r30, (30));
118
119
120 // r31 is not a general purpose register, but represents either the
121 // stack pointer or the zero/discard register depending on the
122 // instruction.
123 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
124 CONSTANT_REGISTER_DECLARATION(Register, zr, (32));
125 CONSTANT_REGISTER_DECLARATION(Register, sp, (33));
201 // Need to know the total number of registers of all sorts for SharedInfo.
202 // Define a class that exports it.
203 class ConcreteRegisterImpl : public AbstractRegisterImpl {
204 public:
205 enum {
206 // A big enough number for C2: all the registers plus flags
207 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
208 // There is no requirement that any ordering here matches any ordering c2 gives
209 // it's optoregs.
210
211 number_of_registers = (RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers +
212 FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers +
213 1) // flags
214 };
215
216 // added to make it compile
217 static const int max_gpr;
218 static const int max_fpr;
219 };
220
221 class RegSetIterator;
222
223 // A set of registers
224 class RegSet {
225 uint32_t _bitset;
226
227 RegSet(uint32_t bitset) : _bitset(bitset) { }
228
229 public:
230
231 RegSet() : _bitset(0) { }
232
233 RegSet(Register r1) : _bitset(r1->bit()) { }
234
235 RegSet operator+(const RegSet aSet) const {
236 RegSet result(_bitset | aSet._bitset);
237 return result;
238 }
239
240 RegSet operator-(const RegSet aSet) const {
241 RegSet result(_bitset & ~aSet._bitset);
242 return result;
261 }
262
263 static RegSet of(Register r1, Register r2, Register r3) {
264 return of(r1, r2) + r3;
265 }
266
267 static RegSet of(Register r1, Register r2, Register r3, Register r4) {
268 return of(r1, r2, r3) + r4;
269 }
270
271 static RegSet range(Register start, Register end) {
272 uint32_t bits = ~0;
273 bits <<= start->encoding();
274 bits <<= 31 - end->encoding();
275 bits >>= 31 - end->encoding();
276
277 return RegSet(bits);
278 }
279
280 uint32_t bits() const { return _bitset; }
281
282 private:
283
284 Register first() {
285 uint32_t first = _bitset & -_bitset;
286 return first ? as_Register(exact_log2(first)) : noreg;
287 }
288
289 public:
290
291 friend class RegSetIterator;
292
293 RegSetIterator begin();
294 };
295
296 class RegSetIterator {
297 RegSet _regs;
298
299 public:
300 RegSetIterator(RegSet x): _regs(x) {}
301 RegSetIterator(const RegSetIterator& mit) : _regs(mit._regs) {}
302
303 RegSetIterator& operator++() {
304 Register r = _regs.first();
305 if (r != noreg)
306 _regs -= r;
307 return *this;
308 }
309
310 bool operator==(const RegSetIterator& rhs) const {
311 return _regs.bits() == rhs._regs.bits();
312 }
313 bool operator!=(const RegSetIterator& rhs) const {
314 return ! (rhs == *this);
315 }
316
317 Register operator*() {
318 return _regs.first();
319 }
320 };
321
322 inline RegSetIterator RegSet::begin() {
323 return RegSetIterator(*this);
324 }
325
326 #endif // CPU_AARCH64_REGISTER_AARCH64_HPP
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