src/hotspot/cpu/aarch64/aarch64.ad

rev 60623 : 8248500: AArch64: Remove the r18 dependency on Windows AArch64
Reviewed-by:
Contributed-by: mbeckwit, luhenry, burban
rev 60629 : 8248656: Add Windows AArch64 platform support code
Reviewed-by:
Contributed-by: mbeckwit, luhenry, burban

*** 108,119 ****
  reg_def R15_H   ( SOC, SOC, Op_RegI, 15, r15->as_VMReg()->next());
  reg_def R16     ( SOC, SOC, Op_RegI, 16, r16->as_VMReg()        );
  reg_def R16_H   ( SOC, SOC, Op_RegI, 16, r16->as_VMReg()->next());
  reg_def R17     ( SOC, SOC, Op_RegI, 17, r17->as_VMReg()        );
  reg_def R17_H   ( SOC, SOC, Op_RegI, 17, r17->as_VMReg()->next());
! reg_def R18     ( SOC, SOC, Op_RegI, 18, r18->as_VMReg()        );
! reg_def R18_H   ( SOC, SOC, Op_RegI, 18, r18->as_VMReg()->next());
  reg_def R19     ( SOC, SOE, Op_RegI, 19, r19->as_VMReg()        );
  reg_def R19_H   ( SOC, SOE, Op_RegI, 19, r19->as_VMReg()->next());
  reg_def R20     ( SOC, SOE, Op_RegI, 20, r20->as_VMReg()        ); // caller esp
  reg_def R20_H   ( SOC, SOE, Op_RegI, 20, r20->as_VMReg()->next());
  reg_def R21     ( SOC, SOE, Op_RegI, 21, r21->as_VMReg()        );
--- 108,119 ----
  reg_def R15_H   ( SOC, SOC, Op_RegI, 15, r15->as_VMReg()->next());
  reg_def R16     ( SOC, SOC, Op_RegI, 16, r16->as_VMReg()        );
  reg_def R16_H   ( SOC, SOC, Op_RegI, 16, r16->as_VMReg()->next());
  reg_def R17     ( SOC, SOC, Op_RegI, 17, r17->as_VMReg()        );
  reg_def R17_H   ( SOC, SOC, Op_RegI, 17, r17->as_VMReg()->next());
! reg_def R18     ( SOC, SOC, Op_RegI, 18, r18_tls->as_VMReg()        );
! reg_def R18_H   ( SOC, SOC, Op_RegI, 18, r18_tls->as_VMReg()->next());
  reg_def R19     ( SOC, SOE, Op_RegI, 19, r19->as_VMReg()        );
  reg_def R19_H   ( SOC, SOE, Op_RegI, 19, r19->as_VMReg()->next());
  reg_def R20     ( SOC, SOE, Op_RegI, 20, r20->as_VMReg()        ); // caller esp
  reg_def R20_H   ( SOC, SOE, Op_RegI, 20, r20->as_VMReg()->next());
  reg_def R21     ( SOC, SOE, Op_RegI, 21, r21->as_VMReg()        );
*** 530,546 ****
--- 530,554 ----
    return _ANY_REG_mask;
  %}
  
  // Class for non-allocatable 32 bit registers
  reg_class non_allocatable_reg32(
+ #ifdef _WIN64
+     // See comment in register_aarch64.hpp
+     R18,                        // tls on Windows
+ #endif
      R28,                        // thread
      R30,                        // lr
      R31                         // sp
  );
  
  // Class for non-allocatable 64 bit registers
  reg_class non_allocatable_reg(
+ #ifdef _WIN64
+     // See comment in register_aarch64.hpp
+     R18, R18_H,                 // tls on Windows
+ #endif
      R28, R28_H,                 // thread
      R30, R30_H,                 // lr
      R31, R31_H                  // sp
  );
  
*** 5890,5900 ****
  pipeline %{
  
  attributes %{
    // ARM instructions are of fixed length
    fixed_size_instructions;        // Fixed size instructions TODO does
!   max_instructions_per_bundle = 2;   // A53 = 2, A57 = 4
    // ARM instructions come in 32-bit word units
    instruction_unit_size = 4;         // An instruction is 4 bytes long
    instruction_fetch_unit_size = 64;  // The processor fetches one line
    instruction_fetch_units = 1;       // of 64 bytes
  
--- 5898,5908 ----
  pipeline %{
  
  attributes %{
    // ARM instructions are of fixed length
    fixed_size_instructions;        // Fixed size instructions TODO does
!   max_instructions_per_bundle = 4;   // A53 = 2, A57 = 4
    // ARM instructions come in 32-bit word units
    instruction_unit_size = 4;         // An instruction is 4 bytes long
    instruction_fetch_unit_size = 64;  // The processor fetches one line
    instruction_fetch_units = 1;       // of 64 bytes