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src/hotspot/cpu/aarch64/assembler_aarch64.cpp
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rev 60624 : 8248500: AArch64: Remove the r18 dependency on Windows AArch64 (regenerate tests)
Reviewed-by:
Contributed-by: mbeckwit, luhenry, burban
rev 60629 : 8248656: Add Windows AArch64 platform support code
Reviewed-by:
Contributed-by: mbeckwit, luhenry, burban
*** 94,201 ****
// Generated by aarch64-asmtest.py
Label back, forth;
__ bind(back);
// ArithOp
! __ add(r26, r23, r13, Assembler::LSL, 32); // add x26, x23, x13, LSL #32
! __ sub(r12, r24, r9, Assembler::LSR, 37); // sub x12, x24, x9, LSR #37
! __ adds(r28, r15, r8, Assembler::ASR, 39); // adds x28, x15, x8, ASR #39
! __ subs(r7, r28, r30, Assembler::ASR, 57); // subs x7, x28, x30, ASR #57
! __ addw(r9, r22, r27, Assembler::ASR, 15); // add w9, w22, w27, ASR #15
! __ subw(r3, r13, r18, Assembler::ASR, 30); // sub w3, w13, w18, ASR #30
! __ addsw(r14, r26, r8, Assembler::ASR, 17); // adds w14, w26, w8, ASR #17
! __ subsw(r0, r22, r12, Assembler::ASR, 21); // subs w0, w22, w12, ASR #21
! __ andr(r0, r15, r26, Assembler::LSL, 20); // and x0, x15, x26, LSL #20
! __ orr(r26, r5, r17, Assembler::LSL, 61); // orr x26, x5, x17, LSL #61
! __ eor(r24, r13, r2, Assembler::LSL, 32); // eor x24, x13, x2, LSL #32
! __ ands(r28, r3, r17, Assembler::ASR, 35); // ands x28, x3, x17, ASR #35
! __ andw(r25, r16, r29, Assembler::LSR, 18); // and w25, w16, w29, LSR #18
! __ orrw(r13, r18, r11, Assembler::LSR, 9); // orr w13, w18, w11, LSR #9
! __ eorw(r5, r5, r18, Assembler::LSR, 15); // eor w5, w5, w18, LSR #15
! __ andsw(r2, r23, r27, Assembler::ASR, 26); // ands w2, w23, w27, ASR #26
! __ bic(r27, r28, r16, Assembler::LSR, 45); // bic x27, x28, x16, LSR #45
! __ orn(r8, r25, r26, Assembler::ASR, 37); // orn x8, x25, x26, ASR #37
! __ eon(r29, r17, r13, Assembler::LSR, 63); // eon x29, x17, x13, LSR #63
! __ bics(r28, r24, r2, Assembler::LSR, 31); // bics x28, x24, x2, LSR #31
! __ bicw(r19, r26, r7, Assembler::ASR, 3); // bic w19, w26, w7, ASR #3
! __ ornw(r6, r24, r10, Assembler::ASR, 3); // orn w6, w24, w10, ASR #3
! __ eonw(r4, r21, r1, Assembler::LSR, 29); // eon w4, w21, w1, LSR #29
! __ bicsw(r16, r21, r0, Assembler::LSR, 19); // bics w16, w21, w0, LSR #19
// AddSubImmOp
! __ addw(r17, r12, 379u); // add w17, w12, #379
! __ addsw(r30, r1, 22u); // adds w30, w1, #22
! __ subw(r29, r5, 126u); // sub w29, w5, #126
! __ subsw(r6, r24, 960u); // subs w6, w24, #960
! __ add(r0, r13, 104u); // add x0, x13, #104
! __ adds(r8, r6, 663u); // adds x8, x6, #663
! __ sub(r10, r5, 516u); // sub x10, x5, #516
! __ subs(r1, r3, 1012u); // subs x1, x3, #1012
// LogicalImmOp
! __ andw(r6, r11, 4294049777ull); // and w6, w11, #0xfff1fff1
! __ orrw(r28, r5, 4294966791ull); // orr w28, w5, #0xfffffe07
! __ eorw(r1, r20, 134217216ull); // eor w1, w20, #0x7fffe00
! __ andsw(r7, r18, 1048576ull); // ands w7, w18, #0x100000
! __ andr(r14, r12, 9223372036854775808ull); // and x14, x12, #0x8000000000000000
! __ orr(r9, r11, 562675075514368ull); // orr x9, x11, #0x1ffc000000000
! __ eor(r17, r0, 18014398509481728ull); // eor x17, x0, #0x3fffffffffff00
! __ ands(r1, r8, 18446744073705357315ull); // ands x1, x8, #0xffffffffffc00003
// AbsOp
__ b(__ pc()); // b .
__ b(back); // b back
__ b(forth); // b forth
__ bl(__ pc()); // bl .
__ bl(back); // bl back
__ bl(forth); // bl forth
// RegAndAbsOp
! __ cbzw(r10, __ pc()); // cbz w10, .
! __ cbzw(r10, back); // cbz w10, back
! __ cbzw(r10, forth); // cbz w10, forth
! __ cbnzw(r8, __ pc()); // cbnz w8, .
! __ cbnzw(r8, back); // cbnz w8, back
! __ cbnzw(r8, forth); // cbnz w8, forth
! __ cbz(r11, __ pc()); // cbz x11, .
! __ cbz(r11, back); // cbz x11, back
! __ cbz(r11, forth); // cbz x11, forth
! __ cbnz(r29, __ pc()); // cbnz x29, .
! __ cbnz(r29, back); // cbnz x29, back
! __ cbnz(r29, forth); // cbnz x29, forth
! __ adr(r19, __ pc()); // adr x19, .
! __ adr(r19, back); // adr x19, back
! __ adr(r19, forth); // adr x19, forth
! __ _adrp(r19, __ pc()); // adrp x19, .
// RegImmAbsOp
! __ tbz(r22, 6, __ pc()); // tbz x22, #6, .
! __ tbz(r22, 6, back); // tbz x22, #6, back
! __ tbz(r22, 6, forth); // tbz x22, #6, forth
! __ tbnz(r12, 11, __ pc()); // tbnz x12, #11, .
! __ tbnz(r12, 11, back); // tbnz x12, #11, back
! __ tbnz(r12, 11, forth); // tbnz x12, #11, forth
// MoveWideImmOp
! __ movnw(r0, 6301, 0); // movn w0, #6301, lsl 0
! __ movzw(r7, 20886, 0); // movz w7, #20886, lsl 0
! __ movkw(r27, 18617, 0); // movk w27, #18617, lsl 0
! __ movn(r12, 22998, 16); // movn x12, #22998, lsl 16
! __ movz(r20, 1532, 16); // movz x20, #1532, lsl 16
! __ movk(r8, 5167, 32); // movk x8, #5167, lsl 32
// BitfieldOp
! __ sbfm(r15, r17, 24, 28); // sbfm x15, x17, #24, #28
! __ bfmw(r15, r9, 14, 25); // bfm w15, w9, #14, #25
! __ ubfmw(r27, r25, 6, 31); // ubfm w27, w25, #6, #31
! __ sbfm(r19, r2, 23, 31); // sbfm x19, x2, #23, #31
! __ bfm(r12, r21, 10, 6); // bfm x12, x21, #10, #6
! __ ubfm(r22, r0, 26, 16); // ubfm x22, x0, #26, #16
// ExtractOp
! __ extrw(r3, r3, r20, 27); // extr w3, w3, w20, #27
! __ extr(r8, r30, r3, 54); // extr x8, x30, x3, #54
// CondBranchOp
__ br(Assembler::EQ, __ pc()); // b.EQ .
__ br(Assembler::EQ, back); // b.EQ back
__ br(Assembler::EQ, forth); // b.EQ forth
--- 94,201 ----
// Generated by aarch64-asmtest.py
Label back, forth;
__ bind(back);
// ArithOp
! __ add(r20, r0, r26, Assembler::LSL, 52); // add x20, x0, x26, LSL #52
! __ sub(r5, r28, r3, Assembler::ASR, 54); // sub x5, x28, x3, ASR #54
! __ adds(r11, r22, r3, Assembler::ASR, 39); // adds x11, x22, x3, ASR #39
! __ subs(r11, r3, r12, Assembler::LSR, 25); // subs x11, x3, x12, LSR #25
! __ addw(r27, r12, r13, Assembler::LSL, 14); // add w27, w12, w13, LSL #14
! __ subw(r10, r21, r27, Assembler::ASR, 7); // sub w10, w21, w27, ASR #7
! __ addsw(r3, r14, r16, Assembler::LSL, 4); // adds w3, w14, w16, LSL #4
! __ subsw(r1, r19, r29, Assembler::LSL, 5); // subs w1, w19, w29, LSL #5
! __ andr(r16, r17, r27, Assembler::LSR, 6); // and x16, x17, x27, LSR #6
! __ orr(r22, r28, r28, Assembler::LSL, 35); // orr x22, x28, x28, LSL #35
! __ eor(r11, r10, r28, Assembler::LSR, 51); // eor x11, x10, x28, LSR #51
! __ ands(r13, r8, r14, Assembler::ASR, 48); // ands x13, x8, x14, ASR #48
! __ andw(r1, r3, r1, Assembler::LSR, 3); // and w1, w3, w1, LSR #3
! __ orrw(r9, r8, r5, Assembler::ASR, 22); // orr w9, w8, w5, ASR #22
! __ eorw(r2, r28, r27, Assembler::ASR, 19); // eor w2, w28, w27, ASR #19
! __ andsw(r24, r9, r7, Assembler::LSL, 14); // ands w24, w9, w7, LSL #14
! __ bic(r11, r19, r25, Assembler::ASR, 32); // bic x11, x19, x25, ASR #32
! __ orn(r24, r24, r29, Assembler::LSL, 28); // orn x24, x24, x29, LSL #28
! __ eon(r11, r16, r17, Assembler::ASR, 27); // eon x11, x16, x17, ASR #27
! __ bics(r5, r13, r10, Assembler::LSR, 58); // bics x5, x13, x10, LSR #58
! __ bicw(r5, r10, r21, Assembler::LSL, 29); // bic w5, w10, w21, LSL #29
! __ ornw(r4, r11, r21, Assembler::LSL, 19); // orn w4, w11, w21, LSL #19
! __ eonw(r21, r28, r28, Assembler::LSR, 15); // eon w21, w28, w28, LSR #15
! __ bicsw(r6, r10, r14, Assembler::LSL, 28); // bics w6, w10, w14, LSL #28
// AddSubImmOp
! __ addw(r10, r22, 945u); // add w10, w22, #945
! __ addsw(r15, r11, 935u); // adds w15, w11, #935
! __ subw(r5, r6, 703u); // sub w5, w6, #703
! __ subsw(r19, r0, 568u); // subs w19, w0, #568
! __ add(r20, r8, 608u); // add x20, x8, #608
! __ adds(r16, r6, 269u); // adds x16, x6, #269
! __ sub(r23, r0, 877u); // sub x23, x0, #877
! __ subs(r26, r25, 801u); // subs x26, x25, #801
// LogicalImmOp
! __ andw(r12, r16, 4294459391ull); // and w12, w16, #0xfff83fff
! __ orrw(r1, r24, 4229955583ull); // orr w1, w24, #0xfc1fffff
! __ eorw(r19, r3, 16744448ull); // eor w19, w3, #0xff8000
! __ andsw(r29, r9, 4290777087ull); // ands w29, w9, #0xffc00fff
! __ andr(r26, r5, 18446744073172942847ull); // and x26, x5, #0xffffffffe003ffff
! __ orr(r24, r14, 1150687262887383032ull); // orr x24, x14, #0xff80ff80ff80ff8
! __ eor(r4, r0, 18446744073709289487ull); // eor x4, x0, #0xfffffffffffc000f
! __ ands(r28, r6, 536608768ull); // ands x28, x6, #0x1ffc0000
// AbsOp
__ b(__ pc()); // b .
__ b(back); // b back
__ b(forth); // b forth
__ bl(__ pc()); // bl .
__ bl(back); // bl back
__ bl(forth); // bl forth
// RegAndAbsOp
! __ cbzw(r21, __ pc()); // cbz w21, .
! __ cbzw(r21, back); // cbz w21, back
! __ cbzw(r21, forth); // cbz w21, forth
! __ cbnzw(r12, __ pc()); // cbnz w12, .
! __ cbnzw(r12, back); // cbnz w12, back
! __ cbnzw(r12, forth); // cbnz w12, forth
! __ cbz(r14, __ pc()); // cbz x14, .
! __ cbz(r14, back); // cbz x14, back
! __ cbz(r14, forth); // cbz x14, forth
! __ cbnz(r27, __ pc()); // cbnz x27, .
! __ cbnz(r27, back); // cbnz x27, back
! __ cbnz(r27, forth); // cbnz x27, forth
! __ adr(r14, __ pc()); // adr x14, .
! __ adr(r14, back); // adr x14, back
! __ adr(r14, forth); // adr x14, forth
! __ _adrp(r22, __ pc()); // adrp x22, .
// RegImmAbsOp
! __ tbz(r0, 5, __ pc()); // tbz x0, #5, .
! __ tbz(r0, 5, back); // tbz x0, #5, back
! __ tbz(r0, 5, forth); // tbz x0, #5, forth
! __ tbnz(r3, 11, __ pc()); // tbnz x3, #11, .
! __ tbnz(r3, 11, back); // tbnz x3, #11, back
! __ tbnz(r3, 11, forth); // tbnz x3, #11, forth
// MoveWideImmOp
! __ movnw(r19, 6842, 0); // movn w19, #6842, lsl 0
! __ movzw(r28, 5843, 16); // movz w28, #5843, lsl 16
! __ movkw(r13, 20344, 16); // movk w13, #20344, lsl 16
! __ movn(r1, 1215, 32); // movn x1, #1215, lsl 32
! __ movz(r26, 28755, 0); // movz x26, #28755, lsl 0
! __ movk(r27, 5762, 48); // movk x27, #5762, lsl 48
// BitfieldOp
! __ sbfm(r1, r24, 9, 24); // sbfm x1, x24, #9, #24
! __ bfmw(r25, r0, 5, 16); // bfm w25, w0, #5, #16
! __ ubfmw(r16, r27, 15, 7); // ubfm w16, w27, #15, #7
! __ sbfm(r16, r14, 15, 28); // sbfm x16, x14, #15, #28
! __ bfm(r24, r10, 0, 13); // bfm x24, x10, #0, #13
! __ ubfm(r1, r14, 2, 22); // ubfm x1, x14, #2, #22
// ExtractOp
! __ extrw(r10, r0, r1, 21); // extr w10, w0, w1, #21
! __ extr(r26, r26, r23, 61); // extr x26, x26, x23, #61
// CondBranchOp
__ br(Assembler::EQ, __ pc()); // b.EQ .
__ br(Assembler::EQ, back); // b.EQ back
__ br(Assembler::EQ, forth); // b.EQ forth
*** 250,626 ****
__ br(Assembler::NV, __ pc()); // b.NV .
__ br(Assembler::NV, back); // b.NV back
__ br(Assembler::NV, forth); // b.NV forth
// ImmOp
! __ svc(12999); // svc #12999
! __ hvc(2665); // hvc #2665
! __ smc(9002); // smc #9002
! __ brk(14843); // brk #14843
! __ hlt(25964); // hlt #25964
// Op
__ nop(); // nop
__ eret(); // eret
__ drps(); // drps
__ isb(); // isb
// SystemOp
! __ dsb(Assembler::ST); // dsb ST
! __ dmb(Assembler::OSHST); // dmb OSHST
// OneRegOp
! __ br(r16); // br x16
! __ blr(r20); // blr x20
// LoadStoreExclusiveOp
! __ stxr(r10, r27, r8); // stxr w10, x27, [x8]
! __ stlxr(r0, r1, r21); // stlxr w0, x1, [x21]
! __ ldxr(r17, r29); // ldxr x17, [x29]
! __ ldaxr(r29, r28); // ldaxr x29, [x28]
! __ stlr(r1, r23); // stlr x1, [x23]
! __ ldar(r21, r20); // ldar x21, [x20]
// LoadStoreExclusiveOp
! __ stxrw(r22, r27, r19); // stxr w22, w27, [x19]
! __ stlxrw(r11, r16, r6); // stlxr w11, w16, [x6]
! __ ldxrw(r18, r0); // ldxr w18, [x0]
! __ ldaxrw(r4, r10); // ldaxr w4, [x10]
! __ stlrw(r24, r22); // stlr w24, [x22]
! __ ldarw(r10, r19); // ldar w10, [x19]
// LoadStoreExclusiveOp
! __ stxrh(r1, r5, r30); // stxrh w1, w5, [x30]
! __ stlxrh(r8, r12, r17); // stlxrh w8, w12, [x17]
! __ ldxrh(r9, r14); // ldxrh w9, [x14]
! __ ldaxrh(r7, r1); // ldaxrh w7, [x1]
! __ stlrh(r5, r16); // stlrh w5, [x16]
! __ ldarh(r2, r12); // ldarh w2, [x12]
// LoadStoreExclusiveOp
! __ stxrb(r10, r12, r3); // stxrb w10, w12, [x3]
! __ stlxrb(r28, r14, r26); // stlxrb w28, w14, [x26]
! __ ldxrb(r30, r10); // ldxrb w30, [x10]
! __ ldaxrb(r14, r21); // ldaxrb w14, [x21]
! __ stlrb(r13, r9); // stlrb w13, [x9]
! __ ldarb(r22, r27); // ldarb w22, [x27]
// LoadStoreExclusiveOp
! __ ldxp(r28, r19, r11); // ldxp x28, x19, [x11]
! __ ldaxp(r30, r19, r2); // ldaxp x30, x19, [x2]
! __ stxp(r2, r23, r1, r0); // stxp w2, x23, x1, [x0]
! __ stlxp(r12, r16, r13, r15); // stlxp w12, x16, x13, [x15]
// LoadStoreExclusiveOp
! __ ldxpw(r18, r21, r13); // ldxp w18, w21, [x13]
! __ ldaxpw(r11, r30, r8); // ldaxp w11, w30, [x8]
! __ stxpw(r24, r13, r11, r1); // stxp w24, w13, w11, [x1]
! __ stlxpw(r26, r21, r27, r13); // stlxp w26, w21, w27, [x13]
// base_plus_unscaled_offset
// LoadStoreOp
! __ str(r11, Address(r20, -103)); // str x11, [x20, -103]
! __ strw(r28, Address(r16, 62)); // str w28, [x16, 62]
! __ strb(r27, Address(r9, -9)); // strb w27, [x9, -9]
! __ strh(r2, Address(r25, -50)); // strh w2, [x25, -50]
! __ ldr(r4, Address(r2, -241)); // ldr x4, [x2, -241]
! __ ldrw(r30, Address(r20, -31)); // ldr w30, [x20, -31]
! __ ldrb(r18, Address(r23, -23)); // ldrb w18, [x23, -23]
! __ ldrh(r29, Address(r26, -1)); // ldrh w29, [x26, -1]
! __ ldrsb(r1, Address(r9, 6)); // ldrsb x1, [x9, 6]
! __ ldrsh(r11, Address(r12, 19)); // ldrsh x11, [x12, 19]
! __ ldrshw(r11, Address(r1, -50)); // ldrsh w11, [x1, -50]
! __ ldrsw(r19, Address(r24, 41)); // ldrsw x19, [x24, 41]
! __ ldrd(v24, Address(r24, 95)); // ldr d24, [x24, 95]
! __ ldrs(v15, Address(r5, -43)); // ldr s15, [x5, -43]
! __ strd(v21, Address(r27, 1)); // str d21, [x27, 1]
! __ strs(v23, Address(r13, -107)); // str s23, [x13, -107]
// pre
// LoadStoreOp
! __ str(r11, Address(__ pre(r0, 8))); // str x11, [x0, 8]!
! __ strw(r3, Address(__ pre(r0, 29))); // str w3, [x0, 29]!
! __ strb(r11, Address(__ pre(r14, 9))); // strb w11, [x14, 9]!
! __ strh(r29, Address(__ pre(r24, -3))); // strh w29, [x24, -3]!
! __ ldr(r13, Address(__ pre(r17, -144))); // ldr x13, [x17, -144]!
! __ ldrw(r12, Address(__ pre(r22, -6))); // ldr w12, [x22, -6]!
! __ ldrb(r13, Address(__ pre(r12, -10))); // ldrb w13, [x12, -10]!
! __ ldrh(r0, Address(__ pre(r21, -21))); // ldrh w0, [x21, -21]!
! __ ldrsb(r23, Address(__ pre(r7, 4))); // ldrsb x23, [x7, 4]!
! __ ldrsh(r3, Address(__ pre(r7, -53))); // ldrsh x3, [x7, -53]!
! __ ldrshw(r28, Address(__ pre(r5, -7))); // ldrsh w28, [x5, -7]!
! __ ldrsw(r24, Address(__ pre(r9, -18))); // ldrsw x24, [x9, -18]!
! __ ldrd(v14, Address(__ pre(r11, 12))); // ldr d14, [x11, 12]!
! __ ldrs(v19, Address(__ pre(r12, -67))); // ldr s19, [x12, -67]!
! __ strd(v20, Address(__ pre(r0, -253))); // str d20, [x0, -253]!
! __ strs(v8, Address(__ pre(r0, 64))); // str s8, [x0, 64]!
// post
// LoadStoreOp
! __ str(r4, Address(__ post(r28, -94))); // str x4, [x28], -94
! __ strw(r12, Address(__ post(r7, -54))); // str w12, [x7], -54
! __ strb(r27, Address(__ post(r10, -24))); // strb w27, [x10], -24
! __ strh(r6, Address(__ post(r8, 27))); // strh w6, [x8], 27
! __ ldr(r14, Address(__ post(r10, -202))); // ldr x14, [x10], -202
! __ ldrw(r16, Address(__ post(r5, -41))); // ldr w16, [x5], -41
! __ ldrb(r2, Address(__ post(r14, 9))); // ldrb w2, [x14], 9
! __ ldrh(r28, Address(__ post(r13, -20))); // ldrh w28, [x13], -20
! __ ldrsb(r9, Address(__ post(r13, -31))); // ldrsb x9, [x13], -31
! __ ldrsh(r3, Address(__ post(r24, -36))); // ldrsh x3, [x24], -36
! __ ldrshw(r20, Address(__ post(r3, 6))); // ldrsh w20, [x3], 6
! __ ldrsw(r7, Address(__ post(r19, -1))); // ldrsw x7, [x19], -1
! __ ldrd(v30, Address(__ post(r8, -130))); // ldr d30, [x8], -130
! __ ldrs(v25, Address(__ post(r15, 21))); // ldr s25, [x15], 21
! __ strd(v14, Address(__ post(r23, 90))); // str d14, [x23], 90
! __ strs(v8, Address(__ post(r0, -33))); // str s8, [x0], -33
// base_plus_reg
// LoadStoreOp
! __ str(r10, Address(r18, r21, Address::sxtw(3))); // str x10, [x18, w21, sxtw #3]
! __ strw(r4, Address(r13, r22, Address::sxtw(2))); // str w4, [x13, w22, sxtw #2]
! __ strb(r13, Address(r0, r19, Address::uxtw(0))); // strb w13, [x0, w19, uxtw #0]
! __ strh(r12, Address(r27, r6, Address::sxtw(0))); // strh w12, [x27, w6, sxtw #0]
! __ ldr(r0, Address(r8, r16, Address::lsl(0))); // ldr x0, [x8, x16, lsl #0]
! __ ldrw(r0, Address(r4, r26, Address::sxtx(0))); // ldr w0, [x4, x26, sxtx #0]
! __ ldrb(r14, Address(r25, r5, Address::sxtw(0))); // ldrb w14, [x25, w5, sxtw #0]
! __ ldrh(r9, Address(r4, r18, Address::uxtw(0))); // ldrh w9, [x4, w18, uxtw #0]
! __ ldrsb(r27, Address(r4, r7, Address::lsl(0))); // ldrsb x27, [x4, x7, lsl #0]
! __ ldrsh(r15, Address(r17, r30, Address::sxtw(0))); // ldrsh x15, [x17, w30, sxtw #0]
! __ ldrshw(r16, Address(r0, r22, Address::sxtw(0))); // ldrsh w16, [x0, w22, sxtw #0]
! __ ldrsw(r22, Address(r10, r30, Address::sxtx(2))); // ldrsw x22, [x10, x30, sxtx #2]
! __ ldrd(v29, Address(r21, r10, Address::sxtx(3))); // ldr d29, [x21, x10, sxtx #3]
! __ ldrs(v3, Address(r11, r19, Address::uxtw(0))); // ldr s3, [x11, w19, uxtw #0]
! __ strd(v13, Address(r28, r29, Address::uxtw(3))); // str d13, [x28, w29, uxtw #3]
! __ strs(v23, Address(r29, r5, Address::sxtx(2))); // str s23, [x29, x5, sxtx #2]
// base_plus_scaled_offset
// LoadStoreOp
! __ str(r5, Address(r8, 12600)); // str x5, [x8, 12600]
! __ strw(r29, Address(r24, 7880)); // str w29, [x24, 7880]
! __ strb(r19, Address(r17, 1566)); // strb w19, [x17, 1566]
! __ strh(r13, Address(r19, 3984)); // strh w13, [x19, 3984]
! __ ldr(r19, Address(r23, 13632)); // ldr x19, [x23, 13632]
! __ ldrw(r23, Address(r29, 6264)); // ldr w23, [x29, 6264]
! __ ldrb(r22, Address(r11, 2012)); // ldrb w22, [x11, 2012]
! __ ldrh(r3, Address(r10, 3784)); // ldrh w3, [x10, 3784]
! __ ldrsb(r8, Address(r16, 1951)); // ldrsb x8, [x16, 1951]
! __ ldrsh(r23, Address(r20, 3346)); // ldrsh x23, [x20, 3346]
! __ ldrshw(r2, Address(r1, 3994)); // ldrsh w2, [x1, 3994]
! __ ldrsw(r4, Address(r17, 7204)); // ldrsw x4, [x17, 7204]
! __ ldrd(v20, Address(r27, 14400)); // ldr d20, [x27, 14400]
! __ ldrs(v25, Address(r14, 8096)); // ldr s25, [x14, 8096]
! __ strd(v26, Address(r10, 15024)); // str d26, [x10, 15024]
! __ strs(v9, Address(r3, 6936)); // str s9, [x3, 6936]
// pcrel
// LoadStoreOp
! __ ldr(r27, forth); // ldr x27, forth
! __ ldrw(r11, __ pc()); // ldr w11, .
// LoadStoreOp
! __ prfm(Address(r3, -187)); // prfm PLDL1KEEP, [x3, -187]
// LoadStoreOp
! __ prfm(__ pc()); // prfm PLDL1KEEP, .
// LoadStoreOp
! __ prfm(Address(r29, r14, Address::lsl(0))); // prfm PLDL1KEEP, [x29, x14, lsl #0]
// LoadStoreOp
! __ prfm(Address(r4, 13312)); // prfm PLDL1KEEP, [x4, 13312]
// AddSubCarryOp
! __ adcw(r21, r1, r7); // adc w21, w1, w7
! __ adcsw(r8, r5, r7); // adcs w8, w5, w7
! __ sbcw(r7, r27, r14); // sbc w7, w27, w14
! __ sbcsw(r27, r4, r17); // sbcs w27, w4, w17
! __ adc(r0, r28, r0); // adc x0, x28, x0
! __ adcs(r12, r24, r30); // adcs x12, x24, x30
! __ sbc(r0, r25, r15); // sbc x0, x25, x15
! __ sbcs(r1, r24, r3); // sbcs x1, x24, x3
// AddSubExtendedOp
! __ addw(r18, r24, r20, ext::uxtb, 2); // add w18, w24, w20, uxtb #2
! __ addsw(r13, r28, r10, ext::uxth, 1); // adds w13, w28, w10, uxth #1
! __ sub(r15, r16, r2, ext::sxth, 2); // sub x15, x16, x2, sxth #2
! __ subsw(r29, r13, r13, ext::uxth, 2); // subs w29, w13, w13, uxth #2
! __ add(r12, r20, r12, ext::sxtw, 3); // add x12, x20, x12, sxtw #3
! __ adds(r30, r27, r11, ext::sxtb, 1); // adds x30, x27, x11, sxtb #1
! __ sub(r14, r7, r1, ext::sxtw, 2); // sub x14, x7, x1, sxtw #2
! __ subs(r29, r3, r27, ext::sxth, 1); // subs x29, x3, x27, sxth #1
// ConditionalCompareOp
! __ ccmnw(r0, r13, 14u, Assembler::MI); // ccmn w0, w13, #14, MI
! __ ccmpw(r22, r18, 6u, Assembler::CC); // ccmp w22, w18, #6, CC
! __ ccmn(r18, r30, 14u, Assembler::VS); // ccmn x18, x30, #14, VS
! __ ccmp(r10, r19, 12u, Assembler::HI); // ccmp x10, x19, #12, HI
// ConditionalCompareImmedOp
! __ ccmnw(r6, 18, 2, Assembler::LE); // ccmn w6, #18, #2, LE
! __ ccmpw(r9, 13, 4, Assembler::HI); // ccmp w9, #13, #4, HI
! __ ccmn(r21, 11, 11, Assembler::LO); // ccmn x21, #11, #11, LO
! __ ccmp(r4, 13, 2, Assembler::VC); // ccmp x4, #13, #2, VC
// ConditionalSelectOp
! __ cselw(r12, r2, r22, Assembler::HI); // csel w12, w2, w22, HI
! __ csincw(r24, r16, r17, Assembler::HS); // csinc w24, w16, w17, HS
! __ csinvw(r6, r7, r16, Assembler::LT); // csinv w6, w7, w16, LT
! __ csnegw(r11, r27, r22, Assembler::LS); // csneg w11, w27, w22, LS
! __ csel(r10, r3, r29, Assembler::LT); // csel x10, x3, x29, LT
! __ csinc(r12, r26, r27, Assembler::CC); // csinc x12, x26, x27, CC
! __ csinv(r15, r10, r21, Assembler::GT); // csinv x15, x10, x21, GT
! __ csneg(r30, r23, r9, Assembler::GT); // csneg x30, x23, x9, GT
// TwoRegOp
! __ rbitw(r30, r10); // rbit w30, w10
! __ rev16w(r29, r15); // rev16 w29, w15
! __ revw(r29, r30); // rev w29, w30
! __ clzw(r25, r21); // clz w25, w21
! __ clsw(r4, r0); // cls w4, w0
! __ rbit(r18, r21); // rbit x18, x21
! __ rev16(r29, r16); // rev16 x29, x16
! __ rev32(r21, r20); // rev32 x21, x20
! __ rev(r6, r19); // rev x6, x19
! __ clz(r30, r3); // clz x30, x3
! __ cls(r21, r19); // cls x21, x19
// ThreeRegOp
! __ udivw(r11, r24, r0); // udiv w11, w24, w0
! __ sdivw(r27, r25, r14); // sdiv w27, w25, w14
! __ lslvw(r3, r14, r18); // lslv w3, w14, w18
! __ lsrvw(r7, r15, r24); // lsrv w7, w15, w24
! __ asrvw(r28, r17, r25); // asrv w28, w17, w25
! __ rorvw(r2, r26, r28); // rorv w2, w26, w28
! __ udiv(r5, r25, r26); // udiv x5, x25, x26
! __ sdiv(r27, r16, r18); // sdiv x27, x16, x18
! __ lslv(r6, r21, r12); // lslv x6, x21, x12
! __ lsrv(r0, r4, r12); // lsrv x0, x4, x12
! __ asrv(r27, r17, r28); // asrv x27, x17, x28
! __ rorv(r28, r2, r18); // rorv x28, x2, x18
! __ umulh(r10, r15, r14); // umulh x10, x15, x14
! __ smulh(r14, r3, r25); // smulh x14, x3, x25
// FourRegMulOp
! __ maddw(r15, r19, r14, r5); // madd w15, w19, w14, w5
! __ msubw(r16, r4, r26, r25); // msub w16, w4, w26, w25
! __ madd(r4, r2, r2, r12); // madd x4, x2, x2, x12
! __ msub(r29, r17, r8, r7); // msub x29, x17, x8, x7
! __ smaddl(r3, r4, r25, r4); // smaddl x3, w4, w25, x4
! __ smsubl(r26, r25, r4, r17); // smsubl x26, w25, w4, x17
! __ umaddl(r0, r26, r17, r23); // umaddl x0, w26, w17, x23
! __ umsubl(r15, r21, r28, r17); // umsubl x15, w21, w28, x17
// ThreeRegFloatOp
! __ fmuls(v27, v10, v3); // fmul s27, s10, s3
! __ fdivs(v0, v7, v25); // fdiv s0, s7, s25
! __ fadds(v9, v6, v15); // fadd s9, s6, s15
! __ fsubs(v29, v15, v10); // fsub s29, s15, s10
! __ fmuls(v2, v17, v7); // fmul s2, s17, s7
! __ fmuld(v11, v11, v23); // fmul d11, d11, d23
! __ fdivd(v7, v29, v23); // fdiv d7, d29, d23
! __ faddd(v14, v27, v11); // fadd d14, d27, d11
! __ fsubd(v11, v4, v24); // fsub d11, d4, d24
! __ fmuld(v12, v15, v14); // fmul d12, d15, d14
// FourRegFloatOp
! __ fmadds(v20, v11, v28, v13); // fmadd s20, s11, s28, s13
! __ fmsubs(v11, v12, v23, v30); // fmsub s11, s12, s23, s30
! __ fnmadds(v26, v14, v9, v13); // fnmadd s26, s14, s9, s13
! __ fnmadds(v10, v7, v5, v29); // fnmadd s10, s7, s5, s29
! __ fmaddd(v15, v3, v11, v12); // fmadd d15, d3, d11, d12
! __ fmsubd(v15, v30, v30, v17); // fmsub d15, d30, d30, d17
! __ fnmaddd(v19, v20, v15, v15); // fnmadd d19, d20, d15, d15
! __ fnmaddd(v9, v21, v2, v9); // fnmadd d9, d21, d2, d9
// TwoRegFloatOp
! __ fmovs(v27, v7); // fmov s27, s7
! __ fabss(v29, v30); // fabs s29, s30
! __ fnegs(v17, v1); // fneg s17, s1
! __ fsqrts(v2, v6); // fsqrt s2, s6
! __ fcvts(v10, v3); // fcvt d10, s3
! __ fmovd(v24, v11); // fmov d24, d11
! __ fabsd(v7, v1); // fabs d7, d1
! __ fnegd(v11, v0); // fneg d11, d0
! __ fsqrtd(v3, v18); // fsqrt d3, d18
! __ fcvtd(v28, v6); // fcvt s28, d6
// FloatConvertOp
! __ fcvtzsw(r22, v6); // fcvtzs w22, s6
! __ fcvtzs(r0, v27); // fcvtzs x0, s27
! __ fcvtzdw(r26, v2); // fcvtzs w26, d2
! __ fcvtzd(r5, v7); // fcvtzs x5, d7
! __ scvtfws(v28, r11); // scvtf s28, w11
! __ scvtfs(v25, r13); // scvtf s25, x13
! __ scvtfwd(v11, r23); // scvtf d11, w23
! __ scvtfd(v19, r8); // scvtf d19, x8
! __ fmovs(r18, v21); // fmov w18, s21
! __ fmovd(r25, v20); // fmov x25, d20
! __ fmovs(v19, r18); // fmov s19, w18
! __ fmovd(v2, r29); // fmov d2, x29
// TwoRegFloatOp
! __ fcmps(v22, v8); // fcmp s22, s8
! __ fcmpd(v21, v19); // fcmp d21, d19
! __ fcmps(v20, 0.0); // fcmp s20, #0.0
! __ fcmpd(v11, 0.0); // fcmp d11, #0.0
// LoadStorePairOp
! __ stpw(r20, r6, Address(r15, -32)); // stp w20, w6, [x15, #-32]
! __ ldpw(r27, r14, Address(r3, -208)); // ldp w27, w14, [x3, #-208]
! __ ldpsw(r17, r10, Address(r11, -80)); // ldpsw x17, x10, [x11, #-80]
! __ stp(r7, r7, Address(r14, 64)); // stp x7, x7, [x14, #64]
! __ ldp(r12, r23, Address(r0, 112)); // ldp x12, x23, [x0, #112]
// LoadStorePairOp
! __ stpw(r13, r7, Address(__ pre(r6, -80))); // stp w13, w7, [x6, #-80]!
! __ ldpw(r30, r16, Address(__ pre(r2, -144))); // ldp w30, w16, [x2, #-144]!
! __ ldpsw(r4, r1, Address(__ pre(r26, -144))); // ldpsw x4, x1, [x26, #-144]!
! __ stp(r23, r14, Address(__ pre(r11, 64))); // stp x23, x14, [x11, #64]!
! __ ldp(r29, r27, Address(__ pre(r21, -192))); // ldp x29, x27, [x21, #-192]!
// LoadStorePairOp
! __ stpw(r22, r5, Address(__ post(r21, -48))); // stp w22, w5, [x21], #-48
! __ ldpw(r27, r17, Address(__ post(r6, -32))); // ldp w27, w17, [x6], #-32
! __ ldpsw(r17, r6, Address(__ post(r1, -80))); // ldpsw x17, x6, [x1], #-80
! __ stp(r13, r20, Address(__ post(r21, -208))); // stp x13, x20, [x21], #-208
! __ ldp(r30, r27, Address(__ post(r10, 80))); // ldp x30, x27, [x10], #80
// LoadStorePairOp
! __ stnpw(r5, r17, Address(r11, 16)); // stnp w5, w17, [x11, #16]
! __ ldnpw(r14, r4, Address(r26, -96)); // ldnp w14, w4, [x26, #-96]
! __ stnp(r23, r29, Address(r12, 32)); // stnp x23, x29, [x12, #32]
! __ ldnp(r0, r6, Address(r21, -80)); // ldnp x0, x6, [x21, #-80]
// LdStSIMDOp
! __ ld1(v15, __ T8B, Address(r26)); // ld1 {v15.8B}, [x26]
! __ ld1(v23, v24, __ T16B, Address(__ post(r11, 32))); // ld1 {v23.16B, v24.16B}, [x11], 32
! __ ld1(v8, v9, v10, __ T1D, Address(__ post(r23, r7))); // ld1 {v8.1D, v9.1D, v10.1D}, [x23], x7
! __ ld1(v19, v20, v21, v22, __ T8H, Address(__ post(r25, 64))); // ld1 {v19.8H, v20.8H, v21.8H, v22.8H}, [x25], 64
! __ ld1r(v29, __ T8B, Address(r17)); // ld1r {v29.8B}, [x17]
! __ ld1r(v24, __ T4S, Address(__ post(r23, 4))); // ld1r {v24.4S}, [x23], 4
! __ ld1r(v10, __ T1D, Address(__ post(r5, r25))); // ld1r {v10.1D}, [x5], x25
! __ ld2(v18, v19, __ T2D, Address(r10)); // ld2 {v18.2D, v19.2D}, [x10]
! __ ld2(v12, v13, __ T4H, Address(__ post(r15, 16))); // ld2 {v12.4H, v13.4H}, [x15], 16
! __ ld2r(v25, v26, __ T16B, Address(r18)); // ld2r {v25.16B, v26.16B}, [x18]
! __ ld2r(v1, v2, __ T2S, Address(__ post(r30, 8))); // ld2r {v1.2S, v2.2S}, [x30], 8
! __ ld2r(v16, v17, __ T2D, Address(__ post(r18, r9))); // ld2r {v16.2D, v17.2D}, [x18], x9
! __ ld3(v25, v26, v27, __ T4S, Address(__ post(r12, r2))); // ld3 {v25.4S, v26.4S, v27.4S}, [x12], x2
! __ ld3(v26, v27, v28, __ T2S, Address(r19)); // ld3 {v26.2S, v27.2S, v28.2S}, [x19]
! __ ld3r(v15, v16, v17, __ T8H, Address(r21)); // ld3r {v15.8H, v16.8H, v17.8H}, [x21]
! __ ld3r(v25, v26, v27, __ T4S, Address(__ post(r13, 12))); // ld3r {v25.4S, v26.4S, v27.4S}, [x13], 12
! __ ld3r(v14, v15, v16, __ T1D, Address(__ post(r28, r29))); // ld3r {v14.1D, v15.1D, v16.1D}, [x28], x29
! __ ld4(v17, v18, v19, v20, __ T8H, Address(__ post(r29, 64))); // ld4 {v17.8H, v18.8H, v19.8H, v20.8H}, [x29], 64
! __ ld4(v27, v28, v29, v30, __ T8B, Address(__ post(r7, r0))); // ld4 {v27.8B, v28.8B, v29.8B, v30.8B}, [x7], x0
! __ ld4r(v24, v25, v26, v27, __ T8B, Address(r18)); // ld4r {v24.8B, v25.8B, v26.8B, v27.8B}, [x18]
! __ ld4r(v0, v1, v2, v3, __ T4H, Address(__ post(r26, 8))); // ld4r {v0.4H, v1.4H, v2.4H, v3.4H}, [x26], 8
! __ ld4r(v12, v13, v14, v15, __ T2S, Address(__ post(r25, r2))); // ld4r {v12.2S, v13.2S, v14.2S, v15.2S}, [x25], x2
!
! // SHA512SIMDOp
! __ sha512h(v22, __ T2D, v27, v4); // sha512h q22, q27, v4.2D
! __ sha512h2(v7, __ T2D, v6, v1); // sha512h2 q7, q6, v1.2D
! __ sha512su0(v26, __ T2D, v15); // sha512su0 v26.2D, v15.2D
! __ sha512su1(v2, __ T2D, v13, v13); // sha512su1 v2.2D, v13.2D, v13.2D
// SpecialCases
__ ccmn(zr, zr, 3u, Assembler::LE); // ccmn xzr, xzr, #3, LE
__ ccmnw(zr, zr, 5u, Assembler::EQ); // ccmn wzr, wzr, #5, EQ
__ ccmp(zr, 1, 4u, Assembler::NE); // ccmp xzr, 1, #4, NE
--- 250,620 ----
__ br(Assembler::NV, __ pc()); // b.NV .
__ br(Assembler::NV, back); // b.NV back
__ br(Assembler::NV, forth); // b.NV forth
// ImmOp
! __ svc(15523); // svc #15523
! __ hvc(3191); // hvc #3191
! __ smc(18110); // smc #18110
! __ brk(2818); // brk #2818
! __ hlt(20860); // hlt #20860
// Op
__ nop(); // nop
__ eret(); // eret
__ drps(); // drps
__ isb(); // isb
// SystemOp
! __ dsb(Assembler::OSHST); // dsb OSHST
! __ dmb(Assembler::ISHLD); // dmb ISHLD
// OneRegOp
! __ br(r10); // br x10
! __ blr(r22); // blr x22
// LoadStoreExclusiveOp
! __ stxr(r3, r21, r5); // stxr w3, x21, [x5]
! __ stlxr(r28, r9, r29); // stlxr w28, x9, [x29]
! __ ldxr(r28, r7); // ldxr x28, [x7]
! __ ldaxr(r10, r23); // ldaxr x10, [x23]
! __ stlr(r7, r26); // stlr x7, [x26]
! __ ldar(r16, r23); // ldar x16, [x23]
// LoadStoreExclusiveOp
! __ stxrw(r11, r7, r12); // stxr w11, w7, [x12]
! __ stlxrw(r16, r13, r26); // stlxr w16, w13, [x26]
! __ ldxrw(r25, r21); // ldxr w25, [x21]
! __ ldaxrw(r14, r4); // ldaxr w14, [x4]
! __ stlrw(r26, r9); // stlr w26, [x9]
! __ ldarw(r0, r23); // ldar w0, [x23]
// LoadStoreExclusiveOp
! __ stxrh(r8, r0, r10); // stxrh w8, w0, [x10]
! __ stlxrh(r11, r1, r4); // stlxrh w11, w1, [x4]
! __ ldxrh(r14, r26); // ldxrh w14, [x26]
! __ ldaxrh(r19, r7); // ldaxrh w19, [x7]
! __ stlrh(r17, r22); // stlrh w17, [x22]
! __ ldarh(r20, r6); // ldarh w20, [x6]
// LoadStoreExclusiveOp
! __ stxrb(r25, r8, r6); // stxrb w25, w8, [x6]
! __ stlxrb(r5, r10, r25); // stlxrb w5, w10, [x25]
! __ ldxrb(r0, r22); // ldxrb w0, [x22]
! __ ldaxrb(r8, r3); // ldaxrb w8, [x3]
! __ stlrb(r5, r2); // stlrb w5, [x2]
! __ ldarb(r6, r28); // ldarb w6, [x28]
// LoadStoreExclusiveOp
! __ ldxp(r17, r8, r14); // ldxp x17, x8, [x14]
! __ ldaxp(r14, r3, r2); // ldaxp x14, x3, [x2]
! __ stxp(r25, r17, r4, r19); // stxp w25, x17, x4, [x19]
! __ stlxp(r10, r16, r15, r8); // stlxp w10, x16, x15, [x8]
// LoadStoreExclusiveOp
! __ ldxpw(r1, r11, r3); // ldxp w1, w11, [x3]
! __ ldaxpw(r0, r27, r12); // ldaxp w0, w27, [x12]
! __ stxpw(r4, r20, r21, r29); // stxp w4, w20, w21, [x29]
! __ stlxpw(r0, r9, r5, r29); // stlxp w0, w9, w5, [x29]
// base_plus_unscaled_offset
// LoadStoreOp
! __ str(r17, Address(r4, -227)); // str x17, [x4, -227]
! __ strw(r6, Address(r4, -33)); // str w6, [x4, -33]
! __ strb(r13, Address(r16, 11)); // strb w13, [x16, 11]
! __ strh(r23, Address(r22, -64)); // strh w23, [x22, -64]
! __ ldr(r2, Address(r3, 13)); // ldr x2, [x3, 13]
! __ ldrw(r5, Address(r20, 35)); // ldr w5, [x20, 35]
! __ ldrb(r2, Address(r10, -15)); // ldrb w2, [x10, -15]
! __ ldrh(r23, Address(r0, -8)); // ldrh w23, [x0, -8]
! __ ldrsb(r15, Address(r14, -3)); // ldrsb x15, [x14, -3]
! __ ldrsh(r3, Address(r3, -12)); // ldrsh x3, [x3, -12]
! __ ldrshw(r25, Address(r24, -7)); // ldrsh w25, [x24, -7]
! __ ldrsw(r17, Address(r0, -29)); // ldrsw x17, [x0, -29]
! __ ldrd(v7, Address(r9, -79)); // ldr d7, [x9, -79]
! __ ldrs(v11, Address(r11, -68)); // ldr s11, [x11, -68]
! __ strd(v16, Address(r2, -119)); // str d16, [x2, -119]
! __ strs(v25, Address(r28, -124)); // str s25, [x28, -124]
// pre
// LoadStoreOp
! __ str(r28, Address(__ pre(r19, 82))); // str x28, [x19, 82]!
! __ strw(r7, Address(__ pre(r13, 50))); // str w7, [x13, 50]!
! __ strb(r2, Address(__ pre(r19, -32))); // strb w2, [x19, -32]!
! __ strh(r24, Address(__ pre(r1, -58))); // strh w24, [x1, -58]!
! __ ldr(r23, Address(__ pre(r29, -143))); // ldr x23, [x29, -143]!
! __ ldrw(r13, Address(__ pre(r27, 0))); // ldr w13, [x27, 0]!
! __ ldrb(r11, Address(__ pre(r10, -26))); // ldrb w11, [x10, -26]!
! __ ldrh(r3, Address(__ pre(r6, -54))); // ldrh w3, [x6, -54]!
! __ ldrsb(r2, Address(__ pre(r9, 3))); // ldrsb x2, [x9, 3]!
! __ ldrsh(r28, Address(__ pre(r4, 30))); // ldrsh x28, [x4, 30]!
! __ ldrshw(r17, Address(__ pre(r0, -23))); // ldrsh w17, [x0, -23]!
! __ ldrsw(r29, Address(__ pre(r25, -117))); // ldrsw x29, [x25, -117]!
! __ ldrd(v21, Address(__ pre(r10, -142))); // ldr d21, [x10, -142]!
! __ ldrs(v11, Address(__ pre(r20, 35))); // ldr s11, [x20, 35]!
! __ strd(v1, Address(__ pre(r15, -214))); // str d1, [x15, -214]!
! __ strs(v19, Address(__ pre(r5, -55))); // str s19, [x5, -55]!
// post
// LoadStoreOp
! __ str(r28, Address(__ post(r17, -20))); // str x28, [x17], -20
! __ strw(r8, Address(__ post(r13, -9))); // str w8, [x13], -9
! __ strb(r14, Address(__ post(r24, -23))); // strb w14, [x24], -23
! __ strh(r2, Address(__ post(r4, -60))); // strh w2, [x4], -60
! __ ldr(r24, Address(__ post(r25, 34))); // ldr x24, [x25], 34
! __ ldrw(r16, Address(__ post(r28, -27))); // ldr w16, [x28], -27
! __ ldrb(r8, Address(__ post(r23, -27))); // ldrb w8, [x23], -27
! __ ldrh(r3, Address(__ post(r0, -58))); // ldrh w3, [x0], -58
! __ ldrsb(r14, Address(__ post(r15, -10))); // ldrsb x14, [x15], -10
! __ ldrsh(r12, Address(__ post(r1, 13))); // ldrsh x12, [x1], 13
! __ ldrshw(r9, Address(__ post(r1, -19))); // ldrsh w9, [x1], -19
! __ ldrsw(r29, Address(__ post(r10, -61))); // ldrsw x29, [x10], -61
! __ ldrd(v13, Address(__ post(r28, -9))); // ldr d13, [x28], -9
! __ ldrs(v20, Address(__ post(r27, -88))); // ldr s20, [x27], -88
! __ strd(v7, Address(__ post(r11, -199))); // str d7, [x11], -199
! __ strs(v20, Address(__ post(r22, -61))); // str s20, [x22], -61
// base_plus_reg
// LoadStoreOp
! __ str(r3, Address(r10, r16, Address::sxtw(0))); // str x3, [x10, w16, sxtw #0]
! __ strw(r1, Address(r29, r21, Address::lsl(2))); // str w1, [x29, x21, lsl #2]
! __ strb(r26, Address(r0, r23, Address::uxtw(0))); // strb w26, [x0, w23, uxtw #0]
! __ strh(r26, Address(r0, r21, Address::lsl(0))); // strh w26, [x0, x21, lsl #0]
! __ ldr(r3, Address(r25, r22, Address::lsl(0))); // ldr x3, [x25, x22, lsl #0]
! __ ldrw(r25, Address(r9, r24, Address::uxtw(2))); // ldr w25, [x9, w24, uxtw #2]
! __ ldrb(r10, Address(r0, r14, Address::sxtw(0))); // ldrb w10, [x0, w14, sxtw #0]
! __ ldrh(r2, Address(r21, r20, Address::lsl(1))); // ldrh w2, [x21, x20, lsl #1]
! __ ldrsb(r19, Address(r27, r28, Address::sxtx(0))); // ldrsb x19, [x27, x28, sxtx #0]
! __ ldrsh(r1, Address(r8, r3, Address::lsl(1))); // ldrsh x1, [x8, x3, lsl #1]
! __ ldrshw(r20, Address(r15, r16, Address::sxtx(0))); // ldrsh w20, [x15, x16, sxtx #0]
! __ ldrsw(r7, Address(r7, r12, Address::lsl(2))); // ldrsw x7, [x7, x12, lsl #2]
! __ ldrd(v15, Address(r4, r13, Address::sxtw(3))); // ldr d15, [x4, w13, sxtw #3]
! __ ldrs(v14, Address(r10, r3, Address::uxtw(0))); // ldr s14, [x10, w3, uxtw #0]
! __ strd(v24, Address(r23, r9, Address::sxtx(3))); // str d24, [x23, x9, sxtx #3]
! __ strs(v9, Address(r12, r26, Address::uxtw(2))); // str s9, [x12, w26, uxtw #2]
// base_plus_scaled_offset
// LoadStoreOp
! __ str(r14, Address(r24, 13472)); // str x14, [x24, 13472]
! __ strw(r0, Address(r14, 7392)); // str w0, [x14, 7392]
! __ strb(r23, Address(r19, 1536)); // strb w23, [x19, 1536]
! __ strh(r15, Address(r11, 3608)); // strh w15, [x11, 3608]
! __ ldr(r21, Address(r25, 13672)); // ldr x21, [x25, 13672]
! __ ldrw(r23, Address(r7, 6160)); // ldr w23, [x7, 6160]
! __ ldrb(r23, Address(r16, 1975)); // ldrb w23, [x16, 1975]
! __ ldrh(r24, Address(r24, 3850)); // ldrh w24, [x24, 3850]
! __ ldrsb(r12, Address(r9, 1613)); // ldrsb x12, [x9, 1613]
! __ ldrsh(r5, Address(r21, 3840)); // ldrsh x5, [x21, 3840]
! __ ldrshw(r14, Address(r0, 3590)); // ldrsh w14, [x0, 3590]
! __ ldrsw(r13, Address(r2, 7928)); // ldrsw x13, [x2, 7928]
! __ ldrd(v15, Address(r19, 15800)); // ldr d15, [x19, 15800]
! __ ldrs(v23, Address(r5, 6272)); // ldr s23, [x5, 6272]
! __ strd(v6, Address(r6, 15136)); // str d6, [x6, 15136]
! __ strs(v9, Address(r11, 6180)); // str s9, [x11, 6180]
// pcrel
// LoadStoreOp
! __ ldr(r7, forth); // ldr x7, forth
! __ ldrw(r29, __ pc()); // ldr w29, .
// LoadStoreOp
! __ prfm(Address(r0, -215)); // prfm PLDL1KEEP, [x0, -215]
// LoadStoreOp
! __ prfm(forth); // prfm PLDL1KEEP, forth
// LoadStoreOp
! __ prfm(Address(r4, r3, Address::uxtw(0))); // prfm PLDL1KEEP, [x4, w3, uxtw #0]
// LoadStoreOp
! __ prfm(Address(r14, 12360)); // prfm PLDL1KEEP, [x14, 12360]
// AddSubCarryOp
! __ adcw(r7, r6, r4); // adc w7, w6, w4
! __ adcsw(r27, r12, r5); // adcs w27, w12, w5
! __ sbcw(r25, r24, r26); // sbc w25, w24, w26
! __ sbcsw(r5, r7, r23); // sbcs w5, w7, w23
! __ adc(r22, r11, r1); // adc x22, x11, x1
! __ adcs(r13, r9, r29); // adcs x13, x9, x29
! __ sbc(r4, r14, r26); // sbc x4, x14, x26
! __ sbcs(r28, r29, r24); // sbcs x28, x29, x24
// AddSubExtendedOp
! __ addw(r17, r21, r21, ext::uxtw, 1); // add w17, w21, w21, uxtw #1
! __ addsw(r12, r9, r26, ext::sxth, 3); // adds w12, w9, w26, sxth #3
! __ sub(r14, r5, r3, ext::uxth, 1); // sub x14, x5, x3, uxth #1
! __ subsw(r17, r26, r6, ext::uxtx, 4); // subs w17, w26, w6, uxtx #4
! __ add(r17, r5, r20, ext::sxth, 3); // add x17, x5, x20, sxth #3
! __ adds(r16, r1, r25, ext::sxtw, 3); // adds x16, x1, x25, sxtw #3
! __ sub(r25, r1, r26, ext::sxtx, 3); // sub x25, x1, x26, sxtx #3
! __ subs(r19, r1, r23, ext::sxth, 3); // subs x19, x1, x23, sxth #3
// ConditionalCompareOp
! __ ccmnw(r1, r24, 9u, Assembler::LS); // ccmn w1, w24, #9, LS
! __ ccmpw(r14, r10, 4u, Assembler::GT); // ccmp w14, w10, #4, GT
! __ ccmn(r9, r29, 0u, Assembler::CC); // ccmn x9, x29, #0, CC
! __ ccmp(r6, r6, 13u, Assembler::MI); // ccmp x6, x6, #13, MI
// ConditionalCompareImmedOp
! __ ccmnw(r19, 11, 5, Assembler::NE); // ccmn w19, #11, #5, NE
! __ ccmpw(r11, 31, 15, Assembler::GE); // ccmp w11, #31, #15, GE
! __ ccmn(r12, 14, 5, Assembler::VS); // ccmn x12, #14, #5, VS
! __ ccmp(r1, 7, 10, Assembler::MI); // ccmp x1, #7, #10, MI
// ConditionalSelectOp
! __ cselw(r6, r2, r22, Assembler::LO); // csel w6, w2, w22, LO
! __ csincw(r29, r22, r26, Assembler::VS); // csinc w29, w22, w26, VS
! __ csinvw(r26, r25, r11, Assembler::LS); // csinv w26, w25, w11, LS
! __ csnegw(r19, r14, r16, Assembler::GT); // csneg w19, w14, w16, GT
! __ csel(r13, r21, r20, Assembler::CS); // csel x13, x21, x20, CS
! __ csinc(r12, r11, r27, Assembler::HI); // csinc x12, x11, x27, HI
! __ csinv(r3, r17, r19, Assembler::LE); // csinv x3, x17, x19, LE
! __ csneg(r24, r1, r7, Assembler::VS); // csneg x24, x1, x7, VS
// TwoRegOp
! __ rbitw(r23, r1); // rbit w23, w1
! __ rev16w(r16, r16); // rev16 w16, w16
! __ revw(r24, r25); // rev w24, w25
! __ clzw(r25, r8); // clz w25, w8
! __ clsw(r27, r12); // cls w27, w12
! __ rbit(r21, r5); // rbit x21, x5
! __ rev16(r20, r9); // rev16 x20, x9
! __ rev32(r20, r9); // rev32 x20, x9
! __ rev(r19, r10); // rev x19, x10
! __ clz(r8, r2); // clz x8, x2
! __ cls(r29, r3); // cls x29, x3
// ThreeRegOp
! __ udivw(r19, r7, r29); // udiv w19, w7, w29
! __ sdivw(r26, r27, r10); // sdiv w26, w27, w10
! __ lslvw(r0, r24, r16); // lslv w0, w24, w16
! __ lsrvw(r22, r10, r24); // lsrv w22, w10, w24
! __ asrvw(r0, r26, r16); // asrv w0, w26, w16
! __ rorvw(r27, r25, r15); // rorv w27, w25, w15
! __ udiv(r8, r28, r15); // udiv x8, x28, x15
! __ sdiv(r20, r11, r5); // sdiv x20, x11, x5
! __ lslv(r21, r25, r16); // lslv x21, x25, x16
! __ lsrv(r7, r2, r14); // lsrv x7, x2, x14
! __ asrv(r21, r8, r22); // asrv x21, x8, x22
! __ rorv(r7, r5, r15); // rorv x7, x5, x15
! __ umulh(r12, r21, r22); // umulh x12, x21, x22
! __ smulh(r16, r10, r5); // smulh x16, x10, x5
// FourRegMulOp
! __ maddw(r2, r6, r26, r21); // madd w2, w6, w26, w21
! __ msubw(r27, r19, r3, r27); // msub w27, w19, w3, w27
! __ madd(r27, r5, r8, r3); // madd x27, x5, x8, x3
! __ msub(r8, r13, r28, r13); // msub x8, x13, x28, x13
! __ smaddl(r29, r9, r8, r0); // smaddl x29, w9, w8, x0
! __ smsubl(r14, r9, r14, r23); // smsubl x14, w9, w14, x23
! __ umaddl(r15, r4, r11, r13); // umaddl x15, w4, w11, x13
! __ umsubl(r23, r3, r17, r24); // umsubl x23, w3, w17, x24
// ThreeRegFloatOp
! __ fmuls(v29, v1, v17); // fmul s29, s1, s17
! __ fdivs(v23, v28, v9); // fdiv s23, s28, s9
! __ fadds(v14, v19, v12); // fadd s14, s19, s12
! __ fsubs(v27, v17, v0); // fsub s27, s17, s0
! __ fmuls(v16, v24, v6); // fmul s16, s24, s6
! __ fmuld(v4, v23, v10); // fmul d4, d23, d10
! __ fdivd(v11, v9, v23); // fdiv d11, d9, d23
! __ faddd(v7, v15, v7); // fadd d7, d15, d7
! __ fsubd(v29, v21, v12); // fsub d29, d21, d12
! __ fmuld(v27, v4, v9); // fmul d27, d4, d9
// FourRegFloatOp
! __ fmadds(v27, v14, v11, v25); // fmadd s27, s14, s11, s25
! __ fmsubs(v11, v22, v15, v3); // fmsub s11, s22, s15, s3
! __ fnmadds(v10, v27, v24, v4); // fnmadd s10, s27, s24, s4
! __ fnmadds(v4, v6, v1, v1); // fnmadd s4, s6, s1, s1
! __ fmaddd(v13, v28, v3, v2); // fmadd d13, d28, d3, d2
! __ fmsubd(v26, v24, v7, v26); // fmsub d26, d24, d7, d26
! __ fnmaddd(v21, v5, v12, v26); // fnmadd d21, d5, d12, d26
! __ fnmaddd(v11, v16, v20, v3); // fnmadd d11, d16, d20, d3
// TwoRegFloatOp
! __ fmovs(v5, v17); // fmov s5, s17
! __ fabss(v7, v9); // fabs s7, s9
! __ fnegs(v25, v1); // fneg s25, s1
! __ fsqrts(v24, v6); // fsqrt s24, s6
! __ fcvts(v27, v17); // fcvt d27, s17
! __ fmovd(v22, v2); // fmov d22, d2
! __ fabsd(v14, v20); // fabs d14, d20
! __ fnegd(v29, v11); // fneg d29, d11
! __ fsqrtd(v28, v12); // fsqrt d28, d12
! __ fcvtd(v4, v3); // fcvt s4, d3
// FloatConvertOp
! __ fcvtzsw(r28, v13); // fcvtzs w28, s13
! __ fcvtzs(r7, v28); // fcvtzs x7, s28
! __ fcvtzdw(r12, v15); // fcvtzs w12, d15
! __ fcvtzd(r11, v6); // fcvtzs x11, d6
! __ scvtfws(v22, r22); // scvtf s22, w22
! __ scvtfs(v5, r16); // scvtf s5, x16
! __ scvtfwd(v3, r15); // scvtf d3, w15
! __ scvtfd(v6, r8); // scvtf d6, x8
! __ fmovs(r26, v29); // fmov w26, s29
! __ fmovd(r24, v17); // fmov x24, d17
! __ fmovs(v2, r19); // fmov s2, w19
! __ fmovd(v21, r5); // fmov d21, x5
// TwoRegFloatOp
! __ fcmps(v23, v8); // fcmp s23, s8
! __ fcmpd(v12, v2); // fcmp d12, d2
! __ fcmps(v14, 0.0); // fcmp s14, #0.0
! __ fcmpd(v10, 0.0); // fcmp d10, #0.0
// LoadStorePairOp
! __ stpw(r8, r17, Address(r12, -96)); // stp w8, w17, [x12, #-96]
! __ ldpw(r1, r21, Address(r28, -192)); // ldp w1, w21, [x28, #-192]
! __ ldpsw(r25, r22, Address(r16, -64)); // ldpsw x25, x22, [x16, #-64]
! __ stp(r6, r8, Address(r23, -128)); // stp x6, x8, [x23, #-128]
! __ ldp(r25, r16, Address(r19, -112)); // ldp x25, x16, [x19, #-112]
// LoadStorePairOp
! __ stpw(r29, r27, Address(__ pre(r13, -240))); // stp w29, w27, [x13, #-240]!
! __ ldpw(r12, r20, Address(__ pre(r21, -32))); // ldp w12, w20, [x21, #-32]!
! __ ldpsw(r0, r15, Address(__ pre(r4, -144))); // ldpsw x0, x15, [x4, #-144]!
! __ stp(r13, r12, Address(__ pre(r19, 128))); // stp x13, x12, [x19, #128]!
! __ ldp(r25, r2, Address(__ pre(r9, 96))); // ldp x25, x2, [x9, #96]!
// LoadStorePairOp
! __ stpw(r11, r1, Address(__ post(r26, 128))); // stp w11, w1, [x26], #128
! __ ldpw(r26, r25, Address(__ post(r3, 32))); // ldp w26, w25, [x3], #32
! __ ldpsw(r10, r14, Address(__ post(r2, -240))); // ldpsw x10, x14, [x2], #-240
! __ stp(r1, r3, Address(__ post(r10, 128))); // stp x1, x3, [x10], #128
! __ ldp(r23, r12, Address(__ post(r25, -144))); // ldp x23, x12, [x25], #-144
// LoadStorePairOp
! __ stnpw(r5, r8, Address(r25, 64)); // stnp w5, w8, [x25, #64]
! __ ldnpw(r20, r19, Address(r22, -240)); // ldnp w20, w19, [x22, #-240]
! __ stnp(r23, r7, Address(r14, -176)); // stnp x23, x7, [x14, #-176]
! __ ldnp(r14, r28, Address(r21, 64)); // ldnp x14, x28, [x21, #64]
// LdStSIMDOp
! __ ld1(v10, __ T8B, Address(r4)); // ld1 {v10.8B}, [x4]
! __ ld1(v25, v26, __ T16B, Address(__ post(r26, 32))); // ld1 {v25.16B, v26.16B}, [x26], 32
! __ ld1(v27, v28, v29, __ T1D, Address(__ post(r4, r23))); // ld1 {v27.1D, v28.1D, v29.1D}, [x4], x23
! __ ld1(v16, v17, v18, v19, __ T8H, Address(__ post(r6, 64))); // ld1 {v16.8H, v17.8H, v18.8H, v19.8H}, [x6], 64
! __ ld1r(v1, __ T8B, Address(r27)); // ld1r {v1.8B}, [x27]
! __ ld1r(v4, __ T4S, Address(__ post(r2, 4))); // ld1r {v4.4S}, [x2], 4
! __ ld1r(v21, __ T1D, Address(__ post(r29, r15))); // ld1r {v21.1D}, [x29], x15
! __ ld2(v1, v2, __ T2D, Address(r22)); // ld2 {v1.2D, v2.2D}, [x22]
! __ ld2(v29, v30, __ T4H, Address(__ post(r8, 16))); // ld2 {v29.4H, v30.4H}, [x8], 16
! __ ld2r(v24, v25, __ T16B, Address(r4)); // ld2r {v24.16B, v25.16B}, [x4]
! __ ld2r(v21, v22, __ T2S, Address(__ post(r19, 8))); // ld2r {v21.2S, v22.2S}, [x19], 8
! __ ld2r(v13, v14, __ T2D, Address(__ post(r13, r6))); // ld2r {v13.2D, v14.2D}, [x13], x6
! __ ld3(v1, v2, v3, __ T4S, Address(__ post(r4, r17))); // ld3 {v1.4S, v2.4S, v3.4S}, [x4], x17
! __ ld3(v22, v23, v24, __ T2S, Address(r17)); // ld3 {v22.2S, v23.2S, v24.2S}, [x17]
! __ ld3r(v17, v18, v19, __ T8H, Address(r17)); // ld3r {v17.8H, v18.8H, v19.8H}, [x17]
! __ ld3r(v8, v9, v10, __ T4S, Address(__ post(r28, 12))); // ld3r {v8.4S, v9.4S, v10.4S}, [x28], 12
! __ ld3r(v5, v6, v7, __ T1D, Address(__ post(r1, r19))); // ld3r {v5.1D, v6.1D, v7.1D}, [x1], x19
! __ ld4(v1, v2, v3, v4, __ T8H, Address(__ post(r15, 64))); // ld4 {v1.8H, v2.8H, v3.8H, v4.8H}, [x15], 64
! __ ld4(v17, v18, v19, v20, __ T8B, Address(__ post(r6, r26))); // ld4 {v17.8B, v18.8B, v19.8B, v20.8B}, [x6], x26
! __ ld4r(v25, v26, v27, v28, __ T8B, Address(r7)); // ld4r {v25.8B, v26.8B, v27.8B, v28.8B}, [x7]
! __ ld4r(v12, v13, v14, v15, __ T4H, Address(__ post(r8, 8))); // ld4r {v12.4H, v13.4H, v14.4H, v15.4H}, [x8], 8
! __ ld4r(v9, v10, v11, v12, __ T2S, Address(__ post(r13, r1))); // ld4r {v9.2S, v10.2S, v11.2S, v12.2S}, [x13], x1
// SpecialCases
__ ccmn(zr, zr, 3u, Assembler::LE); // ccmn xzr, xzr, #3, LE
__ ccmnw(zr, zr, 5u, Assembler::EQ); // ccmn wzr, wzr, #5, EQ
__ ccmp(zr, 1, 4u, Assembler::NE); // ccmp xzr, 1, #4, NE
*** 670,1425 ****
__ fmovd(v0, -0.53125); // fmov d0, #-0.53125
__ fmovd(v0, -1.0); // fmov d0, #-1.0
__ fmovd(v0, -1.0625); // fmov d0, #-1.0625
// LSEOp
! __ swp(Assembler::xword, r24, r24, r4); // swp x24, x24, [x4]
! __ ldadd(Assembler::xword, r20, r16, r0); // ldadd x20, x16, [x0]
! __ ldbic(Assembler::xword, r4, r21, r11); // ldclr x4, x21, [x11]
! __ ldeor(Assembler::xword, r30, r16, r22); // ldeor x30, x16, [x22]
! __ ldorr(Assembler::xword, r4, r15, r23); // ldset x4, x15, [x23]
! __ ldsmin(Assembler::xword, r26, r6, r12); // ldsmin x26, x6, [x12]
! __ ldsmax(Assembler::xword, r15, r14, r15); // ldsmax x15, x14, [x15]
! __ ldumin(Assembler::xword, r9, r25, r29); // ldumin x9, x25, [x29]
! __ ldumax(Assembler::xword, r11, r20, r12); // ldumax x11, x20, [x12]
// LSEOp
! __ swpa(Assembler::xword, r18, r22, r16); // swpa x18, x22, [x16]
! __ ldadda(Assembler::xword, r21, r24, r26); // ldadda x21, x24, [x26]
! __ ldbica(Assembler::xword, r6, r6, r16); // ldclra x6, x6, [x16]
! __ ldeora(Assembler::xword, r16, r25, r16); // ldeora x16, x25, [x16]
! __ ldorra(Assembler::xword, r28, r24, r16); // ldseta x28, x24, [x16]
! __ ldsmina(Assembler::xword, r26, r15, r10); // ldsmina x26, x15, [x10]
! __ ldsmaxa(Assembler::xword, r13, r14, r20); // ldsmaxa x13, x14, [x20]
! __ ldumina(Assembler::xword, r1, r23, r30); // ldumina x1, x23, [x30]
! __ ldumaxa(Assembler::xword, r14, r2, r6); // ldumaxa x14, x2, [x6]
// LSEOp
! __ swpal(Assembler::xword, r3, r8, r25); // swpal x3, x8, [x25]
! __ ldaddal(Assembler::xword, r0, r27, r30); // ldaddal x0, x27, [x30]
! __ ldbical(Assembler::xword, r5, r5, r30); // ldclral x5, x5, [x30]
! __ ldeoral(Assembler::xword, r11, r25, r0); // ldeoral x11, x25, [x0]
! __ ldorral(Assembler::xword, zr, r0, r19); // ldsetal xzr, x0, [x19]
! __ ldsminal(Assembler::xword, r29, r26, r9); // ldsminal x29, x26, [x9]
! __ ldsmaxal(Assembler::xword, r26, r12, r15); // ldsmaxal x26, x12, [x15]
! __ lduminal(Assembler::xword, r11, r11, r18); // lduminal x11, x11, [x18]
! __ ldumaxal(Assembler::xword, r25, r22, r24); // ldumaxal x25, x22, [x24]
// LSEOp
! __ swpl(Assembler::xword, r0, r17, r11); // swpl x0, x17, [x11]
! __ ldaddl(Assembler::xword, r6, r29, r6); // ldaddl x6, x29, [x6]
! __ ldbicl(Assembler::xword, r5, r5, r21); // ldclrl x5, x5, [x21]
! __ ldeorl(Assembler::xword, r19, r16, r18); // ldeorl x19, x16, [x18]
! __ ldorrl(Assembler::xword, r30, r27, r28); // ldsetl x30, x27, [x28]
! __ ldsminl(Assembler::xword, r1, r28, r1); // ldsminl x1, x28, [x1]
! __ ldsmaxl(Assembler::xword, r20, r29, r16); // ldsmaxl x20, x29, [x16]
! __ lduminl(Assembler::xword, r13, r10, r29); // lduminl x13, x10, [x29]
! __ ldumaxl(Assembler::xword, r29, r19, r22); // ldumaxl x29, x19, [x22]
// LSEOp
! __ swp(Assembler::word, r10, r4, sp); // swp w10, w4, [sp]
! __ ldadd(Assembler::word, r21, r8, sp); // ldadd w21, w8, [sp]
! __ ldbic(Assembler::word, r19, r10, r28); // ldclr w19, w10, [x28]
! __ ldeor(Assembler::word, r2, r25, r5); // ldeor w2, w25, [x5]
! __ ldorr(Assembler::word, r3, r8, r22); // ldset w3, w8, [x22]
! __ ldsmin(Assembler::word, r19, r13, r5); // ldsmin w19, w13, [x5]
! __ ldsmax(Assembler::word, r29, r24, r21); // ldsmax w29, w24, [x21]
! __ ldumin(Assembler::word, r26, r24, r3); // ldumin w26, w24, [x3]
! __ ldumax(Assembler::word, r24, r26, r23); // ldumax w24, w26, [x23]
// LSEOp
! __ swpa(Assembler::word, r15, r21, r3); // swpa w15, w21, [x3]
! __ ldadda(Assembler::word, r24, r8, r25); // ldadda w24, w8, [x25]
! __ ldbica(Assembler::word, r20, r16, r17); // ldclra w20, w16, [x17]
! __ ldeora(Assembler::word, r2, r1, r0); // ldeora w2, w1, [x0]
! __ ldorra(Assembler::word, r24, r4, r3); // ldseta w24, w4, [x3]
! __ ldsmina(Assembler::word, r12, zr, r28); // ldsmina w12, wzr, [x28]
! __ ldsmaxa(Assembler::word, r10, r26, r2); // ldsmaxa w10, w26, [x2]
! __ ldumina(Assembler::word, r12, r18, sp); // ldumina w12, w18, [sp]
! __ ldumaxa(Assembler::word, r1, r13, r29); // ldumaxa w1, w13, [x29]
// LSEOp
! __ swpal(Assembler::word, r0, r19, r12); // swpal w0, w19, [x12]
! __ ldaddal(Assembler::word, r17, r22, r13); // ldaddal w17, w22, [x13]
! __ ldbical(Assembler::word, r28, r30, sp); // ldclral w28, w30, [sp]
! __ ldeoral(Assembler::word, r1, r26, r28); // ldeoral w1, w26, [x28]
! __ ldorral(Assembler::word, r4, r30, r4); // ldsetal w4, w30, [x4]
! __ ldsminal(Assembler::word, r6, r30, r26); // ldsminal w6, w30, [x26]
! __ ldsmaxal(Assembler::word, r18, r9, r8); // ldsmaxal w18, w9, [x8]
! __ lduminal(Assembler::word, r12, r0, r20); // lduminal w12, w0, [x20]
! __ ldumaxal(Assembler::word, r1, r24, r2); // ldumaxal w1, w24, [x2]
// LSEOp
! __ swpl(Assembler::word, r0, r9, r24); // swpl w0, w9, [x24]
! __ ldaddl(Assembler::word, r26, r16, r30); // ldaddl w26, w16, [x30]
! __ ldbicl(Assembler::word, r3, r10, r23); // ldclrl w3, w10, [x23]
! __ ldeorl(Assembler::word, r10, r4, r18); // ldeorl w10, w4, [x18]
! __ ldorrl(Assembler::word, r2, r11, r8); // ldsetl w2, w11, [x8]
! __ ldsminl(Assembler::word, r10, r15, r17); // ldsminl w10, w15, [x17]
! __ ldsmaxl(Assembler::word, r2, r10, r12); // ldsmaxl w2, w10, [x12]
! __ lduminl(Assembler::word, r12, r15, r13); // lduminl w12, w15, [x13]
! __ ldumaxl(Assembler::word, r2, r7, r20); // ldumaxl w2, w7, [x20]
__ bind(forth);
/*
aarch64ops.o: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <back>:
! 0: 8b0d82fa add x26, x23, x13, lsl #32
! 4: cb49970c sub x12, x24, x9, lsr #37
! 8: ab889dfc adds x28, x15, x8, asr #39
! c: eb9ee787 subs x7, x28, x30, asr #57
! 10: 0b9b3ec9 add w9, w22, w27, asr #15
! 14: 4b9279a3 sub w3, w13, w18, asr #30
! 18: 2b88474e adds w14, w26, w8, asr #17
! 1c: 6b8c56c0 subs w0, w22, w12, asr #21
! 20: 8a1a51e0 and x0, x15, x26, lsl #20
! 24: aa11f4ba orr x26, x5, x17, lsl #61
! 28: ca0281b8 eor x24, x13, x2, lsl #32
! 2c: ea918c7c ands x28, x3, x17, asr #35
! 30: 0a5d4a19 and w25, w16, w29, lsr #18
! 34: 2a4b264d orr w13, w18, w11, lsr #9
! 38: 4a523ca5 eor w5, w5, w18, lsr #15
! 3c: 6a9b6ae2 ands w2, w23, w27, asr #26
! 40: 8a70b79b bic x27, x28, x16, lsr #45
! 44: aaba9728 orn x8, x25, x26, asr #37
! 48: ca6dfe3d eon x29, x17, x13, lsr #63
! 4c: ea627f1c bics x28, x24, x2, lsr #31
! 50: 0aa70f53 bic w19, w26, w7, asr #3
! 54: 2aaa0f06 orn w6, w24, w10, asr #3
! 58: 4a6176a4 eon w4, w21, w1, lsr #29
! 5c: 6a604eb0 bics w16, w21, w0, lsr #19
! 60: 1105ed91 add w17, w12, #0x17b
! 64: 3100583e adds w30, w1, #0x16
! 68: 5101f8bd sub w29, w5, #0x7e
! 6c: 710f0306 subs w6, w24, #0x3c0
! 70: 9101a1a0 add x0, x13, #0x68
! 74: b10a5cc8 adds x8, x6, #0x297
! 78: d10810aa sub x10, x5, #0x204
! 7c: f10fd061 subs x1, x3, #0x3f4
! 80: 120cb166 and w6, w11, #0xfff1fff1
! 84: 321764bc orr w28, w5, #0xfffffe07
! 88: 52174681 eor w1, w20, #0x7fffe00
! 8c: 720c0247 ands w7, w18, #0x100000
! 90: 9241018e and x14, x12, #0x8000000000000000
! 94: b25a2969 orr x9, x11, #0x1ffc000000000
! 98: d278b411 eor x17, x0, #0x3fffffffffff00
! 9c: f26aad01 ands x1, x8, #0xffffffffffc00003
a0: 14000000 b a0 <back+0xa0>
a4: 17ffffd7 b 0 <back>
! a8: 140001f2 b 870 <forth>
ac: 94000000 bl ac <back+0xac>
b0: 97ffffd4 bl 0 <back>
! b4: 940001ef bl 870 <forth>
! b8: 3400000a cbz w10, b8 <back+0xb8>
! bc: 34fffa2a cbz w10, 0 <back>
! c0: 34003d8a cbz w10, 870 <forth>
! c4: 35000008 cbnz w8, c4 <back+0xc4>
! c8: 35fff9c8 cbnz w8, 0 <back>
! cc: 35003d28 cbnz w8, 870 <forth>
! d0: b400000b cbz x11, d0 <back+0xd0>
! d4: b4fff96b cbz x11, 0 <back>
! d8: b4003ccb cbz x11, 870 <forth>
! dc: b500001d cbnz x29, dc <back+0xdc>
! e0: b5fff91d cbnz x29, 0 <back>
! e4: b5003c7d cbnz x29, 870 <forth>
! e8: 10000013 adr x19, e8 <back+0xe8>
! ec: 10fff8b3 adr x19, 0 <back>
! f0: 10003c13 adr x19, 870 <forth>
! f4: 90000013 adrp x19, 0 <back>
! f8: 36300016 tbz w22, #6, f8 <back+0xf8>
! fc: 3637f836 tbz w22, #6, 0 <back>
! 100: 36303b96 tbz w22, #6, 870 <forth>
! 104: 3758000c tbnz w12, #11, 104 <back+0x104>
! 108: 375ff7cc tbnz w12, #11, 0 <back>
! 10c: 37583b2c tbnz w12, #11, 870 <forth>
! 110: 128313a0 mov w0, #0xffffe762 // #-6302
! 114: 528a32c7 mov w7, #0x5196 // #20886
! 118: 7289173b movk w27, #0x48b9
! 11c: 92ab3acc mov x12, #0xffffffffa629ffff // #-1507196929
! 120: d2a0bf94 mov x20, #0x5fc0000 // #100401152
! 124: f2c285e8 movk x8, #0x142f, lsl #32
! 128: 9358722f sbfx x15, x17, #24, #5
! 12c: 330e652f bfxil w15, w9, #14, #12
! 130: 53067f3b lsr w27, w25, #6
! 134: 93577c53 sbfx x19, x2, #23, #9
! 138: b34a1aac bfi x12, x21, #54, #7
! 13c: d35a4016 ubfiz x22, x0, #38, #17
! 140: 13946c63 extr w3, w3, w20, #27
! 144: 93c3dbc8 extr x8, x30, x3, #54
! 148: 54000000 b.eq 148 <back+0x148> // b.none
! 14c: 54fff5a0 b.eq 0 <back> // b.none
! 150: 54003900 b.eq 870 <forth> // b.none
! 154: 54000001 b.ne 154 <back+0x154> // b.any
! 158: 54fff541 b.ne 0 <back> // b.any
! 15c: 540038a1 b.ne 870 <forth> // b.any
! 160: 54000002 b.cs 160 <back+0x160> // b.hs, b.nlast
! 164: 54fff4e2 b.cs 0 <back> // b.hs, b.nlast
! 168: 54003842 b.cs 870 <forth> // b.hs, b.nlast
! 16c: 54000002 b.cs 16c <back+0x16c> // b.hs, b.nlast
! 170: 54fff482 b.cs 0 <back> // b.hs, b.nlast
! 174: 540037e2 b.cs 870 <forth> // b.hs, b.nlast
! 178: 54000003 b.cc 178 <back+0x178> // b.lo, b.ul, b.last
! 17c: 54fff423 b.cc 0 <back> // b.lo, b.ul, b.last
! 180: 54003783 b.cc 870 <forth> // b.lo, b.ul, b.last
! 184: 54000003 b.cc 184 <back+0x184> // b.lo, b.ul, b.last
! 188: 54fff3c3 b.cc 0 <back> // b.lo, b.ul, b.last
! 18c: 54003723 b.cc 870 <forth> // b.lo, b.ul, b.last
! 190: 54000004 b.mi 190 <back+0x190> // b.first
! 194: 54fff364 b.mi 0 <back> // b.first
! 198: 540036c4 b.mi 870 <forth> // b.first
! 19c: 54000005 b.pl 19c <back+0x19c> // b.nfrst
! 1a0: 54fff305 b.pl 0 <back> // b.nfrst
! 1a4: 54003665 b.pl 870 <forth> // b.nfrst
1a8: 54000006 b.vs 1a8 <back+0x1a8>
1ac: 54fff2a6 b.vs 0 <back>
! 1b0: 54003606 b.vs 870 <forth>
1b4: 54000007 b.vc 1b4 <back+0x1b4>
1b8: 54fff247 b.vc 0 <back>
! 1bc: 540035a7 b.vc 870 <forth>
! 1c0: 54000008 b.hi 1c0 <back+0x1c0> // b.pmore
! 1c4: 54fff1e8 b.hi 0 <back> // b.pmore
! 1c8: 54003548 b.hi 870 <forth> // b.pmore
! 1cc: 54000009 b.ls 1cc <back+0x1cc> // b.plast
! 1d0: 54fff189 b.ls 0 <back> // b.plast
! 1d4: 540034e9 b.ls 870 <forth> // b.plast
! 1d8: 5400000a b.ge 1d8 <back+0x1d8> // b.tcont
! 1dc: 54fff12a b.ge 0 <back> // b.tcont
! 1e0: 5400348a b.ge 870 <forth> // b.tcont
! 1e4: 5400000b b.lt 1e4 <back+0x1e4> // b.tstop
! 1e8: 54fff0cb b.lt 0 <back> // b.tstop
! 1ec: 5400342b b.lt 870 <forth> // b.tstop
1f0: 5400000c b.gt 1f0 <back+0x1f0>
1f4: 54fff06c b.gt 0 <back>
! 1f8: 540033cc b.gt 870 <forth>
1fc: 5400000d b.le 1fc <back+0x1fc>
200: 54fff00d b.le 0 <back>
! 204: 5400336d b.le 870 <forth>
208: 5400000e b.al 208 <back+0x208>
20c: 54ffefae b.al 0 <back>
! 210: 5400330e b.al 870 <forth>
214: 5400000f b.nv 214 <back+0x214>
218: 54ffef4f b.nv 0 <back>
! 21c: 540032af b.nv 870 <forth>
! 220: d40658e1 svc #0x32c7
! 224: d4014d22 hvc #0xa69
! 228: d4046543 smc #0x232a
! 22c: d4273f60 brk #0x39fb
! 230: d44cad80 hlt #0x656c
234: d503201f nop
238: d69f03e0 eret
23c: d6bf03e0 drps
240: d5033fdf isb
! 244: d5033e9f dsb st
! 248: d50332bf dmb oshst
! 24c: d61f0200 br x16
! 250: d63f0280 blr x20
! 254: c80a7d1b stxr w10, x27, [x8]
! 258: c800fea1 stlxr w0, x1, [x21]
! 25c: c85f7fb1 ldxr x17, [x29]
! 260: c85fff9d ldaxr x29, [x28]
! 264: c89ffee1 stlr x1, [x23]
! 268: c8dffe95 ldar x21, [x20]
! 26c: 88167e7b stxr w22, w27, [x19]
! 270: 880bfcd0 stlxr w11, w16, [x6]
! 274: 885f7c12 ldxr w18, [x0]
! 278: 885ffd44 ldaxr w4, [x10]
! 27c: 889ffed8 stlr w24, [x22]
! 280: 88dffe6a ldar w10, [x19]
! 284: 48017fc5 stxrh w1, w5, [x30]
! 288: 4808fe2c stlxrh w8, w12, [x17]
! 28c: 485f7dc9 ldxrh w9, [x14]
! 290: 485ffc27 ldaxrh w7, [x1]
! 294: 489ffe05 stlrh w5, [x16]
! 298: 48dffd82 ldarh w2, [x12]
! 29c: 080a7c6c stxrb w10, w12, [x3]
! 2a0: 081cff4e stlxrb w28, w14, [x26]
! 2a4: 085f7d5e ldxrb w30, [x10]
! 2a8: 085ffeae ldaxrb w14, [x21]
! 2ac: 089ffd2d stlrb w13, [x9]
! 2b0: 08dfff76 ldarb w22, [x27]
! 2b4: c87f4d7c ldxp x28, x19, [x11]
! 2b8: c87fcc5e ldaxp x30, x19, [x2]
! 2bc: c8220417 stxp w2, x23, x1, [x0]
! 2c0: c82cb5f0 stlxp w12, x16, x13, [x15]
! 2c4: 887f55b2 ldxp w18, w21, [x13]
! 2c8: 887ff90b ldaxp w11, w30, [x8]
! 2cc: 88382c2d stxp w24, w13, w11, [x1]
! 2d0: 883aedb5 stlxp w26, w21, w27, [x13]
! 2d4: f819928b stur x11, [x20, #-103]
! 2d8: b803e21c stur w28, [x16, #62]
! 2dc: 381f713b sturb w27, [x9, #-9]
! 2e0: 781ce322 sturh w2, [x25, #-50]
! 2e4: f850f044 ldur x4, [x2, #-241]
! 2e8: b85e129e ldur w30, [x20, #-31]
! 2ec: 385e92f2 ldurb w18, [x23, #-23]
! 2f0: 785ff35d ldurh w29, [x26, #-1]
! 2f4: 39801921 ldrsb x1, [x9, #6]
! 2f8: 7881318b ldursh x11, [x12, #19]
! 2fc: 78dce02b ldursh w11, [x1, #-50]
! 300: b8829313 ldursw x19, [x24, #41]
! 304: fc45f318 ldur d24, [x24, #95]
! 308: bc5d50af ldur s15, [x5, #-43]
! 30c: fc001375 stur d21, [x27, #1]
! 310: bc1951b7 stur s23, [x13, #-107]
! 314: f8008c0b str x11, [x0, #8]!
! 318: b801dc03 str w3, [x0, #29]!
! 31c: 38009dcb strb w11, [x14, #9]!
! 320: 781fdf1d strh w29, [x24, #-3]!
! 324: f8570e2d ldr x13, [x17, #-144]!
! 328: b85faecc ldr w12, [x22, #-6]!
! 32c: 385f6d8d ldrb w13, [x12, #-10]!
! 330: 785ebea0 ldrh w0, [x21, #-21]!
! 334: 38804cf7 ldrsb x23, [x7, #4]!
! 338: 789cbce3 ldrsh x3, [x7, #-53]!
! 33c: 78df9cbc ldrsh w28, [x5, #-7]!
! 340: b89eed38 ldrsw x24, [x9, #-18]!
! 344: fc40cd6e ldr d14, [x11, #12]!
! 348: bc5bdd93 ldr s19, [x12, #-67]!
! 34c: fc103c14 str d20, [x0, #-253]!
! 350: bc040c08 str s8, [x0, #64]!
! 354: f81a2784 str x4, [x28], #-94
! 358: b81ca4ec str w12, [x7], #-54
! 35c: 381e855b strb w27, [x10], #-24
! 360: 7801b506 strh w6, [x8], #27
! 364: f853654e ldr x14, [x10], #-202
! 368: b85d74b0 ldr w16, [x5], #-41
! 36c: 384095c2 ldrb w2, [x14], #9
! 370: 785ec5bc ldrh w28, [x13], #-20
! 374: 389e15a9 ldrsb x9, [x13], #-31
! 378: 789dc703 ldrsh x3, [x24], #-36
! 37c: 78c06474 ldrsh w20, [x3], #6
! 380: b89ff667 ldrsw x7, [x19], #-1
! 384: fc57e51e ldr d30, [x8], #-130
! 388: bc4155f9 ldr s25, [x15], #21
! 38c: fc05a6ee str d14, [x23], #90
! 390: bc1df408 str s8, [x0], #-33
! 394: f835da4a str x10, [x18, w21, sxtw #3]
! 398: b836d9a4 str w4, [x13, w22, sxtw #2]
! 39c: 3833580d strb w13, [x0, w19, uxtw #0]
! 3a0: 7826cb6c strh w12, [x27, w6, sxtw]
! 3a4: f8706900 ldr x0, [x8, x16]
! 3a8: b87ae880 ldr w0, [x4, x26, sxtx]
! 3ac: 3865db2e ldrb w14, [x25, w5, sxtw #0]
! 3b0: 78724889 ldrh w9, [x4, w18, uxtw]
! 3b4: 38a7789b ldrsb x27, [x4, x7, lsl #0]
! 3b8: 78beca2f ldrsh x15, [x17, w30, sxtw]
! 3bc: 78f6c810 ldrsh w16, [x0, w22, sxtw]
! 3c0: b8bef956 ldrsw x22, [x10, x30, sxtx #2]
! 3c4: fc6afabd ldr d29, [x21, x10, sxtx #3]
! 3c8: bc734963 ldr s3, [x11, w19, uxtw]
! 3cc: fc3d5b8d str d13, [x28, w29, uxtw #3]
! 3d0: bc25fbb7 str s23, [x29, x5, sxtx #2]
! 3d4: f9189d05 str x5, [x8, #12600]
! 3d8: b91ecb1d str w29, [x24, #7880]
! 3dc: 39187a33 strb w19, [x17, #1566]
! 3e0: 791f226d strh w13, [x19, #3984]
! 3e4: f95aa2f3 ldr x19, [x23, #13632]
! 3e8: b9587bb7 ldr w23, [x29, #6264]
! 3ec: 395f7176 ldrb w22, [x11, #2012]
! 3f0: 795d9143 ldrh w3, [x10, #3784]
! 3f4: 399e7e08 ldrsb x8, [x16, #1951]
! 3f8: 799a2697 ldrsh x23, [x20, #3346]
! 3fc: 79df3422 ldrsh w2, [x1, #3994]
! 400: b99c2624 ldrsw x4, [x17, #7204]
! 404: fd5c2374 ldr d20, [x27, #14400]
! 408: bd5fa1d9 ldr s25, [x14, #8096]
! 40c: fd1d595a str d26, [x10, #15024]
! 410: bd1b1869 str s9, [x3, #6936]
! 414: 580022fb ldr x27, 870 <forth>
! 418: 1800000b ldr w11, 418 <back+0x418>
! 41c: f8945060 prfum pldl1keep, [x3, #-187]
! 420: d8000000 prfm pldl1keep, 420 <back+0x420>
! 424: f8ae6ba0 prfm pldl1keep, [x29, x14]
! 428: f99a0080 prfm pldl1keep, [x4, #13312]
! 42c: 1a070035 adc w21, w1, w7
! 430: 3a0700a8 adcs w8, w5, w7
! 434: 5a0e0367 sbc w7, w27, w14
! 438: 7a11009b sbcs w27, w4, w17
! 43c: 9a000380 adc x0, x28, x0
! 440: ba1e030c adcs x12, x24, x30
! 444: da0f0320 sbc x0, x25, x15
! 448: fa030301 sbcs x1, x24, x3
! 44c: 0b340b12 add w18, w24, w20, uxtb #2
! 450: 2b2a278d adds w13, w28, w10, uxth #1
! 454: cb22aa0f sub x15, x16, w2, sxth #2
! 458: 6b2d29bd subs w29, w13, w13, uxth #2
! 45c: 8b2cce8c add x12, x20, w12, sxtw #3
! 460: ab2b877e adds x30, x27, w11, sxtb #1
! 464: cb21c8ee sub x14, x7, w1, sxtw #2
! 468: eb3ba47d subs x29, x3, w27, sxth #1
! 46c: 3a4d400e ccmn w0, w13, #0xe, mi // mi = first
! 470: 7a5232c6 ccmp w22, w18, #0x6, cc // cc = lo, ul, last
! 474: ba5e624e ccmn x18, x30, #0xe, vs
! 478: fa53814c ccmp x10, x19, #0xc, hi // hi = pmore
! 47c: 3a52d8c2 ccmn w6, #0x12, #0x2, le
! 480: 7a4d8924 ccmp w9, #0xd, #0x4, hi // hi = pmore
! 484: ba4b3aab ccmn x21, #0xb, #0xb, cc // cc = lo, ul, last
! 488: fa4d7882 ccmp x4, #0xd, #0x2, vc
! 48c: 1a96804c csel w12, w2, w22, hi // hi = pmore
! 490: 1a912618 csinc w24, w16, w17, cs // cs = hs, nlast
! 494: 5a90b0e6 csinv w6, w7, w16, lt // lt = tstop
! 498: 5a96976b csneg w11, w27, w22, ls // ls = plast
! 49c: 9a9db06a csel x10, x3, x29, lt // lt = tstop
! 4a0: 9a9b374c csinc x12, x26, x27, cc // cc = lo, ul, last
! 4a4: da95c14f csinv x15, x10, x21, gt
! 4a8: da89c6fe csneg x30, x23, x9, gt
! 4ac: 5ac0015e rbit w30, w10
! 4b0: 5ac005fd rev16 w29, w15
! 4b4: 5ac00bdd rev w29, w30
! 4b8: 5ac012b9 clz w25, w21
! 4bc: 5ac01404 cls w4, w0
! 4c0: dac002b2 rbit x18, x21
! 4c4: dac0061d rev16 x29, x16
! 4c8: dac00a95 rev32 x21, x20
! 4cc: dac00e66 rev x6, x19
! 4d0: dac0107e clz x30, x3
! 4d4: dac01675 cls x21, x19
! 4d8: 1ac00b0b udiv w11, w24, w0
! 4dc: 1ace0f3b sdiv w27, w25, w14
! 4e0: 1ad221c3 lsl w3, w14, w18
! 4e4: 1ad825e7 lsr w7, w15, w24
! 4e8: 1ad92a3c asr w28, w17, w25
! 4ec: 1adc2f42 ror w2, w26, w28
! 4f0: 9ada0b25 udiv x5, x25, x26
! 4f4: 9ad20e1b sdiv x27, x16, x18
! 4f8: 9acc22a6 lsl x6, x21, x12
! 4fc: 9acc2480 lsr x0, x4, x12
! 500: 9adc2a3b asr x27, x17, x28
! 504: 9ad22c5c ror x28, x2, x18
! 508: 9bce7dea umulh x10, x15, x14
! 50c: 9b597c6e smulh x14, x3, x25
! 510: 1b0e166f madd w15, w19, w14, w5
! 514: 1b1ae490 msub w16, w4, w26, w25
! 518: 9b023044 madd x4, x2, x2, x12
! 51c: 9b089e3d msub x29, x17, x8, x7
! 520: 9b391083 smaddl x3, w4, w25, x4
! 524: 9b24c73a smsubl x26, w25, w4, x17
! 528: 9bb15f40 umaddl x0, w26, w17, x23
! 52c: 9bbcc6af umsubl x15, w21, w28, x17
! 530: 1e23095b fmul s27, s10, s3
! 534: 1e3918e0 fdiv s0, s7, s25
! 538: 1e2f28c9 fadd s9, s6, s15
! 53c: 1e2a39fd fsub s29, s15, s10
! 540: 1e270a22 fmul s2, s17, s7
! 544: 1e77096b fmul d11, d11, d23
! 548: 1e771ba7 fdiv d7, d29, d23
! 54c: 1e6b2b6e fadd d14, d27, d11
! 550: 1e78388b fsub d11, d4, d24
! 554: 1e6e09ec fmul d12, d15, d14
! 558: 1f1c3574 fmadd s20, s11, s28, s13
! 55c: 1f17f98b fmsub s11, s12, s23, s30
! 560: 1f2935da fnmadd s26, s14, s9, s13
! 564: 1f2574ea fnmadd s10, s7, s5, s29
! 568: 1f4b306f fmadd d15, d3, d11, d12
! 56c: 1f5ec7cf fmsub d15, d30, d30, d17
! 570: 1f6f3e93 fnmadd d19, d20, d15, d15
! 574: 1f6226a9 fnmadd d9, d21, d2, d9
! 578: 1e2040fb fmov s27, s7
! 57c: 1e20c3dd fabs s29, s30
! 580: 1e214031 fneg s17, s1
! 584: 1e21c0c2 fsqrt s2, s6
! 588: 1e22c06a fcvt d10, s3
! 58c: 1e604178 fmov d24, d11
! 590: 1e60c027 fabs d7, d1
! 594: 1e61400b fneg d11, d0
! 598: 1e61c243 fsqrt d3, d18
! 59c: 1e6240dc fcvt s28, d6
! 5a0: 1e3800d6 fcvtzs w22, s6
! 5a4: 9e380360 fcvtzs x0, s27
! 5a8: 1e78005a fcvtzs w26, d2
! 5ac: 9e7800e5 fcvtzs x5, d7
! 5b0: 1e22017c scvtf s28, w11
! 5b4: 9e2201b9 scvtf s25, x13
! 5b8: 1e6202eb scvtf d11, w23
! 5bc: 9e620113 scvtf d19, x8
! 5c0: 1e2602b2 fmov w18, s21
! 5c4: 9e660299 fmov x25, d20
! 5c8: 1e270253 fmov s19, w18
! 5cc: 9e6703a2 fmov d2, x29
! 5d0: 1e2822c0 fcmp s22, s8
! 5d4: 1e7322a0 fcmp d21, d19
! 5d8: 1e202288 fcmp s20, #0.0
! 5dc: 1e602168 fcmp d11, #0.0
! 5e0: 293c19f4 stp w20, w6, [x15, #-32]
! 5e4: 2966387b ldp w27, w14, [x3, #-208]
! 5e8: 69762971 ldpsw x17, x10, [x11, #-80]
! 5ec: a9041dc7 stp x7, x7, [x14, #64]
! 5f0: a9475c0c ldp x12, x23, [x0, #112]
! 5f4: 29b61ccd stp w13, w7, [x6, #-80]!
! 5f8: 29ee405e ldp w30, w16, [x2, #-144]!
! 5fc: 69ee0744 ldpsw x4, x1, [x26, #-144]!
! 600: a9843977 stp x23, x14, [x11, #64]!
! 604: a9f46ebd ldp x29, x27, [x21, #-192]!
! 608: 28ba16b6 stp w22, w5, [x21], #-48
! 60c: 28fc44db ldp w27, w17, [x6], #-32
! 610: 68f61831 ldpsw x17, x6, [x1], #-80
! 614: a8b352ad stp x13, x20, [x21], #-208
! 618: a8c56d5e ldp x30, x27, [x10], #80
! 61c: 28024565 stnp w5, w17, [x11, #16]
! 620: 2874134e ldnp w14, w4, [x26, #-96]
! 624: a8027597 stnp x23, x29, [x12, #32]
! 628: a87b1aa0 ldnp x0, x6, [x21, #-80]
! 62c: 0c40734f ld1 {v15.8b}, [x26]
! 630: 4cdfa177 ld1 {v23.16b, v24.16b}, [x11], #32
! 634: 0cc76ee8 ld1 {v8.1d-v10.1d}, [x23], x7
! 638: 4cdf2733 ld1 {v19.8h-v22.8h}, [x25], #64
! 63c: 0d40c23d ld1r {v29.8b}, [x17]
! 640: 4ddfcaf8 ld1r {v24.4s}, [x23], #4
! 644: 0dd9ccaa ld1r {v10.1d}, [x5], x25
! 648: 4c408d52 ld2 {v18.2d, v19.2d}, [x10]
! 64c: 0cdf85ec ld2 {v12.4h, v13.4h}, [x15], #16
! 650: 4d60c259 ld2r {v25.16b, v26.16b}, [x18]
! 654: 0dffcbc1 ld2r {v1.2s, v2.2s}, [x30], #8
! 658: 4de9ce50 ld2r {v16.2d, v17.2d}, [x18], x9
! 65c: 4cc24999 ld3 {v25.4s-v27.4s}, [x12], x2
! 660: 0c404a7a ld3 {v26.2s-v28.2s}, [x19]
! 664: 4d40e6af ld3r {v15.8h-v17.8h}, [x21]
! 668: 4ddfe9b9 ld3r {v25.4s-v27.4s}, [x13], #12
! 66c: 0dddef8e ld3r {v14.1d-v16.1d}, [x28], x29
! 670: 4cdf07b1 ld4 {v17.8h-v20.8h}, [x29], #64
! 674: 0cc000fb ld4 {v27.8b-v30.8b}, [x7], x0
! 678: 0d60e258 ld4r {v24.8b-v27.8b}, [x18]
! 67c: 0dffe740 ld4r {v0.4h-v3.4h}, [x26], #8
! 680: 0de2eb2c ld4r {v12.2s-v15.2s}, [x25], x2
! 684: ce648376 sha512h q22, q27, v4.2d
! 688: ce6184c7 sha512h2 q7, q6, v1.2d
! 68c: cec081fa sha512su0 v26.2d, v15.2d
! 690: ce6d89a2 sha512su1 v2.2d, v13.2d, v13.2d
! 694: ba5fd3e3 ccmn xzr, xzr, #0x3, le
! 698: 3a5f03e5 ccmn wzr, wzr, #0x5, eq // eq = none
! 69c: fa411be4 ccmp xzr, #0x1, #0x4, ne // ne = any
! 6a0: 7a42cbe2 ccmp wzr, #0x2, #0x2, gt
! 6a4: 93df03ff ror xzr, xzr, #0
! 6a8: c820ffff stlxp w0, xzr, xzr, [sp]
! 6ac: 8822fc7f stlxp w2, wzr, wzr, [x3]
! 6b0: c8247cbf stxp w4, xzr, xzr, [x5]
! 6b4: 88267fff stxp w6, wzr, wzr, [sp]
! 6b8: 4e010fe0 dup v0.16b, wzr
! 6bc: 4e081fe1 mov v1.d[0], xzr
! 6c0: 4e0c1fe1 mov v1.s[1], wzr
! 6c4: 4e0a1fe1 mov v1.h[2], wzr
! 6c8: 4e071fe1 mov v1.b[3], wzr
! 6cc: 4cc0ac3f ld1 {v31.2d, v0.2d}, [x1], x0
! 6d0: 1e601000 fmov d0, #2.000000000000000000e+00
! 6d4: 1e603000 fmov d0, #2.125000000000000000e+00
! 6d8: 1e621000 fmov d0, #4.000000000000000000e+00
! 6dc: 1e623000 fmov d0, #4.250000000000000000e+00
! 6e0: 1e641000 fmov d0, #8.000000000000000000e+00
! 6e4: 1e643000 fmov d0, #8.500000000000000000e+00
! 6e8: 1e661000 fmov d0, #1.600000000000000000e+01
! 6ec: 1e663000 fmov d0, #1.700000000000000000e+01
! 6f0: 1e681000 fmov d0, #1.250000000000000000e-01
! 6f4: 1e683000 fmov d0, #1.328125000000000000e-01
! 6f8: 1e6a1000 fmov d0, #2.500000000000000000e-01
! 6fc: 1e6a3000 fmov d0, #2.656250000000000000e-01
! 700: 1e6c1000 fmov d0, #5.000000000000000000e-01
! 704: 1e6c3000 fmov d0, #5.312500000000000000e-01
! 708: 1e6e1000 fmov d0, #1.000000000000000000e+00
! 70c: 1e6e3000 fmov d0, #1.062500000000000000e+00
! 710: 1e701000 fmov d0, #-2.000000000000000000e+00
! 714: 1e703000 fmov d0, #-2.125000000000000000e+00
! 718: 1e721000 fmov d0, #-4.000000000000000000e+00
! 71c: 1e723000 fmov d0, #-4.250000000000000000e+00
! 720: 1e741000 fmov d0, #-8.000000000000000000e+00
! 724: 1e743000 fmov d0, #-8.500000000000000000e+00
! 728: 1e761000 fmov d0, #-1.600000000000000000e+01
! 72c: 1e763000 fmov d0, #-1.700000000000000000e+01
! 730: 1e781000 fmov d0, #-1.250000000000000000e-01
! 734: 1e783000 fmov d0, #-1.328125000000000000e-01
! 738: 1e7a1000 fmov d0, #-2.500000000000000000e-01
! 73c: 1e7a3000 fmov d0, #-2.656250000000000000e-01
! 740: 1e7c1000 fmov d0, #-5.000000000000000000e-01
! 744: 1e7c3000 fmov d0, #-5.312500000000000000e-01
! 748: 1e7e1000 fmov d0, #-1.000000000000000000e+00
! 74c: 1e7e3000 fmov d0, #-1.062500000000000000e+00
! 750: f8388098 swp x24, x24, [x4]
! 754: f8340010 ldadd x20, x16, [x0]
! 758: f8241175 ldclr x4, x21, [x11]
! 75c: f83e22d0 ldeor x30, x16, [x22]
! 760: f82432ef ldset x4, x15, [x23]
! 764: f83a5186 ldsmin x26, x6, [x12]
! 768: f82f41ee ldsmax x15, x14, [x15]
! 76c: f82973b9 ldumin x9, x25, [x29]
! 770: f82b6194 ldumax x11, x20, [x12]
! 774: f8b28216 swpa x18, x22, [x16]
! 778: f8b50358 ldadda x21, x24, [x26]
! 77c: f8a61206 ldclra x6, x6, [x16]
! 780: f8b02219 ldeora x16, x25, [x16]
! 784: f8bc3218 ldseta x28, x24, [x16]
! 788: f8ba514f ldsmina x26, x15, [x10]
! 78c: f8ad428e ldsmaxa x13, x14, [x20]
! 790: f8a173d7 ldumina x1, x23, [x30]
! 794: f8ae60c2 ldumaxa x14, x2, [x6]
! 798: f8e38328 swpal x3, x8, [x25]
! 79c: f8e003db ldaddal x0, x27, [x30]
! 7a0: f8e513c5 ldclral x5, x5, [x30]
! 7a4: f8eb2019 ldeoral x11, x25, [x0]
! 7a8: f8ff3260 ldsetal xzr, x0, [x19]
! 7ac: f8fd513a ldsminal x29, x26, [x9]
! 7b0: f8fa41ec ldsmaxal x26, x12, [x15]
! 7b4: f8eb724b lduminal x11, x11, [x18]
! 7b8: f8f96316 ldumaxal x25, x22, [x24]
! 7bc: f8608171 swpl x0, x17, [x11]
! 7c0: f86600dd ldaddl x6, x29, [x6]
! 7c4: f86512a5 ldclrl x5, x5, [x21]
! 7c8: f8732250 ldeorl x19, x16, [x18]
! 7cc: f87e339b ldsetl x30, x27, [x28]
! 7d0: f861503c ldsminl x1, x28, [x1]
! 7d4: f874421d ldsmaxl x20, x29, [x16]
! 7d8: f86d73aa lduminl x13, x10, [x29]
! 7dc: f87d62d3 ldumaxl x29, x19, [x22]
! 7e0: b82a83e4 swp w10, w4, [sp]
! 7e4: b83503e8 ldadd w21, w8, [sp]
! 7e8: b833138a ldclr w19, w10, [x28]
! 7ec: b82220b9 ldeor w2, w25, [x5]
! 7f0: b82332c8 ldset w3, w8, [x22]
! 7f4: b83350ad ldsmin w19, w13, [x5]
! 7f8: b83d42b8 ldsmax w29, w24, [x21]
! 7fc: b83a7078 ldumin w26, w24, [x3]
! 800: b83862fa ldumax w24, w26, [x23]
! 804: b8af8075 swpa w15, w21, [x3]
! 808: b8b80328 ldadda w24, w8, [x25]
! 80c: b8b41230 ldclra w20, w16, [x17]
! 810: b8a22001 ldeora w2, w1, [x0]
! 814: b8b83064 ldseta w24, w4, [x3]
! 818: b8ac539f ldsmina w12, wzr, [x28]
! 81c: b8aa405a ldsmaxa w10, w26, [x2]
! 820: b8ac73f2 ldumina w12, w18, [sp]
! 824: b8a163ad ldumaxa w1, w13, [x29]
! 828: b8e08193 swpal w0, w19, [x12]
! 82c: b8f101b6 ldaddal w17, w22, [x13]
! 830: b8fc13fe ldclral w28, w30, [sp]
! 834: b8e1239a ldeoral w1, w26, [x28]
! 838: b8e4309e ldsetal w4, w30, [x4]
! 83c: b8e6535e ldsminal w6, w30, [x26]
! 840: b8f24109 ldsmaxal w18, w9, [x8]
! 844: b8ec7280 lduminal w12, w0, [x20]
! 848: b8e16058 ldumaxal w1, w24, [x2]
! 84c: b8608309 swpl w0, w9, [x24]
! 850: b87a03d0 ldaddl w26, w16, [x30]
! 854: b86312ea ldclrl w3, w10, [x23]
! 858: b86a2244 ldeorl w10, w4, [x18]
! 85c: b862310b ldsetl w2, w11, [x8]
! 860: b86a522f ldsminl w10, w15, [x17]
! 864: b862418a ldsmaxl w2, w10, [x12]
! 868: b86c71af lduminl w12, w15, [x13]
! 86c: b8626287 ldumaxl w2, w7, [x20]
*/
static const unsigned int insns[] =
{
! 0x8b0d82fa, 0xcb49970c, 0xab889dfc, 0xeb9ee787,
! 0x0b9b3ec9, 0x4b9279a3, 0x2b88474e, 0x6b8c56c0,
! 0x8a1a51e0, 0xaa11f4ba, 0xca0281b8, 0xea918c7c,
! 0x0a5d4a19, 0x2a4b264d, 0x4a523ca5, 0x6a9b6ae2,
! 0x8a70b79b, 0xaaba9728, 0xca6dfe3d, 0xea627f1c,
! 0x0aa70f53, 0x2aaa0f06, 0x4a6176a4, 0x6a604eb0,
! 0x1105ed91, 0x3100583e, 0x5101f8bd, 0x710f0306,
! 0x9101a1a0, 0xb10a5cc8, 0xd10810aa, 0xf10fd061,
! 0x120cb166, 0x321764bc, 0x52174681, 0x720c0247,
! 0x9241018e, 0xb25a2969, 0xd278b411, 0xf26aad01,
! 0x14000000, 0x17ffffd7, 0x140001f2, 0x94000000,
! 0x97ffffd4, 0x940001ef, 0x3400000a, 0x34fffa2a,
! 0x34003d8a, 0x35000008, 0x35fff9c8, 0x35003d28,
! 0xb400000b, 0xb4fff96b, 0xb4003ccb, 0xb500001d,
! 0xb5fff91d, 0xb5003c7d, 0x10000013, 0x10fff8b3,
! 0x10003c13, 0x90000013, 0x36300016, 0x3637f836,
! 0x36303b96, 0x3758000c, 0x375ff7cc, 0x37583b2c,
! 0x128313a0, 0x528a32c7, 0x7289173b, 0x92ab3acc,
! 0xd2a0bf94, 0xf2c285e8, 0x9358722f, 0x330e652f,
! 0x53067f3b, 0x93577c53, 0xb34a1aac, 0xd35a4016,
! 0x13946c63, 0x93c3dbc8, 0x54000000, 0x54fff5a0,
! 0x54003900, 0x54000001, 0x54fff541, 0x540038a1,
! 0x54000002, 0x54fff4e2, 0x54003842, 0x54000002,
! 0x54fff482, 0x540037e2, 0x54000003, 0x54fff423,
! 0x54003783, 0x54000003, 0x54fff3c3, 0x54003723,
! 0x54000004, 0x54fff364, 0x540036c4, 0x54000005,
! 0x54fff305, 0x54003665, 0x54000006, 0x54fff2a6,
! 0x54003606, 0x54000007, 0x54fff247, 0x540035a7,
! 0x54000008, 0x54fff1e8, 0x54003548, 0x54000009,
! 0x54fff189, 0x540034e9, 0x5400000a, 0x54fff12a,
! 0x5400348a, 0x5400000b, 0x54fff0cb, 0x5400342b,
! 0x5400000c, 0x54fff06c, 0x540033cc, 0x5400000d,
! 0x54fff00d, 0x5400336d, 0x5400000e, 0x54ffefae,
! 0x5400330e, 0x5400000f, 0x54ffef4f, 0x540032af,
! 0xd40658e1, 0xd4014d22, 0xd4046543, 0xd4273f60,
! 0xd44cad80, 0xd503201f, 0xd69f03e0, 0xd6bf03e0,
! 0xd5033fdf, 0xd5033e9f, 0xd50332bf, 0xd61f0200,
! 0xd63f0280, 0xc80a7d1b, 0xc800fea1, 0xc85f7fb1,
! 0xc85fff9d, 0xc89ffee1, 0xc8dffe95, 0x88167e7b,
! 0x880bfcd0, 0x885f7c12, 0x885ffd44, 0x889ffed8,
! 0x88dffe6a, 0x48017fc5, 0x4808fe2c, 0x485f7dc9,
! 0x485ffc27, 0x489ffe05, 0x48dffd82, 0x080a7c6c,
! 0x081cff4e, 0x085f7d5e, 0x085ffeae, 0x089ffd2d,
! 0x08dfff76, 0xc87f4d7c, 0xc87fcc5e, 0xc8220417,
! 0xc82cb5f0, 0x887f55b2, 0x887ff90b, 0x88382c2d,
! 0x883aedb5, 0xf819928b, 0xb803e21c, 0x381f713b,
! 0x781ce322, 0xf850f044, 0xb85e129e, 0x385e92f2,
! 0x785ff35d, 0x39801921, 0x7881318b, 0x78dce02b,
! 0xb8829313, 0xfc45f318, 0xbc5d50af, 0xfc001375,
! 0xbc1951b7, 0xf8008c0b, 0xb801dc03, 0x38009dcb,
! 0x781fdf1d, 0xf8570e2d, 0xb85faecc, 0x385f6d8d,
! 0x785ebea0, 0x38804cf7, 0x789cbce3, 0x78df9cbc,
! 0xb89eed38, 0xfc40cd6e, 0xbc5bdd93, 0xfc103c14,
! 0xbc040c08, 0xf81a2784, 0xb81ca4ec, 0x381e855b,
! 0x7801b506, 0xf853654e, 0xb85d74b0, 0x384095c2,
! 0x785ec5bc, 0x389e15a9, 0x789dc703, 0x78c06474,
! 0xb89ff667, 0xfc57e51e, 0xbc4155f9, 0xfc05a6ee,
! 0xbc1df408, 0xf835da4a, 0xb836d9a4, 0x3833580d,
! 0x7826cb6c, 0xf8706900, 0xb87ae880, 0x3865db2e,
! 0x78724889, 0x38a7789b, 0x78beca2f, 0x78f6c810,
! 0xb8bef956, 0xfc6afabd, 0xbc734963, 0xfc3d5b8d,
! 0xbc25fbb7, 0xf9189d05, 0xb91ecb1d, 0x39187a33,
! 0x791f226d, 0xf95aa2f3, 0xb9587bb7, 0x395f7176,
! 0x795d9143, 0x399e7e08, 0x799a2697, 0x79df3422,
! 0xb99c2624, 0xfd5c2374, 0xbd5fa1d9, 0xfd1d595a,
! 0xbd1b1869, 0x580022fb, 0x1800000b, 0xf8945060,
! 0xd8000000, 0xf8ae6ba0, 0xf99a0080, 0x1a070035,
! 0x3a0700a8, 0x5a0e0367, 0x7a11009b, 0x9a000380,
! 0xba1e030c, 0xda0f0320, 0xfa030301, 0x0b340b12,
! 0x2b2a278d, 0xcb22aa0f, 0x6b2d29bd, 0x8b2cce8c,
! 0xab2b877e, 0xcb21c8ee, 0xeb3ba47d, 0x3a4d400e,
! 0x7a5232c6, 0xba5e624e, 0xfa53814c, 0x3a52d8c2,
! 0x7a4d8924, 0xba4b3aab, 0xfa4d7882, 0x1a96804c,
! 0x1a912618, 0x5a90b0e6, 0x5a96976b, 0x9a9db06a,
! 0x9a9b374c, 0xda95c14f, 0xda89c6fe, 0x5ac0015e,
! 0x5ac005fd, 0x5ac00bdd, 0x5ac012b9, 0x5ac01404,
! 0xdac002b2, 0xdac0061d, 0xdac00a95, 0xdac00e66,
! 0xdac0107e, 0xdac01675, 0x1ac00b0b, 0x1ace0f3b,
! 0x1ad221c3, 0x1ad825e7, 0x1ad92a3c, 0x1adc2f42,
! 0x9ada0b25, 0x9ad20e1b, 0x9acc22a6, 0x9acc2480,
! 0x9adc2a3b, 0x9ad22c5c, 0x9bce7dea, 0x9b597c6e,
! 0x1b0e166f, 0x1b1ae490, 0x9b023044, 0x9b089e3d,
! 0x9b391083, 0x9b24c73a, 0x9bb15f40, 0x9bbcc6af,
! 0x1e23095b, 0x1e3918e0, 0x1e2f28c9, 0x1e2a39fd,
! 0x1e270a22, 0x1e77096b, 0x1e771ba7, 0x1e6b2b6e,
! 0x1e78388b, 0x1e6e09ec, 0x1f1c3574, 0x1f17f98b,
! 0x1f2935da, 0x1f2574ea, 0x1f4b306f, 0x1f5ec7cf,
! 0x1f6f3e93, 0x1f6226a9, 0x1e2040fb, 0x1e20c3dd,
! 0x1e214031, 0x1e21c0c2, 0x1e22c06a, 0x1e604178,
! 0x1e60c027, 0x1e61400b, 0x1e61c243, 0x1e6240dc,
! 0x1e3800d6, 0x9e380360, 0x1e78005a, 0x9e7800e5,
! 0x1e22017c, 0x9e2201b9, 0x1e6202eb, 0x9e620113,
! 0x1e2602b2, 0x9e660299, 0x1e270253, 0x9e6703a2,
! 0x1e2822c0, 0x1e7322a0, 0x1e202288, 0x1e602168,
! 0x293c19f4, 0x2966387b, 0x69762971, 0xa9041dc7,
! 0xa9475c0c, 0x29b61ccd, 0x29ee405e, 0x69ee0744,
! 0xa9843977, 0xa9f46ebd, 0x28ba16b6, 0x28fc44db,
! 0x68f61831, 0xa8b352ad, 0xa8c56d5e, 0x28024565,
! 0x2874134e, 0xa8027597, 0xa87b1aa0, 0x0c40734f,
! 0x4cdfa177, 0x0cc76ee8, 0x4cdf2733, 0x0d40c23d,
! 0x4ddfcaf8, 0x0dd9ccaa, 0x4c408d52, 0x0cdf85ec,
! 0x4d60c259, 0x0dffcbc1, 0x4de9ce50, 0x4cc24999,
! 0x0c404a7a, 0x4d40e6af, 0x4ddfe9b9, 0x0dddef8e,
! 0x4cdf07b1, 0x0cc000fb, 0x0d60e258, 0x0dffe740,
! 0x0de2eb2c, 0xce648376, 0xce6184c7, 0xcec081fa,
! 0xce6d89a2, 0xba5fd3e3, 0x3a5f03e5, 0xfa411be4,
0x7a42cbe2, 0x93df03ff, 0xc820ffff, 0x8822fc7f,
0xc8247cbf, 0x88267fff, 0x4e010fe0, 0x4e081fe1,
0x4e0c1fe1, 0x4e0a1fe1, 0x4e071fe1, 0x4cc0ac3f,
0x1e601000, 0x1e603000, 0x1e621000, 0x1e623000,
0x1e641000, 0x1e643000, 0x1e661000, 0x1e663000,
--- 664,1414 ----
__ fmovd(v0, -0.53125); // fmov d0, #-0.53125
__ fmovd(v0, -1.0); // fmov d0, #-1.0
__ fmovd(v0, -1.0625); // fmov d0, #-1.0625
// LSEOp
! __ swp(Assembler::xword, r26, r3, r6); // swp x26, x3, [x6]
! __ ldadd(Assembler::xword, r20, r12, r4); // ldadd x20, x12, [x4]
! __ ldbic(Assembler::xword, r23, r4, r11); // ldclr x23, x4, [x11]
! __ ldeor(Assembler::xword, r15, r15, r24); // ldeor x15, x15, [x24]
! __ ldorr(Assembler::xword, r29, r2, r17); // ldset x29, x2, [x17]
! __ ldsmin(Assembler::xword, r25, r5, r1); // ldsmin x25, x5, [x1]
! __ ldsmax(Assembler::xword, r15, r15, r7); // ldsmax x15, x15, [x7]
! __ ldumin(Assembler::xword, r28, zr, r29); // ldumin x28, xzr, [x29]
! __ ldumax(Assembler::xword, r17, r17, sp); // ldumax x17, x17, [sp]
// LSEOp
! __ swpa(Assembler::xword, r7, r16, r21); // swpa x7, x16, [x21]
! __ ldadda(Assembler::xword, r17, r10, r20); // ldadda x17, x10, [x20]
! __ ldbica(Assembler::xword, r25, r14, r29); // ldclra x25, x14, [x29]
! __ ldeora(Assembler::xword, r25, r13, r3); // ldeora x25, x13, [x3]
! __ ldorra(Assembler::xword, r13, r7, r28); // ldseta x13, x7, [x28]
! __ ldsmina(Assembler::xword, r20, r25, r7); // ldsmina x20, x25, [x7]
! __ ldsmaxa(Assembler::xword, r21, r4, r2); // ldsmaxa x21, x4, [x2]
! __ ldumina(Assembler::xword, r8, r5, r8); // ldumina x8, x5, [x8]
! __ ldumaxa(Assembler::xword, r10, r12, r6); // ldumaxa x10, x12, [x6]
// LSEOp
! __ swpal(Assembler::xword, r25, r12, r10); // swpal x25, x12, [x10]
! __ ldaddal(Assembler::xword, r12, r1, r4); // ldaddal x12, x1, [x4]
! __ ldbical(Assembler::xword, r26, r6, r12); // ldclral x26, x6, [x12]
! __ ldeoral(Assembler::xword, r1, r14, r12); // ldeoral x1, x14, [x12]
! __ ldorral(Assembler::xword, r22, r6, r21); // ldsetal x22, x6, [x21]
! __ ldsminal(Assembler::xword, r15, r4, r6); // ldsminal x15, x4, [x6]
! __ ldsmaxal(Assembler::xword, r24, r16, r7); // ldsmaxal x24, x16, [x7]
! __ lduminal(Assembler::xword, r5, r3, r11); // lduminal x5, x3, [x11]
! __ ldumaxal(Assembler::xword, r22, r2, r25); // ldumaxal x22, x2, [x25]
// LSEOp
! __ swpl(Assembler::xword, r6, r29, r0); // swpl x6, x29, [x0]
! __ ldaddl(Assembler::xword, r26, r6, r23); // ldaddl x26, x6, [x23]
! __ ldbicl(Assembler::xword, r4, r7, r9); // ldclrl x4, x7, [x9]
! __ ldeorl(Assembler::xword, r6, r11, r1); // ldeorl x6, x11, [x1]
! __ ldorrl(Assembler::xword, r11, r13, r29); // ldsetl x11, x13, [x29]
! __ ldsminl(Assembler::xword, r11, r3, r6); // ldsminl x11, x3, [x6]
! __ ldsmaxl(Assembler::xword, r21, r0, r11); // ldsmaxl x21, x0, [x11]
! __ lduminl(Assembler::xword, r11, r23, r9); // lduminl x11, x23, [x9]
! __ ldumaxl(Assembler::xword, r17, r16, r16); // ldumaxl x17, x16, [x16]
// LSEOp
! __ swp(Assembler::word, r21, r5, sp); // swp w21, w5, [sp]
! __ ldadd(Assembler::word, r24, r11, r4); // ldadd w24, w11, [x4]
! __ ldbic(Assembler::word, r17, r29, r4); // ldclr w17, w29, [x4]
! __ ldeor(Assembler::word, r15, r11, r15); // ldeor w15, w11, [x15]
! __ ldorr(Assembler::word, r27, r26, r11); // ldset w27, w26, [x11]
! __ ldsmin(Assembler::word, r27, r12, r8); // ldsmin w27, w12, [x8]
! __ ldsmax(Assembler::word, r6, r20, r1); // ldsmax w6, w20, [x1]
! __ ldumin(Assembler::word, r14, r16, r29); // ldumin w14, w16, [x29]
! __ ldumax(Assembler::word, r24, r13, r26); // ldumax w24, w13, [x26]
// LSEOp
! __ swpa(Assembler::word, r4, r2, r11); // swpa w4, w2, [x11]
! __ ldadda(Assembler::word, r20, r29, r4); // ldadda w20, w29, [x4]
! __ ldbica(Assembler::word, r20, zr, r29); // ldclra w20, wzr, [x29]
! __ ldeora(Assembler::word, r0, r15, r25); // ldeora w0, w15, [x25]
! __ ldorra(Assembler::word, r23, r5, r20); // ldseta w23, w5, [x20]
! __ ldsmina(Assembler::word, r29, r26, r19); // ldsmina w29, w26, [x19]
! __ ldsmaxa(Assembler::word, r21, r20, r22); // ldsmaxa w21, w20, [x22]
! __ ldumina(Assembler::word, r26, r21, r16); // ldumina w26, w21, [x16]
! __ ldumaxa(Assembler::word, r8, r21, r10); // ldumaxa w8, w21, [x10]
// LSEOp
! __ swpal(Assembler::word, r27, r11, r11); // swpal w27, w11, [x11]
! __ ldaddal(Assembler::word, r5, r8, r28); // ldaddal w5, w8, [x28]
! __ ldbical(Assembler::word, r0, r5, r5); // ldclral w0, w5, [x5]
! __ ldeoral(Assembler::word, r2, r10, r24); // ldeoral w2, w10, [x24]
! __ ldorral(Assembler::word, r13, zr, sp); // ldsetal w13, wzr, [sp]
! __ ldsminal(Assembler::word, r26, r25, r24); // ldsminal w26, w25, [x24]
! __ ldsmaxal(Assembler::word, r8, r5, r6); // ldsmaxal w8, w5, [x6]
! __ lduminal(Assembler::word, r5, r27, r27); // lduminal w5, w27, [x27]
! __ ldumaxal(Assembler::word, r23, r20, r23); // ldumaxal w23, w20, [x23]
// LSEOp
! __ swpl(Assembler::word, r25, r3, r28); // swpl w25, w3, [x28]
! __ ldaddl(Assembler::word, r10, r8, r13); // ldaddl w10, w8, [x13]
! __ ldbicl(Assembler::word, r21, r11, sp); // ldclrl w21, w11, [sp]
! __ ldeorl(Assembler::word, zr, r3, r28); // ldeorl wzr, w3, [x28]
! __ ldorrl(Assembler::word, r15, r0, r24); // ldsetl w15, w0, [x24]
! __ ldsminl(Assembler::word, r4, r9, r29); // ldsminl w4, w9, [x29]
! __ ldsmaxl(Assembler::word, r8, r6, r21); // ldsmaxl w8, w6, [x21]
! __ lduminl(Assembler::word, r9, r22, r3); // lduminl w9, w22, [x3]
! __ ldumaxl(Assembler::word, r26, r10, r28); // ldumaxl w26, w10, [x28]
__ bind(forth);
/*
aarch64ops.o: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <back>:
! 0: 8b1ad014 add x20, x0, x26, lsl #52
! 4: cb83db85 sub x5, x28, x3, asr #54
! 8: ab839ecb adds x11, x22, x3, asr #39
! c: eb4c646b subs x11, x3, x12, lsr #25
! 10: 0b0d399b add w27, w12, w13, lsl #14
! 14: 4b9b1eaa sub w10, w21, w27, asr #7
! 18: 2b1011c3 adds w3, w14, w16, lsl #4
! 1c: 6b1d1661 subs w1, w19, w29, lsl #5
! 20: 8a5b1a30 and x16, x17, x27, lsr #6
! 24: aa1c8f96 orr x22, x28, x28, lsl #35
! 28: ca5ccd4b eor x11, x10, x28, lsr #51
! 2c: ea8ec10d ands x13, x8, x14, asr #48
! 30: 0a410c61 and w1, w3, w1, lsr #3
! 34: 2a855909 orr w9, w8, w5, asr #22
! 38: 4a9b4f82 eor w2, w28, w27, asr #19
! 3c: 6a073938 ands w24, w9, w7, lsl #14
! 40: 8ab9826b bic x11, x19, x25, asr #32
! 44: aa3d7318 orn x24, x24, x29, lsl #28
! 48: cab16e0b eon x11, x16, x17, asr #27
! 4c: ea6ae9a5 bics x5, x13, x10, lsr #58
! 50: 0a357545 bic w5, w10, w21, lsl #29
! 54: 2a354d64 orn w4, w11, w21, lsl #19
! 58: 4a7c3f95 eon w21, w28, w28, lsr #15
! 5c: 6a2e7146 bics w6, w10, w14, lsl #28
! 60: 110ec6ca add w10, w22, #0x3b1
! 64: 310e9d6f adds w15, w11, #0x3a7
! 68: 510afcc5 sub w5, w6, #0x2bf
! 6c: 7108e013 subs w19, w0, #0x238
! 70: 91098114 add x20, x8, #0x260
! 74: b10434d0 adds x16, x6, #0x10d
! 78: d10db417 sub x23, x0, #0x36d
! 7c: f10c873a subs x26, x25, #0x321
! 80: 120d6a0c and w12, w16, #0xfff83fff
! 84: 32066b01 orr w1, w24, #0xfc1fffff
! 88: 52112073 eor w19, w3, #0xff8000
! 8c: 720a553d ands w29, w9, #0xffc00fff
! 90: 9263d0ba and x26, x5, #0xffffffffe003ffff
! 94: b20da1d8 orr x24, x14, #0xff80ff80ff80ff8
! 98: d26ec404 eor x4, x0, #0xfffffffffffc000f
! 9c: f26e28dc ands x28, x6, #0x1ffc0000
a0: 14000000 b a0 <back+0xa0>
a4: 17ffffd7 b 0 <back>
! a8: 140001ee b 860 <forth>
ac: 94000000 bl ac <back+0xac>
b0: 97ffffd4 bl 0 <back>
! b4: 940001eb bl 860 <forth>
! b8: 34000015 cbz w21, b8 <back+0xb8>
! bc: 34fffa35 cbz w21, 0 <back>
! c0: 34003d15 cbz w21, 860 <forth>
! c4: 3500000c cbnz w12, c4 <back+0xc4>
! c8: 35fff9cc cbnz w12, 0 <back>
! cc: 35003cac cbnz w12, 860 <forth>
! d0: b400000e cbz x14, d0 <back+0xd0>
! d4: b4fff96e cbz x14, 0 <back>
! d8: b4003c4e cbz x14, 860 <forth>
! dc: b500001b cbnz x27, dc <back+0xdc>
! e0: b5fff91b cbnz x27, 0 <back>
! e4: b5003bfb cbnz x27, 860 <forth>
! e8: 1000000e adr x14, e8 <back+0xe8>
! ec: 10fff8ae adr x14, 0 <back>
! f0: 10003b8e adr x14, 860 <forth>
! f4: 90000016 adrp x22, 0 <back>
! f8: 36280000 tbz w0, #5, f8 <back+0xf8>
! fc: 362ff820 tbz w0, #5, 0 <back>
! 100: 36283b00 tbz w0, #5, 860 <forth>
! 104: 37580003 tbnz w3, #11, 104 <back+0x104>
! 108: 375ff7c3 tbnz w3, #11, 0 <back>
! 10c: 37583aa3 tbnz w3, #11, 860 <forth>
! 110: 12835753 mov w19, #0xffffe545 // #-6843
! 114: 52a2da7c mov w28, #0x16d30000 // #382926848
! 118: 72a9ef0d movk w13, #0x4f78, lsl #16
! 11c: 92c097e1 mov x1, #0xfffffb40ffffffff // #-5218385264641
! 120: d28e0a7a mov x26, #0x7053 // #28755
! 124: f2e2d05b movk x27, #0x1682, lsl #48
! 128: 93496301 sbfx x1, x24, #9, #16
! 12c: 33054019 bfxil w25, w0, #5, #12
! 130: 530f1f70 ubfiz w16, w27, #17, #8
! 134: 934f71d0 sbfx x16, x14, #15, #14
! 138: b3403558 bfxil x24, x10, #0, #14
! 13c: d34259c1 ubfx x1, x14, #2, #21
! 140: 1381540a extr w10, w0, w1, #21
! 144: 93d7f75a extr x26, x26, x23, #61
! 148: 54000000 b.eq 148 <back+0x148>
! 14c: 54fff5a0 b.eq 0 <back>
! 150: 54003880 b.eq 860 <forth>
! 154: 54000001 b.ne 154 <back+0x154>
! 158: 54fff541 b.ne 0 <back>
! 15c: 54003821 b.ne 860 <forth>
! 160: 54000002 b.cs 160 <back+0x160>
! 164: 54fff4e2 b.cs 0 <back>
! 168: 540037c2 b.cs 860 <forth>
! 16c: 54000002 b.cs 16c <back+0x16c>
! 170: 54fff482 b.cs 0 <back>
! 174: 54003762 b.cs 860 <forth>
! 178: 54000003 b.cc 178 <back+0x178>
! 17c: 54fff423 b.cc 0 <back>
! 180: 54003703 b.cc 860 <forth>
! 184: 54000003 b.cc 184 <back+0x184>
! 188: 54fff3c3 b.cc 0 <back>
! 18c: 540036a3 b.cc 860 <forth>
! 190: 54000004 b.mi 190 <back+0x190>
! 194: 54fff364 b.mi 0 <back>
! 198: 54003644 b.mi 860 <forth>
! 19c: 54000005 b.pl 19c <back+0x19c>
! 1a0: 54fff305 b.pl 0 <back>
! 1a4: 540035e5 b.pl 860 <forth>
1a8: 54000006 b.vs 1a8 <back+0x1a8>
1ac: 54fff2a6 b.vs 0 <back>
! 1b0: 54003586 b.vs 860 <forth>
1b4: 54000007 b.vc 1b4 <back+0x1b4>
1b8: 54fff247 b.vc 0 <back>
! 1bc: 54003527 b.vc 860 <forth>
! 1c0: 54000008 b.hi 1c0 <back+0x1c0>
! 1c4: 54fff1e8 b.hi 0 <back>
! 1c8: 540034c8 b.hi 860 <forth>
! 1cc: 54000009 b.ls 1cc <back+0x1cc>
! 1d0: 54fff189 b.ls 0 <back>
! 1d4: 54003469 b.ls 860 <forth>
! 1d8: 5400000a b.ge 1d8 <back+0x1d8>
! 1dc: 54fff12a b.ge 0 <back>
! 1e0: 5400340a b.ge 860 <forth>
! 1e4: 5400000b b.lt 1e4 <back+0x1e4>
! 1e8: 54fff0cb b.lt 0 <back>
! 1ec: 540033ab b.lt 860 <forth>
1f0: 5400000c b.gt 1f0 <back+0x1f0>
1f4: 54fff06c b.gt 0 <back>
! 1f8: 5400334c b.gt 860 <forth>
1fc: 5400000d b.le 1fc <back+0x1fc>
200: 54fff00d b.le 0 <back>
! 204: 540032ed b.le 860 <forth>
208: 5400000e b.al 208 <back+0x208>
20c: 54ffefae b.al 0 <back>
! 210: 5400328e b.al 860 <forth>
214: 5400000f b.nv 214 <back+0x214>
218: 54ffef4f b.nv 0 <back>
! 21c: 5400322f b.nv 860 <forth>
! 220: d4079461 svc #0x3ca3
! 224: d4018ee2 hvc #0xc77
! 228: d408d7c3 smc #0x46be
! 22c: d4216040 brk #0xb02
! 230: d44a2f80 hlt #0x517c
234: d503201f nop
238: d69f03e0 eret
23c: d6bf03e0 drps
240: d5033fdf isb
! 244: d503329f dsb oshst
! 248: d50339bf dmb ishld
! 24c: d61f0140 br x10
! 250: d63f02c0 blr x22
! 254: c8037cb5 stxr w3, x21, [x5]
! 258: c81cffa9 stlxr w28, x9, [x29]
! 25c: c85f7cfc ldxr x28, [x7]
! 260: c85ffeea ldaxr x10, [x23]
! 264: c89fff47 stlr x7, [x26]
! 268: c8dffef0 ldar x16, [x23]
! 26c: 880b7d87 stxr w11, w7, [x12]
! 270: 8810ff4d stlxr w16, w13, [x26]
! 274: 885f7eb9 ldxr w25, [x21]
! 278: 885ffc8e ldaxr w14, [x4]
! 27c: 889ffd3a stlr w26, [x9]
! 280: 88dffee0 ldar w0, [x23]
! 284: 48087d40 stxrh w8, w0, [x10]
! 288: 480bfc81 stlxrh w11, w1, [x4]
! 28c: 485f7f4e ldxrh w14, [x26]
! 290: 485ffcf3 ldaxrh w19, [x7]
! 294: 489ffed1 stlrh w17, [x22]
! 298: 48dffcd4 ldarh w20, [x6]
! 29c: 08197cc8 stxrb w25, w8, [x6]
! 2a0: 0805ff2a stlxrb w5, w10, [x25]
! 2a4: 085f7ec0 ldxrb w0, [x22]
! 2a8: 085ffc68 ldaxrb w8, [x3]
! 2ac: 089ffc45 stlrb w5, [x2]
! 2b0: 08dfff86 ldarb w6, [x28]
! 2b4: c87f21d1 ldxp x17, x8, [x14]
! 2b8: c87f8c4e ldaxp x14, x3, [x2]
! 2bc: c8391271 stxp w25, x17, x4, [x19]
! 2c0: c82abd10 stlxp w10, x16, x15, [x8]
! 2c4: 887f2c61 ldxp w1, w11, [x3]
! 2c8: 887fed80 ldaxp w0, w27, [x12]
! 2cc: 882457b4 stxp w4, w20, w21, [x29]
! 2d0: 882097a9 stlxp w0, w9, w5, [x29]
! 2d4: f811d091 stur x17, [x4,#-227]
! 2d8: b81df086 stur w6, [x4,#-33]
! 2dc: 39002e0d strb w13, [x16,#11]
! 2e0: 781c02d7 sturh w23, [x22,#-64]
! 2e4: f840d062 ldur x2, [x3,#13]
! 2e8: b8423285 ldur w5, [x20,#35]
! 2ec: 385f1142 ldurb w2, [x10,#-15]
! 2f0: 785f8017 ldurh w23, [x0,#-8]
! 2f4: 389fd1cf ldursb x15, [x14,#-3]
! 2f8: 789f4063 ldursh x3, [x3,#-12]
! 2fc: 78df9319 ldursh w25, [x24,#-7]
! 300: b89e3011 ldursw x17, [x0,#-29]
! 304: fc5b1127 ldur d7, [x9,#-79]
! 308: bc5bc16b ldur s11, [x11,#-68]
! 30c: fc189050 stur d16, [x2,#-119]
! 310: bc184399 stur s25, [x28,#-124]
! 314: f8052e7c str x28, [x19,#82]!
! 318: b8032da7 str w7, [x13,#50]!
! 31c: 381e0e62 strb w2, [x19,#-32]!
! 320: 781c6c38 strh w24, [x1,#-58]!
! 324: f8571fb7 ldr x23, [x29,#-143]!
! 328: b8400f6d ldr w13, [x27,#0]!
! 32c: 385e6d4b ldrb w11, [x10,#-26]!
! 330: 785cacc3 ldrh w3, [x6,#-54]!
! 334: 38803d22 ldrsb x2, [x9,#3]!
! 338: 7881ec9c ldrsh x28, [x4,#30]!
! 33c: 78de9c11 ldrsh w17, [x0,#-23]!
! 340: b898bf3d ldrsw x29, [x25,#-117]!
! 344: fc572d55 ldr d21, [x10,#-142]!
! 348: bc423e8b ldr s11, [x20,#35]!
! 34c: fc12ade1 str d1, [x15,#-214]!
! 350: bc1c9cb3 str s19, [x5,#-55]!
! 354: f81ec63c str x28, [x17],#-20
! 358: b81f75a8 str w8, [x13],#-9
! 35c: 381e970e strb w14, [x24],#-23
! 360: 781c4482 strh w2, [x4],#-60
! 364: f8422738 ldr x24, [x25],#34
! 368: b85e5790 ldr w16, [x28],#-27
! 36c: 385e56e8 ldrb w8, [x23],#-27
! 370: 785c6403 ldrh w3, [x0],#-58
! 374: 389f65ee ldrsb x14, [x15],#-10
! 378: 7880d42c ldrsh x12, [x1],#13
! 37c: 78ded429 ldrsh w9, [x1],#-19
! 380: b89c355d ldrsw x29, [x10],#-61
! 384: fc5f778d ldr d13, [x28],#-9
! 388: bc5a8774 ldr s20, [x27],#-88
! 38c: fc139567 str d7, [x11],#-199
! 390: bc1c36d4 str s20, [x22],#-61
! 394: f830c943 str x3, [x10,w16,sxtw]
! 398: b8357ba1 str w1, [x29,x21,lsl #2]
! 39c: 3837581a strb w26, [x0,w23,uxtw #0]
! 3a0: 7835681a strh w26, [x0,x21]
! 3a4: f8766b23 ldr x3, [x25,x22]
! 3a8: b8785939 ldr w25, [x9,w24,uxtw #2]
! 3ac: 386ed80a ldrb w10, [x0,w14,sxtw #0]
! 3b0: 78747aa2 ldrh w2, [x21,x20,lsl #1]
! 3b4: 38bcfb73 ldrsb x19, [x27,x28,sxtx #0]
! 3b8: 78a37901 ldrsh x1, [x8,x3,lsl #1]
! 3bc: 78f0e9f4 ldrsh w20, [x15,x16,sxtx]
! 3c0: b8ac78e7 ldrsw x7, [x7,x12,lsl #2]
! 3c4: fc6dd88f ldr d15, [x4,w13,sxtw #3]
! 3c8: bc63494e ldr s14, [x10,w3,uxtw]
! 3cc: fc29faf8 str d24, [x23,x9,sxtx #3]
! 3d0: bc3a5989 str s9, [x12,w26,uxtw #2]
! 3d4: f91a530e str x14, [x24,#13472]
! 3d8: b91ce1c0 str w0, [x14,#7392]
! 3dc: 39180277 strb w23, [x19,#1536]
! 3e0: 791c316f strh w15, [x11,#3608]
! 3e4: f95ab735 ldr x21, [x25,#13672]
! 3e8: b95810f7 ldr w23, [x7,#6160]
! 3ec: 395ede17 ldrb w23, [x16,#1975]
! 3f0: 795e1718 ldrh w24, [x24,#3850]
! 3f4: 3999352c ldrsb x12, [x9,#1613]
! 3f8: 799e02a5 ldrsh x5, [x21,#3840]
! 3fc: 79dc0c0e ldrsh w14, [x0,#3590]
! 400: b99ef84d ldrsw x13, [x2,#7928]
! 404: fd5ede6f ldr d15, [x19,#15800]
! 408: bd5880b7 ldr s23, [x5,#6272]
! 40c: fd1d90c6 str d6, [x6,#15136]
! 410: bd182569 str s9, [x11,#6180]
! 414: 58002267 ldr x7, 860 <forth>
! 418: 1800001d ldr w29, 418 <back+0x418>
! 41c: f8929000 prfum pldl1keep, [x0,#-215]
! 420: d8002200 prfm pldl1keep, 860 <forth>
! 424: f8a34880 prfm pldl1keep, [x4,w3,uxtw]
! 428: f99825c0 prfm pldl1keep, [x14,#12360]
! 42c: 1a0400c7 adc w7, w6, w4
! 430: 3a05019b adcs w27, w12, w5
! 434: 5a1a0319 sbc w25, w24, w26
! 438: 7a1700e5 sbcs w5, w7, w23
! 43c: 9a010176 adc x22, x11, x1
! 440: ba1d012d adcs x13, x9, x29
! 444: da1a01c4 sbc x4, x14, x26
! 448: fa1803bc sbcs x28, x29, x24
! 44c: 0b3546b1 add w17, w21, w21, uxtw #1
! 450: 2b3aad2c adds w12, w9, w26, sxth #3
! 454: cb2324ae sub x14, x5, w3, uxth #1
! 458: 6b267351 subs w17, w26, w6, uxtx #4
! 45c: 8b34acb1 add x17, x5, w20, sxth #3
! 460: ab39cc30 adds x16, x1, w25, sxtw #3
! 464: cb3aec39 sub x25, x1, x26, sxtx #3
! 468: eb37ac33 subs x19, x1, w23, sxth #3
! 46c: 3a589029 ccmn w1, w24, #0x9, ls
! 470: 7a4ac1c4 ccmp w14, w10, #0x4, gt
! 474: ba5d3120 ccmn x9, x29, #0x0, cc
! 478: fa4640cd ccmp x6, x6, #0xd, mi
! 47c: 3a4b1a65 ccmn w19, #0xb, #0x5, ne
! 480: 7a5fa96f ccmp w11, #0x1f, #0xf, ge
! 484: ba4e6985 ccmn x12, #0xe, #0x5, vs
! 488: fa47482a ccmp x1, #0x7, #0xa, mi
! 48c: 1a963046 csel w6, w2, w22, cc
! 490: 1a9a66dd csinc w29, w22, w26, vs
! 494: 5a8b933a csinv w26, w25, w11, ls
! 498: 5a90c5d3 csneg w19, w14, w16, gt
! 49c: 9a9422ad csel x13, x21, x20, cs
! 4a0: 9a9b856c csinc x12, x11, x27, hi
! 4a4: da93d223 csinv x3, x17, x19, le
! 4a8: da876438 csneg x24, x1, x7, vs
! 4ac: 5ac00037 rbit w23, w1
! 4b0: 5ac00610 rev16 w16, w16
! 4b4: 5ac00b38 rev w24, w25
! 4b8: 5ac01119 clz w25, w8
! 4bc: 5ac0159b cls w27, w12
! 4c0: dac000b5 rbit x21, x5
! 4c4: dac00534 rev16 x20, x9
! 4c8: dac00934 rev32 x20, x9
! 4cc: dac00d53 rev x19, x10
! 4d0: dac01048 clz x8, x2
! 4d4: dac0147d cls x29, x3
! 4d8: 1add08f3 udiv w19, w7, w29
! 4dc: 1aca0f7a sdiv w26, w27, w10
! 4e0: 1ad02300 lsl w0, w24, w16
! 4e4: 1ad82556 lsr w22, w10, w24
! 4e8: 1ad02b40 asr w0, w26, w16
! 4ec: 1acf2f3b ror w27, w25, w15
! 4f0: 9acf0b88 udiv x8, x28, x15
! 4f4: 9ac50d74 sdiv x20, x11, x5
! 4f8: 9ad02335 lsl x21, x25, x16
! 4fc: 9ace2447 lsr x7, x2, x14
! 500: 9ad62915 asr x21, x8, x22
! 504: 9acf2ca7 ror x7, x5, x15
! 508: 9bd67eac umulh x12, x21, x22
! 50c: 9b457d50 smulh x16, x10, x5
! 510: 1b1a54c2 madd w2, w6, w26, w21
! 514: 1b03ee7b msub w27, w19, w3, w27
! 518: 9b080cbb madd x27, x5, x8, x3
! 51c: 9b1cb5a8 msub x8, x13, x28, x13
! 520: 9b28013d smaddl x29, w9, w8, x0
! 524: 9b2edd2e smsubl x14, w9, w14, x23
! 528: 9bab348f umaddl x15, w4, w11, x13
! 52c: 9bb1e077 umsubl x23, w3, w17, x24
! 530: 1e31083d fmul s29, s1, s17
! 534: 1e291b97 fdiv s23, s28, s9
! 538: 1e2c2a6e fadd s14, s19, s12
! 53c: 1e203a3b fsub s27, s17, s0
! 540: 1e260b10 fmul s16, s24, s6
! 544: 1e6a0ae4 fmul d4, d23, d10
! 548: 1e77192b fdiv d11, d9, d23
! 54c: 1e6729e7 fadd d7, d15, d7
! 550: 1e6c3abd fsub d29, d21, d12
! 554: 1e69089b fmul d27, d4, d9
! 558: 1f0b65db fmadd s27, s14, s11, s25
! 55c: 1f0f8ecb fmsub s11, s22, s15, s3
! 560: 1f38136a fnmadd s10, s27, s24, s4
! 564: 1f2104c4 fnmadd s4, s6, s1, s1
! 568: 1f430b8d fmadd d13, d28, d3, d2
! 56c: 1f47eb1a fmsub d26, d24, d7, d26
! 570: 1f6c68b5 fnmadd d21, d5, d12, d26
! 574: 1f740e0b fnmadd d11, d16, d20, d3
! 578: 1e204225 fmov s5, s17
! 57c: 1e20c127 fabs s7, s9
! 580: 1e214039 fneg s25, s1
! 584: 1e21c0d8 fsqrt s24, s6
! 588: 1e22c23b fcvt d27, s17
! 58c: 1e604056 fmov d22, d2
! 590: 1e60c28e fabs d14, d20
! 594: 1e61417d fneg d29, d11
! 598: 1e61c19c fsqrt d28, d12
! 59c: 1e624064 fcvt s4, d3
! 5a0: 1e3801bc fcvtzs w28, s13
! 5a4: 9e380387 fcvtzs x7, s28
! 5a8: 1e7801ec fcvtzs w12, d15
! 5ac: 9e7800cb fcvtzs x11, d6
! 5b0: 1e2202d6 scvtf s22, w22
! 5b4: 9e220205 scvtf s5, x16
! 5b8: 1e6201e3 scvtf d3, w15
! 5bc: 9e620106 scvtf d6, x8
! 5c0: 1e2603ba fmov w26, s29
! 5c4: 9e660238 fmov x24, d17
! 5c8: 1e270262 fmov s2, w19
! 5cc: 9e6700b5 fmov d21, x5
! 5d0: 1e2822e0 fcmp s23, s8
! 5d4: 1e622180 fcmp d12, d2
! 5d8: 1e2021c8 fcmp s14, #0.0
! 5dc: 1e602148 fcmp d10, #0.0
! 5e0: 29344588 stp w8, w17, [x12,#-96]
! 5e4: 29685781 ldp w1, w21, [x28,#-192]
! 5e8: 69785a19 ldpsw x25, x22, [x16,#-64]
! 5ec: a93822e6 stp x6, x8, [x23,#-128]
! 5f0: a9794279 ldp x25, x16, [x19,#-112]
! 5f4: 29a26dbd stp w29, w27, [x13,#-240]!
! 5f8: 29fc52ac ldp w12, w20, [x21,#-32]!
! 5fc: 69ee3c80 ldpsw x0, x15, [x4,#-144]!
! 600: a988326d stp x13, x12, [x19,#128]!
! 604: a9c60939 ldp x25, x2, [x9,#96]!
! 608: 2890074b stp w11, w1, [x26],#128
! 60c: 28c4647a ldp w26, w25, [x3],#32
! 610: 68e2384a ldpsw x10, x14, [x2],#-240
! 614: a8880d41 stp x1, x3, [x10],#128
! 618: a8f73337 ldp x23, x12, [x25],#-144
! 61c: 28082325 stnp w5, w8, [x25,#64]
! 620: 28624ed4 ldnp w20, w19, [x22,#-240]
! 624: a8351dd7 stnp x23, x7, [x14,#-176]
! 628: a84472ae ldnp x14, x28, [x21,#64]
! 62c: 0c40708a ld1 {v10.8b}, [x4]
! 630: 4cdfa359 ld1 {v25.16b, v26.16b}, [x26], #32
! 634: 0cd76c9b ld1 {v27.1d-v29.1d}, [x4], x23
! 638: 4cdf24d0 ld1 {v16.8h-v19.8h}, [x6], #64
! 63c: 0d40c361 ld1r {v1.8b}, [x27]
! 640: 4ddfc844 ld1r {v4.4s}, [x2], #4
! 644: 0dcfcfb5 ld1r {v21.1d}, [x29], x15
! 648: 4c408ec1 ld2 {v1.2d, v2.2d}, [x22]
! 64c: 0cdf851d ld2 {v29.4h, v30.4h}, [x8], #16
! 650: 4d60c098 ld2r {v24.16b, v25.16b}, [x4]
! 654: 0dffca75 ld2r {v21.2s, v22.2s}, [x19], #8
! 658: 4de6cdad ld2r {v13.2d, v14.2d}, [x13], x6
! 65c: 4cd14881 ld3 {v1.4s-v3.4s}, [x4], x17
! 660: 0c404a36 ld3 {v22.2s-v24.2s}, [x17]
! 664: 4d40e631 ld3r {v17.8h-v19.8h}, [x17]
! 668: 4ddfeb88 ld3r {v8.4s-v10.4s}, [x28], #12
! 66c: 0dd3ec25 ld3r {v5.1d-v7.1d}, [x1], x19
! 670: 4cdf05e1 ld4 {v1.8h-v4.8h}, [x15], #64
! 674: 0cda00d1 ld4 {v17.8b-v20.8b}, [x6], x26
! 678: 0d60e0f9 ld4r {v25.8b-v28.8b}, [x7]
! 67c: 0dffe50c ld4r {v12.4h-v15.4h}, [x8], #8
! 680: 0de1e9a9 ld4r {v9.2s-v12.2s}, [x13], x1
! 684: ba5fd3e3 ccmn xzr, xzr, #0x3, le
! 688: 3a5f03e5 ccmn wzr, wzr, #0x5, eq
! 68c: fa411be4 ccmp xzr, #0x1, #0x4, ne
! 690: 7a42cbe2 ccmp wzr, #0x2, #0x2, gt
! 694: 93df03ff ror xzr, xzr, #0
! 698: c820ffff stlxp w0, xzr, xzr, [sp]
! 69c: 8822fc7f stlxp w2, wzr, wzr, [x3]
! 6a0: c8247cbf stxp w4, xzr, xzr, [x5]
! 6a4: 88267fff stxp w6, wzr, wzr, [sp]
! 6a8: 4e010fe0 dup v0.16b, wzr
! 6ac: 4e081fe1 mov v1.d[0], xzr
! 6b0: 4e0c1fe1 mov v1.s[1], wzr
! 6b4: 4e0a1fe1 mov v1.h[2], wzr
! 6b8: 4e071fe1 mov v1.b[3], wzr
! 6bc: 4cc0ac3f ld1 {v31.2d, v0.2d}, [x1], x0
! 6c0: 1e601000 fmov d0, #2.000000000000000000e+00
! 6c4: 1e603000 fmov d0, #2.125000000000000000e+00
! 6c8: 1e621000 fmov d0, #4.000000000000000000e+00
! 6cc: 1e623000 fmov d0, #4.250000000000000000e+00
! 6d0: 1e641000 fmov d0, #8.000000000000000000e+00
! 6d4: 1e643000 fmov d0, #8.500000000000000000e+00
! 6d8: 1e661000 fmov d0, #1.600000000000000000e+01
! 6dc: 1e663000 fmov d0, #1.700000000000000000e+01
! 6e0: 1e681000 fmov d0, #1.250000000000000000e-01
! 6e4: 1e683000 fmov d0, #1.328125000000000000e-01
! 6e8: 1e6a1000 fmov d0, #2.500000000000000000e-01
! 6ec: 1e6a3000 fmov d0, #2.656250000000000000e-01
! 6f0: 1e6c1000 fmov d0, #5.000000000000000000e-01
! 6f4: 1e6c3000 fmov d0, #5.312500000000000000e-01
! 6f8: 1e6e1000 fmov d0, #1.000000000000000000e+00
! 6fc: 1e6e3000 fmov d0, #1.062500000000000000e+00
! 700: 1e701000 fmov d0, #-2.000000000000000000e+00
! 704: 1e703000 fmov d0, #-2.125000000000000000e+00
! 708: 1e721000 fmov d0, #-4.000000000000000000e+00
! 70c: 1e723000 fmov d0, #-4.250000000000000000e+00
! 710: 1e741000 fmov d0, #-8.000000000000000000e+00
! 714: 1e743000 fmov d0, #-8.500000000000000000e+00
! 718: 1e761000 fmov d0, #-1.600000000000000000e+01
! 71c: 1e763000 fmov d0, #-1.700000000000000000e+01
! 720: 1e781000 fmov d0, #-1.250000000000000000e-01
! 724: 1e783000 fmov d0, #-1.328125000000000000e-01
! 728: 1e7a1000 fmov d0, #-2.500000000000000000e-01
! 72c: 1e7a3000 fmov d0, #-2.656250000000000000e-01
! 730: 1e7c1000 fmov d0, #-5.000000000000000000e-01
! 734: 1e7c3000 fmov d0, #-5.312500000000000000e-01
! 738: 1e7e1000 fmov d0, #-1.000000000000000000e+00
! 73c: 1e7e3000 fmov d0, #-1.062500000000000000e+00
! 740: f83a80c3 swp x26, x3, [x6]
! 744: f834008c ldadd x20, x12, [x4]
! 748: f8371164 ldclr x23, x4, [x11]
! 74c: f82f230f ldeor x15, x15, [x24]
! 750: f83d3222 ldset x29, x2, [x17]
! 754: f8395025 ldsmin x25, x5, [x1]
! 758: f82f40ef ldsmax x15, x15, [x7]
! 75c: f83c73bf stumin x28, [x29]
! 760: f83163f1 ldumax x17, x17, [sp]
! 764: f8a782b0 swpa x7, x16, [x21]
! 768: f8b1028a ldadda x17, x10, [x20]
! 76c: f8b913ae ldclra x25, x14, [x29]
! 770: f8b9206d ldeora x25, x13, [x3]
! 774: f8ad3387 ldseta x13, x7, [x28]
! 778: f8b450f9 ldsmina x20, x25, [x7]
! 77c: f8b54044 ldsmaxa x21, x4, [x2]
! 780: f8a87105 ldumina x8, x5, [x8]
! 784: f8aa60cc ldumaxa x10, x12, [x6]
! 788: f8f9814c swpal x25, x12, [x10]
! 78c: f8ec0081 ldaddal x12, x1, [x4]
! 790: f8fa1186 ldclral x26, x6, [x12]
! 794: f8e1218e ldeoral x1, x14, [x12]
! 798: f8f632a6 ldsetal x22, x6, [x21]
! 79c: f8ef50c4 ldsminal x15, x4, [x6]
! 7a0: f8f840f0 ldsmaxal x24, x16, [x7]
! 7a4: f8e57163 lduminal x5, x3, [x11]
! 7a8: f8f66322 ldumaxal x22, x2, [x25]
! 7ac: f866801d swpl x6, x29, [x0]
! 7b0: f87a02e6 ldaddl x26, x6, [x23]
! 7b4: f8641127 ldclrl x4, x7, [x9]
! 7b8: f866202b ldeorl x6, x11, [x1]
! 7bc: f86b33ad ldsetl x11, x13, [x29]
! 7c0: f86b50c3 ldsminl x11, x3, [x6]
! 7c4: f8754160 ldsmaxl x21, x0, [x11]
! 7c8: f86b7137 lduminl x11, x23, [x9]
! 7cc: f8716210 ldumaxl x17, x16, [x16]
! 7d0: b83583e5 swp w21, w5, [sp]
! 7d4: b838008b ldadd w24, w11, [x4]
! 7d8: b831109d ldclr w17, w29, [x4]
! 7dc: b82f21eb ldeor w15, w11, [x15]
! 7e0: b83b317a ldset w27, w26, [x11]
! 7e4: b83b510c ldsmin w27, w12, [x8]
! 7e8: b8264034 ldsmax w6, w20, [x1]
! 7ec: b82e73b0 ldumin w14, w16, [x29]
! 7f0: b838634d ldumax w24, w13, [x26]
! 7f4: b8a48162 swpa w4, w2, [x11]
! 7f8: b8b4009d ldadda w20, w29, [x4]
! 7fc: b8b413bf ldclra w20, wzr, [x29]
! 800: b8a0232f ldeora w0, w15, [x25]
! 804: b8b73285 ldseta w23, w5, [x20]
! 808: b8bd527a ldsmina w29, w26, [x19]
! 80c: b8b542d4 ldsmaxa w21, w20, [x22]
! 810: b8ba7215 ldumina w26, w21, [x16]
! 814: b8a86155 ldumaxa w8, w21, [x10]
! 818: b8fb816b swpal w27, w11, [x11]
! 81c: b8e50388 ldaddal w5, w8, [x28]
! 820: b8e010a5 ldclral w0, w5, [x5]
! 824: b8e2230a ldeoral w2, w10, [x24]
! 828: b8ed33ff ldsetal w13, wzr, [sp]
! 82c: b8fa5319 ldsminal w26, w25, [x24]
! 830: b8e840c5 ldsmaxal w8, w5, [x6]
! 834: b8e5737b lduminal w5, w27, [x27]
! 838: b8f762f4 ldumaxal w23, w20, [x23]
! 83c: b8798383 swpl w25, w3, [x28]
! 840: b86a01a8 ldaddl w10, w8, [x13]
! 844: b87513eb ldclrl w21, w11, [sp]
! 848: b87f2383 ldeorl wzr, w3, [x28]
! 84c: b86f3300 ldsetl w15, w0, [x24]
! 850: b86453a9 ldsminl w4, w9, [x29]
! 854: b86842a6 ldsmaxl w8, w6, [x21]
! 858: b8697076 lduminl w9, w22, [x3]
! 85c: b87a638a ldumaxl w26, w10, [x28]
*/
static const unsigned int insns[] =
{
! 0x8b1ad014, 0xcb83db85, 0xab839ecb, 0xeb4c646b,
! 0x0b0d399b, 0x4b9b1eaa, 0x2b1011c3, 0x6b1d1661,
! 0x8a5b1a30, 0xaa1c8f96, 0xca5ccd4b, 0xea8ec10d,
! 0x0a410c61, 0x2a855909, 0x4a9b4f82, 0x6a073938,
! 0x8ab9826b, 0xaa3d7318, 0xcab16e0b, 0xea6ae9a5,
! 0x0a357545, 0x2a354d64, 0x4a7c3f95, 0x6a2e7146,
! 0x110ec6ca, 0x310e9d6f, 0x510afcc5, 0x7108e013,
! 0x91098114, 0xb10434d0, 0xd10db417, 0xf10c873a,
! 0x120d6a0c, 0x32066b01, 0x52112073, 0x720a553d,
! 0x9263d0ba, 0xb20da1d8, 0xd26ec404, 0xf26e28dc,
! 0x14000000, 0x17ffffd7, 0x140001ee, 0x94000000,
! 0x97ffffd4, 0x940001eb, 0x34000015, 0x34fffa35,
! 0x34003d15, 0x3500000c, 0x35fff9cc, 0x35003cac,
! 0xb400000e, 0xb4fff96e, 0xb4003c4e, 0xb500001b,
! 0xb5fff91b, 0xb5003bfb, 0x1000000e, 0x10fff8ae,
! 0x10003b8e, 0x90000016, 0x36280000, 0x362ff820,
! 0x36283b00, 0x37580003, 0x375ff7c3, 0x37583aa3,
! 0x12835753, 0x52a2da7c, 0x72a9ef0d, 0x92c097e1,
! 0xd28e0a7a, 0xf2e2d05b, 0x93496301, 0x33054019,
! 0x530f1f70, 0x934f71d0, 0xb3403558, 0xd34259c1,
! 0x1381540a, 0x93d7f75a, 0x54000000, 0x54fff5a0,
! 0x54003880, 0x54000001, 0x54fff541, 0x54003821,
! 0x54000002, 0x54fff4e2, 0x540037c2, 0x54000002,
! 0x54fff482, 0x54003762, 0x54000003, 0x54fff423,
! 0x54003703, 0x54000003, 0x54fff3c3, 0x540036a3,
! 0x54000004, 0x54fff364, 0x54003644, 0x54000005,
! 0x54fff305, 0x540035e5, 0x54000006, 0x54fff2a6,
! 0x54003586, 0x54000007, 0x54fff247, 0x54003527,
! 0x54000008, 0x54fff1e8, 0x540034c8, 0x54000009,
! 0x54fff189, 0x54003469, 0x5400000a, 0x54fff12a,
! 0x5400340a, 0x5400000b, 0x54fff0cb, 0x540033ab,
! 0x5400000c, 0x54fff06c, 0x5400334c, 0x5400000d,
! 0x54fff00d, 0x540032ed, 0x5400000e, 0x54ffefae,
! 0x5400328e, 0x5400000f, 0x54ffef4f, 0x5400322f,
! 0xd4079461, 0xd4018ee2, 0xd408d7c3, 0xd4216040,
! 0xd44a2f80, 0xd503201f, 0xd69f03e0, 0xd6bf03e0,
! 0xd5033fdf, 0xd503329f, 0xd50339bf, 0xd61f0140,
! 0xd63f02c0, 0xc8037cb5, 0xc81cffa9, 0xc85f7cfc,
! 0xc85ffeea, 0xc89fff47, 0xc8dffef0, 0x880b7d87,
! 0x8810ff4d, 0x885f7eb9, 0x885ffc8e, 0x889ffd3a,
! 0x88dffee0, 0x48087d40, 0x480bfc81, 0x485f7f4e,
! 0x485ffcf3, 0x489ffed1, 0x48dffcd4, 0x08197cc8,
! 0x0805ff2a, 0x085f7ec0, 0x085ffc68, 0x089ffc45,
! 0x08dfff86, 0xc87f21d1, 0xc87f8c4e, 0xc8391271,
! 0xc82abd10, 0x887f2c61, 0x887fed80, 0x882457b4,
! 0x882097a9, 0xf811d091, 0xb81df086, 0x39002e0d,
! 0x781c02d7, 0xf840d062, 0xb8423285, 0x385f1142,
! 0x785f8017, 0x389fd1cf, 0x789f4063, 0x78df9319,
! 0xb89e3011, 0xfc5b1127, 0xbc5bc16b, 0xfc189050,
! 0xbc184399, 0xf8052e7c, 0xb8032da7, 0x381e0e62,
! 0x781c6c38, 0xf8571fb7, 0xb8400f6d, 0x385e6d4b,
! 0x785cacc3, 0x38803d22, 0x7881ec9c, 0x78de9c11,
! 0xb898bf3d, 0xfc572d55, 0xbc423e8b, 0xfc12ade1,
! 0xbc1c9cb3, 0xf81ec63c, 0xb81f75a8, 0x381e970e,
! 0x781c4482, 0xf8422738, 0xb85e5790, 0x385e56e8,
! 0x785c6403, 0x389f65ee, 0x7880d42c, 0x78ded429,
! 0xb89c355d, 0xfc5f778d, 0xbc5a8774, 0xfc139567,
! 0xbc1c36d4, 0xf830c943, 0xb8357ba1, 0x3837581a,
! 0x7835681a, 0xf8766b23, 0xb8785939, 0x386ed80a,
! 0x78747aa2, 0x38bcfb73, 0x78a37901, 0x78f0e9f4,
! 0xb8ac78e7, 0xfc6dd88f, 0xbc63494e, 0xfc29faf8,
! 0xbc3a5989, 0xf91a530e, 0xb91ce1c0, 0x39180277,
! 0x791c316f, 0xf95ab735, 0xb95810f7, 0x395ede17,
! 0x795e1718, 0x3999352c, 0x799e02a5, 0x79dc0c0e,
! 0xb99ef84d, 0xfd5ede6f, 0xbd5880b7, 0xfd1d90c6,
! 0xbd182569, 0x58002267, 0x1800001d, 0xf8929000,
! 0xd8002200, 0xf8a34880, 0xf99825c0, 0x1a0400c7,
! 0x3a05019b, 0x5a1a0319, 0x7a1700e5, 0x9a010176,
! 0xba1d012d, 0xda1a01c4, 0xfa1803bc, 0x0b3546b1,
! 0x2b3aad2c, 0xcb2324ae, 0x6b267351, 0x8b34acb1,
! 0xab39cc30, 0xcb3aec39, 0xeb37ac33, 0x3a589029,
! 0x7a4ac1c4, 0xba5d3120, 0xfa4640cd, 0x3a4b1a65,
! 0x7a5fa96f, 0xba4e6985, 0xfa47482a, 0x1a963046,
! 0x1a9a66dd, 0x5a8b933a, 0x5a90c5d3, 0x9a9422ad,
! 0x9a9b856c, 0xda93d223, 0xda876438, 0x5ac00037,
! 0x5ac00610, 0x5ac00b38, 0x5ac01119, 0x5ac0159b,
! 0xdac000b5, 0xdac00534, 0xdac00934, 0xdac00d53,
! 0xdac01048, 0xdac0147d, 0x1add08f3, 0x1aca0f7a,
! 0x1ad02300, 0x1ad82556, 0x1ad02b40, 0x1acf2f3b,
! 0x9acf0b88, 0x9ac50d74, 0x9ad02335, 0x9ace2447,
! 0x9ad62915, 0x9acf2ca7, 0x9bd67eac, 0x9b457d50,
! 0x1b1a54c2, 0x1b03ee7b, 0x9b080cbb, 0x9b1cb5a8,
! 0x9b28013d, 0x9b2edd2e, 0x9bab348f, 0x9bb1e077,
! 0x1e31083d, 0x1e291b97, 0x1e2c2a6e, 0x1e203a3b,
! 0x1e260b10, 0x1e6a0ae4, 0x1e77192b, 0x1e6729e7,
! 0x1e6c3abd, 0x1e69089b, 0x1f0b65db, 0x1f0f8ecb,
! 0x1f38136a, 0x1f2104c4, 0x1f430b8d, 0x1f47eb1a,
! 0x1f6c68b5, 0x1f740e0b, 0x1e204225, 0x1e20c127,
! 0x1e214039, 0x1e21c0d8, 0x1e22c23b, 0x1e604056,
! 0x1e60c28e, 0x1e61417d, 0x1e61c19c, 0x1e624064,
! 0x1e3801bc, 0x9e380387, 0x1e7801ec, 0x9e7800cb,
! 0x1e2202d6, 0x9e220205, 0x1e6201e3, 0x9e620106,
! 0x1e2603ba, 0x9e660238, 0x1e270262, 0x9e6700b5,
! 0x1e2822e0, 0x1e622180, 0x1e2021c8, 0x1e602148,
! 0x29344588, 0x29685781, 0x69785a19, 0xa93822e6,
! 0xa9794279, 0x29a26dbd, 0x29fc52ac, 0x69ee3c80,
! 0xa988326d, 0xa9c60939, 0x2890074b, 0x28c4647a,
! 0x68e2384a, 0xa8880d41, 0xa8f73337, 0x28082325,
! 0x28624ed4, 0xa8351dd7, 0xa84472ae, 0x0c40708a,
! 0x4cdfa359, 0x0cd76c9b, 0x4cdf24d0, 0x0d40c361,
! 0x4ddfc844, 0x0dcfcfb5, 0x4c408ec1, 0x0cdf851d,
! 0x4d60c098, 0x0dffca75, 0x4de6cdad, 0x4cd14881,
! 0x0c404a36, 0x4d40e631, 0x4ddfeb88, 0x0dd3ec25,
! 0x4cdf05e1, 0x0cda00d1, 0x0d60e0f9, 0x0dffe50c,
! 0x0de1e9a9, 0xba5fd3e3, 0x3a5f03e5, 0xfa411be4,
0x7a42cbe2, 0x93df03ff, 0xc820ffff, 0x8822fc7f,
0xc8247cbf, 0x88267fff, 0x4e010fe0, 0x4e081fe1,
0x4e0c1fe1, 0x4e0a1fe1, 0x4e071fe1, 0x4cc0ac3f,
0x1e601000, 0x1e603000, 0x1e621000, 0x1e623000,
0x1e641000, 0x1e643000, 0x1e661000, 0x1e663000,
*** 1427,1454 ****
0x1e6c1000, 0x1e6c3000, 0x1e6e1000, 0x1e6e3000,
0x1e701000, 0x1e703000, 0x1e721000, 0x1e723000,
0x1e741000, 0x1e743000, 0x1e761000, 0x1e763000,
0x1e781000, 0x1e783000, 0x1e7a1000, 0x1e7a3000,
0x1e7c1000, 0x1e7c3000, 0x1e7e1000, 0x1e7e3000,
! 0xf8388098, 0xf8340010, 0xf8241175, 0xf83e22d0,
! 0xf82432ef, 0xf83a5186, 0xf82f41ee, 0xf82973b9,
! 0xf82b6194, 0xf8b28216, 0xf8b50358, 0xf8a61206,
! 0xf8b02219, 0xf8bc3218, 0xf8ba514f, 0xf8ad428e,
! 0xf8a173d7, 0xf8ae60c2, 0xf8e38328, 0xf8e003db,
! 0xf8e513c5, 0xf8eb2019, 0xf8ff3260, 0xf8fd513a,
! 0xf8fa41ec, 0xf8eb724b, 0xf8f96316, 0xf8608171,
! 0xf86600dd, 0xf86512a5, 0xf8732250, 0xf87e339b,
! 0xf861503c, 0xf874421d, 0xf86d73aa, 0xf87d62d3,
! 0xb82a83e4, 0xb83503e8, 0xb833138a, 0xb82220b9,
! 0xb82332c8, 0xb83350ad, 0xb83d42b8, 0xb83a7078,
! 0xb83862fa, 0xb8af8075, 0xb8b80328, 0xb8b41230,
! 0xb8a22001, 0xb8b83064, 0xb8ac539f, 0xb8aa405a,
! 0xb8ac73f2, 0xb8a163ad, 0xb8e08193, 0xb8f101b6,
! 0xb8fc13fe, 0xb8e1239a, 0xb8e4309e, 0xb8e6535e,
! 0xb8f24109, 0xb8ec7280, 0xb8e16058, 0xb8608309,
! 0xb87a03d0, 0xb86312ea, 0xb86a2244, 0xb862310b,
! 0xb86a522f, 0xb862418a, 0xb86c71af, 0xb8626287,
};
// END Generated code -- do not edit
asm_check((unsigned int *)entry, insns, sizeof insns / sizeof insns[0]);
--- 1416,1443 ----
0x1e6c1000, 0x1e6c3000, 0x1e6e1000, 0x1e6e3000,
0x1e701000, 0x1e703000, 0x1e721000, 0x1e723000,
0x1e741000, 0x1e743000, 0x1e761000, 0x1e763000,
0x1e781000, 0x1e783000, 0x1e7a1000, 0x1e7a3000,
0x1e7c1000, 0x1e7c3000, 0x1e7e1000, 0x1e7e3000,
! 0xf83a80c3, 0xf834008c, 0xf8371164, 0xf82f230f,
! 0xf83d3222, 0xf8395025, 0xf82f40ef, 0xf83c73bf,
! 0xf83163f1, 0xf8a782b0, 0xf8b1028a, 0xf8b913ae,
! 0xf8b9206d, 0xf8ad3387, 0xf8b450f9, 0xf8b54044,
! 0xf8a87105, 0xf8aa60cc, 0xf8f9814c, 0xf8ec0081,
! 0xf8fa1186, 0xf8e1218e, 0xf8f632a6, 0xf8ef50c4,
! 0xf8f840f0, 0xf8e57163, 0xf8f66322, 0xf866801d,
! 0xf87a02e6, 0xf8641127, 0xf866202b, 0xf86b33ad,
! 0xf86b50c3, 0xf8754160, 0xf86b7137, 0xf8716210,
! 0xb83583e5, 0xb838008b, 0xb831109d, 0xb82f21eb,
! 0xb83b317a, 0xb83b510c, 0xb8264034, 0xb82e73b0,
! 0xb838634d, 0xb8a48162, 0xb8b4009d, 0xb8b413bf,
! 0xb8a0232f, 0xb8b73285, 0xb8bd527a, 0xb8b542d4,
! 0xb8ba7215, 0xb8a86155, 0xb8fb816b, 0xb8e50388,
! 0xb8e010a5, 0xb8e2230a, 0xb8ed33ff, 0xb8fa5319,
! 0xb8e840c5, 0xb8e5737b, 0xb8f762f4, 0xb8798383,
! 0xb86a01a8, 0xb87513eb, 0xb87f2383, 0xb86f3300,
! 0xb86453a9, 0xb86842a6, 0xb8697076, 0xb87a638a,
};
// END Generated code -- do not edit
asm_check((unsigned int *)entry, insns, sizeof insns / sizeof insns[0]);
*** 1793,1797 ****
--- 1782,1790 ----
float val;
};
ival = fp_immediate_for_encoding(value, 0);
return val;
}
+
+ address Assembler::locate_next_instruction(address inst) {
+ return inst + Assembler::instruction_size;
+ }
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