1 /*
   2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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  25 
  26 #ifndef CPU_AARCH64_ICACHE_AARCH64_HPP
  27 #define CPU_AARCH64_ICACHE_AARCH64_HPP
  28 
  29 // Interface for updating the instruction cache.  Whenever the VM
  30 // modifies code, part of the processor instruction cache potentially
  31 // has to be flushed.
  32 
  33 class ICache : public AbstractICache {
  34  public:
  35   static void initialize();
  36   static void invalidate_word(address addr) {
  37     __builtin___clear_cache((char *)addr, (char *)(addr + 3));
  38   }
  39   static void invalidate_range(address start, int nbytes) {
  40     __builtin___clear_cache((char *)start, (char *)(start + nbytes));
  41   }
  42 };
  43 
  44 #endif // CPU_AARCH64_ICACHE_AARCH64_HPP