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src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp

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rev 60623 : 8248500: AArch64: Remove the r18 dependency on Windows AArch64
Reviewed-by:
Contributed-by: mbeckwit, luhenry, burban

*** 687,697 **** CONVERTION_FOR, FW_Y0_NO_NEGATION, FW_FOR1_DONE, FW_FOR2, FW_FOR2_DONE, IH_FOR, SKIP_F_LOAD, RECOMP_FOR1, RECOMP_FIRST_FOR, INIT_F_COPY, RECOMP_FOR1_CHECK; Register tmp2 = r1, n = r2, jv = r4, tmp5 = r5, jx = r6, tmp3 = r7, iqBase = r10, ih = r11, tmp4 = r12, tmp1 = r13, ! jz = r14, j = r15, twoOverPiBase = r16, i = r17, qBase = r18; // jp = jk == init_jk[prec] = init_jk[2] == {2,3,4,6}[2] == 4 // jx = nx - 1 lea(twoOverPiBase, ExternalAddress(two_over_pi)); cmpw(jv, zr); addw(tmp4, jx, 4); // tmp4 = m = jx + jk = jx + 4. jx is in {0,1,2} so m is in [4,5,6] --- 687,697 ---- CONVERTION_FOR, FW_Y0_NO_NEGATION, FW_FOR1_DONE, FW_FOR2, FW_FOR2_DONE, IH_FOR, SKIP_F_LOAD, RECOMP_FOR1, RECOMP_FIRST_FOR, INIT_F_COPY, RECOMP_FOR1_CHECK; Register tmp2 = r1, n = r2, jv = r4, tmp5 = r5, jx = r6, tmp3 = r7, iqBase = r10, ih = r11, tmp4 = r12, tmp1 = r13, ! jz = r14, j = r15, twoOverPiBase = r16, i = r17, qBase = r19; // jp = jk == init_jk[prec] = init_jk[2] == {2,3,4,6}[2] == 4 // jx = nx - 1 lea(twoOverPiBase, ExternalAddress(two_over_pi)); cmpw(jv, zr); addw(tmp4, jx, 4); // tmp4 = m = jx + jk = jx + 4. jx is in {0,1,2} so m is in [4,5,6]
*** 1419,1428 **** --- 1419,1434 ---- const int POSITIVE_INFINITY_OR_NAN_PREFIX = 0x7FF0; Label DONE, ARG_REDUCTION, TINY_X, RETURN_SIN, EARLY_CASE; Register X = r0, absX = r1, n = r2, ix = r3; FloatRegister y0 = v4, y1 = v5; + + enter(); + // r19 is used in TemplateInterpreterGenerator::generate_math_entry + RegSet saved_regs = RegSet::of(r19); + push (saved_regs, sp); + block_comment("check |x| ~< pi/4, NaN, Inf and |x| < 2**-27 cases"); { fmovd(X, v0); mov(rscratch2, 0x3e400000); mov(rscratch1, 0x3fe921fb00000000); // pi/4. shifted to reuse later ubfm(absX, X, 0, 62); // absX
*** 1436,1453 **** br(LT, ARG_REDUCTION); // X is NaN or INF(i.e. 0x7FF* or 0xFFF*). Return NaN (mantissa != 0). // Set last bit unconditionally to make it NaN orr(r10, r10, 1); fmovd(v0, r10); ! ret(lr); } block_comment("kernel_sin/kernel_cos: if(ix<0x3e400000) {<fast return>}"); { bind(TINY_X); if (isCos) { fmovd(v0, 1.0); } ! ret(lr); } bind(ARG_REDUCTION); /* argument reduction needed */ block_comment("n = __ieee754_rem_pio2(x,y);"); { generate__ieee754_rem_pio2(npio2_hw, two_over_pi, pio2); } --- 1442,1459 ---- br(LT, ARG_REDUCTION); // X is NaN or INF(i.e. 0x7FF* or 0xFFF*). Return NaN (mantissa != 0). // Set last bit unconditionally to make it NaN orr(r10, r10, 1); fmovd(v0, r10); ! b(DONE); } block_comment("kernel_sin/kernel_cos: if(ix<0x3e400000) {<fast return>}"); { bind(TINY_X); if (isCos) { fmovd(v0, 1.0); } ! b(DONE); } bind(ARG_REDUCTION); /* argument reduction needed */ block_comment("n = __ieee754_rem_pio2(x,y);"); { generate__ieee754_rem_pio2(npio2_hw, two_over_pi, pio2); }
*** 1463,1488 **** tbz(absX, 0, DONE); } else { tbz(n, 1, DONE); } fnegd(v0, v0); ! ret(lr); bind(RETURN_SIN); generate_kernel_sin(y0, true, dsin_coef); if (isCos) { tbz(absX, 0, DONE); } else { tbz(n, 1, DONE); } fnegd(v0, v0); ! ret(lr); } bind(EARLY_CASE); eor(y1, T8B, y1, y1); if (isCos) { generate_kernel_cos(v0, dcos_coef); } else { generate_kernel_sin(v0, false, dsin_coef); } bind(DONE); ret(lr); } --- 1469,1496 ---- tbz(absX, 0, DONE); } else { tbz(n, 1, DONE); } fnegd(v0, v0); ! b(DONE); bind(RETURN_SIN); generate_kernel_sin(y0, true, dsin_coef); if (isCos) { tbz(absX, 0, DONE); } else { tbz(n, 1, DONE); } fnegd(v0, v0); ! b(DONE); } bind(EARLY_CASE); eor(y1, T8B, y1, y1); if (isCos) { generate_kernel_cos(v0, dcos_coef); } else { generate_kernel_sin(v0, false, dsin_coef); } bind(DONE); + pop(saved_regs, sp); + leave(); ret(lr); }
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