1 /*
2 * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef OS_CPU_WINDOWS_X86_ATOMIC_WINDOWS_X86_HPP
26 #define OS_CPU_WINDOWS_X86_ATOMIC_WINDOWS_X86_HPP
27
28 #include <intrin.h>
29 #include "runtime/os.hpp"
30
31 // Note that in MSVC, volatile memory accesses are explicitly
32 // guaranteed to have acquire release semantics (w.r.t. compiler
33 // reordering) and therefore does not even need a compiler barrier
34 // for normal acquire release accesses. And all generalized
35 // bound calls like release_store go through Atomic::load
36 // and Atomic::store which do volatile memory accesses.
37 template<> inline void ScopedFence<X_ACQUIRE>::postfix() { }
38 template<> inline void ScopedFence<RELEASE_X>::prefix() { }
39 template<> inline void ScopedFence<RELEASE_X_FENCE>::prefix() { }
40 template<> inline void ScopedFence<RELEASE_X_FENCE>::postfix() { OrderAccess::fence(); }
41
42 // The following alternative implementations are needed because
43 // Windows 95 doesn't support (some of) the corresponding Windows NT
44 // calls. Furthermore, these versions allow inlining in the caller.
45 // (More precisely: The documentation for InterlockedExchange says
46 // it is supported for Windows 95. However, when single-stepping
47 // through the assembly code we cannot step into the routine and
48 // when looking at the routine address we see only garbage code.
49 // Better safe then sorry!). Was bug 7/31/98 (gri).
50 //
51 // Performance note: On uniprocessors, the 'lock' prefixes are not
52 // necessary (and expensive). We should generate separate cases if
53 // this becomes a performance problem.
54
55
56 template<size_t byte_size>
57 struct Atomic::PlatformAdd {
58 template<typename D, typename I>
59 D add_and_fetch(D volatile* dest, I add_value, atomic_memory_order order) const;
60
61 template<typename D, typename I>
62 D fetch_and_add(D volatile* dest, I add_value, atomic_memory_order order) const {
63 return add_and_fetch(dest, add_value, order) - add_value;
64 }
65 };
66
67
68 #define DEFINE_STUB_ADD(ByteSize, StubType, StubName) \
69 template<> \
70 template<typename D, typename I> \
71 inline D Atomic::PlatformAdd<ByteSize>::add_and_fetch(D volatile* dest, \
72 I add_value, \
73 atomic_memory_order order) const { \
74 STATIC_ASSERT(ByteSize == sizeof(D)); \
75 return PrimitiveConversions::cast<D>( \
76 StubName(reinterpret_cast<StubType volatile *>(dest), \
77 PrimitiveConversions::cast<StubType>(add_value))); \
78 }
79
80 DEFINE_STUB_ADD(4, long, InterlockedAdd)
81 DEFINE_STUB_ADD(8, __int64, InterlockedAdd64)
82
83 #undef DEFINE_STUB_ADD
84
85 #define DEFINE_STUB_XCHG(ByteSize, StubType, StubName) \
86 template<> \
87 template<typename T> \
88 inline T Atomic::PlatformXchg<ByteSize>::operator()(T volatile* dest, \
89 T exchange_value, \
90 atomic_memory_order order) const { \
91 STATIC_ASSERT(ByteSize == sizeof(T)); \
92 return PrimitiveConversions::cast<T>( \
93 StubName(reinterpret_cast<StubType volatile *>(dest), \
94 PrimitiveConversions::cast<StubType>(exchange_value))); \
95 }
96
97 DEFINE_STUB_XCHG(4, long, InterlockedExchange)
98 DEFINE_STUB_XCHG(8, __int64, InterlockedExchange64)
99
100 #undef DEFINE_STUB_XCHG
101
102 #define DEFINE_STUB_CMPXCHG(ByteSize, StubType, StubName) \
103 template<> \
104 template<typename T> \
105 inline T Atomic::PlatformCmpxchg<ByteSize>::operator()(T volatile* dest, \
106 T compare_value, \
107 T exchange_value, \
108 atomic_memory_order order) const { \
109 STATIC_ASSERT(ByteSize == sizeof(T)); \
110 return PrimitiveConversions::cast<T>( \
111 StubName(reinterpret_cast<StubType volatile *>(dest), \
112 PrimitiveConversions::cast<StubType>(exchange_value), \
113 PrimitiveConversions::cast<StubType>(compare_value))); \
114 }
115
116 DEFINE_STUB_CMPXCHG(1, char, _InterlockedCompareExchange8) // Use the intrinsic as InterlockedCompareExchange8 does not exist
117 DEFINE_STUB_CMPXCHG(4, long, InterlockedCompareExchange)
118 DEFINE_STUB_CMPXCHG(8, __int64, InterlockedCompareExchange64)
119
120 #undef DEFINE_STUB_CMPXCHG
121
122
123 #ifndef AMD64
124
125 #pragma warning(disable: 4035) // Disables warnings reporting missing return statement
126
127 template<>
128 template<typename T>
129 inline T Atomic::PlatformLoad<8>::operator()(T const volatile* src) const {
130 STATIC_ASSERT(8 == sizeof(T));
131 volatile T dest;
132 volatile T* pdest = &dest;
133 __asm {
134 mov eax, src
135 fild qword ptr [eax]
136 mov eax, pdest
137 fistp qword ptr [eax]
138 }
139 return dest;
140 }
141
142 template<>
143 template<typename T>
144 inline void Atomic::PlatformStore<8>::operator()(T volatile* dest,
145 T store_value) const {
146 STATIC_ASSERT(8 == sizeof(T));
147 volatile T* src = &store_value;
148 __asm {
149 mov eax, src
150 fild qword ptr [eax]
151 mov eax, dest
152 fistp qword ptr [eax]
153 }
154 }
155
156 #pragma warning(default: 4035) // Enables warnings reporting missing return statement
157
158 template<>
159 struct Atomic::PlatformOrderedStore<1, RELEASE_X_FENCE>
160 {
161 template <typename T>
162 void operator()(volatile T* p, T v) const {
163 __asm {
164 mov edx, p;
165 mov al, v;
166 xchg al, byte ptr [edx];
167 }
168 }
169 };
170
171 template<>
172 struct Atomic::PlatformOrderedStore<2, RELEASE_X_FENCE>
173 {
174 template <typename T>
175 void operator()(volatile T* p, T v) const {
176 __asm {
177 mov edx, p;
178 mov ax, v;
179 xchg ax, word ptr [edx];
180 }
181 }
182 };
183
184 template<>
185 struct Atomic::PlatformOrderedStore<4, RELEASE_X_FENCE>
186 {
187 template <typename T>
188 void operator()(volatile T* p, T v) const {
189 __asm {
190 mov edx, p;
191 mov eax, v;
192 xchg eax, dword ptr [edx];
193 }
194 }
195 };
196 #endif // AMD64
197
198 #endif // OS_CPU_WINDOWS_X86_ATOMIC_WINDOWS_X86_HPP