src/cpu/sparc/vm/sharedRuntime_sparc.cpp
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src/cpu/sparc/vm/sharedRuntime_sparc.cpp

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 306   __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0));
 307 
 308   __ restore();
 309 
 310 #if !defined(_LP64)
 311   // Now reload the 64bit Oregs after we've restore the window.
 312   __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0);
 313   __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1);
 314 #endif /* _LP64 */
 315 
 316 }
 317 
 318 // Is vector's size (in bytes) bigger than a size saved by default?
 319 // 8 bytes FP registers are saved by default on SPARC.
 320 bool SharedRuntime::is_wide_vector(int size) {
 321   // Note, MaxVectorSize == 8 on SPARC.
 322   assert(size <= 8, "%d bytes vectors are not supported", size);
 323   return size > 8;
 324 }
 325 










 326 // The java_calling_convention describes stack locations as ideal slots on
 327 // a frame with no abi restrictions. Since we must observe abi restrictions
 328 // (like the placement of the register window) the slots must be biased by
 329 // the following value.
 330 static int reg2offset(VMReg r) {
 331   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 332 }
 333 
 334 static VMRegPair reg64_to_VMRegPair(Register r) {
 335   VMRegPair ret;
 336   if (wordSize == 8) {
 337     ret.set2(r->as_VMReg());
 338   } else {
 339     ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg());
 340   }
 341   return ret;
 342 }
 343 
 344 // ---------------------------------------------------------------------------
 345 // Read the array of BasicTypes from a signature, and compute where the




 306   __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0));
 307 
 308   __ restore();
 309 
 310 #if !defined(_LP64)
 311   // Now reload the 64bit Oregs after we've restore the window.
 312   __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0);
 313   __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1);
 314 #endif /* _LP64 */
 315 
 316 }
 317 
 318 // Is vector's size (in bytes) bigger than a size saved by default?
 319 // 8 bytes FP registers are saved by default on SPARC.
 320 bool SharedRuntime::is_wide_vector(int size) {
 321   // Note, MaxVectorSize == 8 on SPARC.
 322   assert(size <= 8, "%d bytes vectors are not supported", size);
 323   return size > 8;
 324 }
 325 
 326 size_t SharedRuntime::trampoline_size() {
 327   return 40;
 328 }
 329 
 330 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
 331   __ set((intptr_t)destination, G3_scratch);
 332   __ JMP(G3_scratch, 0);
 333   __ delayed()->nop();
 334 }
 335 
 336 // The java_calling_convention describes stack locations as ideal slots on
 337 // a frame with no abi restrictions. Since we must observe abi restrictions
 338 // (like the placement of the register window) the slots must be biased by
 339 // the following value.
 340 static int reg2offset(VMReg r) {
 341   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 342 }
 343 
 344 static VMRegPair reg64_to_VMRegPair(Register r) {
 345   VMRegPair ret;
 346   if (wordSize == 8) {
 347     ret.set2(r->as_VMReg());
 348   } else {
 349     ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg());
 350   }
 351   return ret;
 352 }
 353 
 354 // ---------------------------------------------------------------------------
 355 // Read the array of BasicTypes from a signature, and compute where the


src/cpu/sparc/vm/sharedRuntime_sparc.cpp
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