1 /*
2 * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
43
44 #define __ masm->
45
46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
47
48 class RegisterSaver {
49 // Capture info about frame layout
50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
51 enum layout {
52 fpu_state_off = 0,
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
54 st0_off, st0H_off,
55 st1_off, st1H_off,
56 st2_off, st2H_off,
57 st3_off, st3H_off,
58 st4_off, st4H_off,
59 st5_off, st5H_off,
60 st6_off, st6H_off,
61 st7_off, st7H_off,
62 xmm_off,
63 DEF_XMM_OFFS(0),
64 DEF_XMM_OFFS(1),
65 DEF_XMM_OFFS(2),
66 DEF_XMM_OFFS(3),
67 DEF_XMM_OFFS(4),
68 DEF_XMM_OFFS(5),
69 DEF_XMM_OFFS(6),
70 DEF_XMM_OFFS(7),
71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
72 rdi_off,
73 rsi_off,
74 ignore_off, // extra copy of rbp,
75 rsp_off,
76 rbx_off,
77 rdx_off,
78 rcx_off,
79 rax_off,
80 // The frame sender code expects that rbp will be in the "natural" place and
81 // will override any oopMap setting for it. We must therefore force the layout
82 // so that it agrees with the frame sender code.
83 rbp_off,
84 return_off, // slot for return address
85 reg_save_size };
86 enum { FPU_regs_live = flags_off - fpu_state_end };
87
88 public:
89
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
93
94 static int rax_offset() { return rax_off; }
95 static int rbx_offset() { return rbx_off; }
96
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
100
101 static int raxOffset(void) { return rax_off; }
102 static int rdxOffset(void) { return rdx_off; }
103 static int rbxOffset(void) { return rbx_off; }
104 static int xmm0Offset(void) { return xmm0_off; }
105 // This really returns a slot in the fp save area, which one is not important
106 static int fpResultOffset(void) { return st0_off; }
107
108 // During deoptimization only the result register need to be restored
109 // all the other values have already been extracted.
110
111 static void restore_result_registers(MacroAssembler* masm);
112
113 };
114
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
116 int* total_frame_words, bool verify_fpu, bool save_vectors) {
117 int vect_words = 0;
118 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
119 #ifdef COMPILER2
120 if (save_vectors) {
121 assert(UseAVX > 0, "512bit vectors are supported only with EVEX");
122 assert(MaxVectorSize == 64, "only 512bit vectors are supported now");
123 // Save upper half of ZMM/YMM registers :
124 vect_words = 8 * 16 / wordSize;
125 additional_frame_words += vect_words;
126 }
127 #else
128 assert(!save_vectors, "vectors are generated only by C2");
129 #endif
130 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
131 int frame_words = frame_size_in_bytes / wordSize;
132 *total_frame_words = frame_words;
133
134 assert(FPUStateSizeInWords == 27, "update stack layout");
135
136 // save registers, fpu state, and flags
137 // We assume caller has already has return address slot on the stack
138 // We push epb twice in this sequence because we want the real rbp,
139 // to be under the return like a normal enter and we want to use pusha
140 // We push by hand instead of pusing push
141 __ enter();
142 __ pusha();
143 __ pushf();
144 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
145 __ push_FPU_state(); // Save FPU state & init
146
147 if (verify_fpu) {
148 // Some stubs may have non standard FPU control word settings so
149 // only check and reset the value when it required to be the
150 // standard value. The safepoint blob in particular can be used
151 // in methods which are using the 24 bit control word for
152 // optimized float math.
153
154 #ifdef ASSERT
155 // Make sure the control word has the expected value
156 Label ok;
157 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
158 __ jccb(Assembler::equal, ok);
159 __ stop("corrupted control word detected");
160 __ bind(ok);
161 #endif
162
163 // Reset the control word to guard against exceptions being unmasked
164 // since fstp_d can cause FPU stack underflow exceptions. Write it
165 // into the on stack copy and then reload that to make sure that the
166 // current and future values are correct.
167 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
168 }
169
170 __ frstor(Address(rsp, 0));
171 if (!verify_fpu) {
172 // Set the control word so that exceptions are masked for the
173 // following code.
174 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
175 }
176
177 int off = st0_off;
178 int delta = st1_off - off;
179
180 // Save the FPU registers in de-opt-able form
181 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
182 __ fstp_d(Address(rsp, off*wordSize));
183 off += delta;
184 }
185
186 off = xmm0_off;
187 delta = xmm1_off - off;
188 if(UseSSE == 1) { // Save the XMM state
189 for (int n = 0; n < num_xmm_regs; n++) {
190 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
191 off += delta;
192 }
193 } else if(UseSSE >= 2) {
194 // Save whole 128bit (16 bytes) XMM regiters
195 for (int n = 0; n < num_xmm_regs; n++) {
196 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
197 off += delta;
198 }
199 }
200
201 if (save_vectors) {
202 assert(vect_words*wordSize == 128, "");
203 __ subptr(rsp, 128); // Save upper half of YMM registes
204 for (int n = 0; n < num_xmm_regs; n++) {
205 __ vextractf128h(Address(rsp, n*16), as_XMMRegister(n));
206 }
207 if (UseAVX > 2) {
208 __ subptr(rsp, 256); // Save upper half of ZMM registes
209 for (int n = 0; n < num_xmm_regs; n++) {
210 __ vextractf64x4h(Address(rsp, n*32), as_XMMRegister(n), 1);
211 }
212 }
213 }
214
215 // Set an oopmap for the call site. This oopmap will map all
216 // oop-registers and debug-info registers as callee-saved. This
217 // will allow deoptimization at this safepoint to find all possible
218 // debug-info recordings, as well as let GC find all oops.
219
220 OopMapSet *oop_maps = new OopMapSet();
221 OopMap* map = new OopMap( frame_words, 0 );
222
223 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
224 #define NEXTREG(x) (x)->as_VMReg()->next()
225
226 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
229 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
230 // rbp, location is known implicitly, no oopMap
231 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
232 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
233 // %%% This is really a waste but we'll keep things as they were for now for the upper component
234 off = st0_off;
235 delta = st1_off - off;
236 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
237 FloatRegister freg_name = as_FloatRegister(n);
238 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
240 off += delta;
241 }
242 off = xmm0_off;
243 delta = xmm1_off - off;
244 for (int n = 0; n < num_xmm_regs; n++) {
245 XMMRegister xmm_name = as_XMMRegister(n);
246 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
247 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
248 off += delta;
249 }
250 #undef NEXTREG
251 #undef STACK_OFFSET
252
253 return map;
254 }
255
256 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
257 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
258 // Recover XMM & FPU state
259 int additional_frame_bytes = 0;
260 #ifdef COMPILER2
261 if (restore_vectors) {
262 assert(UseAVX > 0, "512bit vectors are supported only with EVEX");
263 assert(MaxVectorSize == 64, "only 512bit vectors are supported now");
264 additional_frame_bytes = 128;
265 }
266 #else
267 assert(!restore_vectors, "vectors are generated only by C2");
268 #endif
269
270 if (restore_vectors) {
271 assert(additional_frame_bytes == 128, "");
272 if (UseAVX > 2) {
273 // Restore upper half of ZMM registers.
274 for (int n = 0; n < num_xmm_regs; n++) {
275 __ vinsertf64x4h(as_XMMRegister(n), Address(rsp, n*32), 1);
276 }
277 __ addptr(rsp, additional_frame_bytes*2); // Save upper half of ZMM registes
278 }
279 // Restore upper half of YMM registes.
280 for (int n = 0; n < num_xmm_regs; n++) {
281 __ vinsertf128h(as_XMMRegister(n), Address(rsp, n*16));
282 }
283 __ addptr(rsp, additional_frame_bytes); // Save upper half of YMM registes
284 }
285
286 int off = xmm0_off;
287 int delta = xmm1_off - off;
288
289 if (UseSSE == 1) {
290 for (int n = 0; n < num_xmm_regs; n++) {
291 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
292 off += delta;
293 }
294 } else if (UseSSE >= 2) {
295 // additional_frame_bytes only populated for the restore_vector case, else it is 0
296 for (int n = 0; n < num_xmm_regs; n++) {
297 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
298 off += delta;
299 }
300 }
301
302 __ pop_FPU_state();
303 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
304
305 __ popf();
306 __ popa();
307 // Get the rbp, described implicitly by the frame sender code (no oopMap)
308 __ pop(rbp);
309
310 }
311
312 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
313
314 // Just restore result register. Only used by deoptimization. By
315 // now any callee save register that needs to be restore to a c2
316 // caller of the deoptee has been extracted into the vframeArray
317 // and will be stuffed into the c2i adapter we create for later
318 // restoration so only result registers need to be restored here.
319 //
320
321 __ frstor(Address(rsp, 0)); // Restore fpu state
322
323 // Recover XMM & FPU state
324 if( UseSSE == 1 ) {
325 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
326 } else if( UseSSE >= 2 ) {
327 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
328 }
329 __ movptr(rax, Address(rsp, rax_off*wordSize));
330 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
331 // Pop all of the register save are off the stack except the return address
332 __ addptr(rsp, return_off * wordSize);
333 }
334
335 // Is vector's size (in bytes) bigger than a size saved by default?
336 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
337 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
338 bool SharedRuntime::is_wide_vector(int size) {
339 return size > 16;
340 }
341
342 size_t SharedRuntime::trampoline_size() {
343 return 16;
344 }
345
346 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
347 __ jump(RuntimeAddress(destination));
348 }
349
350 // The java_calling_convention describes stack locations as ideal slots on
351 // a frame with no abi restrictions. Since we must observe abi restrictions
352 // (like the placement of the register window) the slots must be biased by
353 // the following value.
354 static int reg2offset_in(VMReg r) {
355 // Account for saved rbp, and return address
356 // This should really be in_preserve_stack_slots
357 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
358 }
359
360 static int reg2offset_out(VMReg r) {
361 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
362 }
363
364 // ---------------------------------------------------------------------------
365 // Read the array of BasicTypes from a signature, and compute where the
366 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
367 // quantities. Values less than SharedInfo::stack0 are registers, those above
368 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
369 // as framesizes are fixed.
370 // VMRegImpl::stack0 refers to the first slot 0(sp).
371 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
372 // up to RegisterImpl::number_of_registers) are the 32-bit
373 // integer registers.
374
375 // Pass first two oop/int args in registers ECX and EDX.
376 // Pass first two float/double args in registers XMM0 and XMM1.
377 // Doubles have precedence, so if you pass a mix of floats and doubles
378 // the doubles will grab the registers before the floats will.
379
380 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
381 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
382 // units regardless of build. Of course for i486 there is no 64 bit build
383
384
385 // ---------------------------------------------------------------------------
386 // The compiled Java calling convention.
387 // Pass first two oop/int args in registers ECX and EDX.
388 // Pass first two float/double args in registers XMM0 and XMM1.
389 // Doubles have precedence, so if you pass a mix of floats and doubles
390 // the doubles will grab the registers before the floats will.
391 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
392 VMRegPair *regs,
393 int total_args_passed,
394 int is_outgoing) {
395 uint stack = 0; // Starting stack position for args on stack
396
397
398 // Pass first two oop/int args in registers ECX and EDX.
399 uint reg_arg0 = 9999;
400 uint reg_arg1 = 9999;
401
402 // Pass first two float/double args in registers XMM0 and XMM1.
403 // Doubles have precedence, so if you pass a mix of floats and doubles
404 // the doubles will grab the registers before the floats will.
405 // CNC - TURNED OFF FOR non-SSE.
406 // On Intel we have to round all doubles (and most floats) at
407 // call sites by storing to the stack in any case.
408 // UseSSE=0 ==> Don't Use ==> 9999+0
409 // UseSSE=1 ==> Floats only ==> 9999+1
410 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
411 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
412 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
413 uint freg_arg0 = 9999+fargs;
414 uint freg_arg1 = 9999+fargs;
415
416 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
417 int i;
418 for( i = 0; i < total_args_passed; i++) {
419 if( sig_bt[i] == T_DOUBLE ) {
420 // first 2 doubles go in registers
421 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
422 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
423 else // Else double is passed low on the stack to be aligned.
424 stack += 2;
425 } else if( sig_bt[i] == T_LONG ) {
426 stack += 2;
427 }
428 }
429 int dstack = 0; // Separate counter for placing doubles
430
431 // Now pick where all else goes.
432 for( i = 0; i < total_args_passed; i++) {
433 // From the type and the argument number (count) compute the location
434 switch( sig_bt[i] ) {
435 case T_SHORT:
436 case T_CHAR:
437 case T_BYTE:
438 case T_BOOLEAN:
439 case T_INT:
440 case T_ARRAY:
441 case T_OBJECT:
442 case T_ADDRESS:
443 if( reg_arg0 == 9999 ) {
444 reg_arg0 = i;
445 regs[i].set1(rcx->as_VMReg());
446 } else if( reg_arg1 == 9999 ) {
447 reg_arg1 = i;
448 regs[i].set1(rdx->as_VMReg());
449 } else {
450 regs[i].set1(VMRegImpl::stack2reg(stack++));
451 }
452 break;
453 case T_FLOAT:
454 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
455 freg_arg0 = i;
456 regs[i].set1(xmm0->as_VMReg());
457 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
458 freg_arg1 = i;
459 regs[i].set1(xmm1->as_VMReg());
460 } else {
461 regs[i].set1(VMRegImpl::stack2reg(stack++));
462 }
463 break;
464 case T_LONG:
465 assert(sig_bt[i+1] == T_VOID, "missing Half" );
466 regs[i].set2(VMRegImpl::stack2reg(dstack));
467 dstack += 2;
468 break;
469 case T_DOUBLE:
470 assert(sig_bt[i+1] == T_VOID, "missing Half" );
471 if( freg_arg0 == (uint)i ) {
472 regs[i].set2(xmm0->as_VMReg());
473 } else if( freg_arg1 == (uint)i ) {
474 regs[i].set2(xmm1->as_VMReg());
475 } else {
476 regs[i].set2(VMRegImpl::stack2reg(dstack));
477 dstack += 2;
478 }
479 break;
480 case T_VOID: regs[i].set_bad(); break;
481 break;
482 default:
483 ShouldNotReachHere();
484 break;
485 }
486 }
487
488 // return value can be odd number of VMRegImpl stack slots make multiple of 2
489 return round_to(stack, 2);
490 }
491
492 // Patch the callers callsite with entry to compiled code if it exists.
493 static void patch_callers_callsite(MacroAssembler *masm) {
494 Label L;
495 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
496 __ jcc(Assembler::equal, L);
497 // Schedule the branch target address early.
498 // Call into the VM to patch the caller, then jump to compiled callee
499 // rax, isn't live so capture return address while we easily can
500 __ movptr(rax, Address(rsp, 0));
501 __ pusha();
502 __ pushf();
503
504 if (UseSSE == 1) {
505 __ subptr(rsp, 2*wordSize);
506 __ movflt(Address(rsp, 0), xmm0);
507 __ movflt(Address(rsp, wordSize), xmm1);
508 }
509 if (UseSSE >= 2) {
510 __ subptr(rsp, 4*wordSize);
511 __ movdbl(Address(rsp, 0), xmm0);
512 __ movdbl(Address(rsp, 2*wordSize), xmm1);
513 }
514 #ifdef COMPILER2
515 // C2 may leave the stack dirty if not in SSE2+ mode
516 if (UseSSE >= 2) {
517 __ verify_FPU(0, "c2i transition should have clean FPU stack");
518 } else {
519 __ empty_FPU_stack();
520 }
521 #endif /* COMPILER2 */
522
523 // VM needs caller's callsite
524 __ push(rax);
525 // VM needs target method
526 __ push(rbx);
527 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
528 __ addptr(rsp, 2*wordSize);
529
530 if (UseSSE == 1) {
531 __ movflt(xmm0, Address(rsp, 0));
532 __ movflt(xmm1, Address(rsp, wordSize));
533 __ addptr(rsp, 2*wordSize);
534 }
535 if (UseSSE >= 2) {
536 __ movdbl(xmm0, Address(rsp, 0));
537 __ movdbl(xmm1, Address(rsp, 2*wordSize));
538 __ addptr(rsp, 4*wordSize);
539 }
540
541 __ popf();
542 __ popa();
543 __ bind(L);
544 }
545
546
547 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
548 int next_off = st_off - Interpreter::stackElementSize;
549 __ movdbl(Address(rsp, next_off), r);
550 }
551
552 static void gen_c2i_adapter(MacroAssembler *masm,
553 int total_args_passed,
554 int comp_args_on_stack,
555 const BasicType *sig_bt,
556 const VMRegPair *regs,
557 Label& skip_fixup) {
558 // Before we get into the guts of the C2I adapter, see if we should be here
559 // at all. We've come from compiled code and are attempting to jump to the
560 // interpreter, which means the caller made a static call to get here
561 // (vcalls always get a compiled target if there is one). Check for a
562 // compiled target. If there is one, we need to patch the caller's call.
563 patch_callers_callsite(masm);
564
565 __ bind(skip_fixup);
566
567 #ifdef COMPILER2
568 // C2 may leave the stack dirty if not in SSE2+ mode
569 if (UseSSE >= 2) {
570 __ verify_FPU(0, "c2i transition should have clean FPU stack");
571 } else {
572 __ empty_FPU_stack();
573 }
574 #endif /* COMPILER2 */
575
576 // Since all args are passed on the stack, total_args_passed * interpreter_
577 // stack_element_size is the
578 // space we need.
579 int extraspace = total_args_passed * Interpreter::stackElementSize;
580
581 // Get return address
582 __ pop(rax);
583
584 // set senderSP value
585 __ movptr(rsi, rsp);
586
587 __ subptr(rsp, extraspace);
588
589 // Now write the args into the outgoing interpreter space
590 for (int i = 0; i < total_args_passed; i++) {
591 if (sig_bt[i] == T_VOID) {
592 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
593 continue;
594 }
595
596 // st_off points to lowest address on stack.
597 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
598 int next_off = st_off - Interpreter::stackElementSize;
599
600 // Say 4 args:
601 // i st_off
602 // 0 12 T_LONG
603 // 1 8 T_VOID
604 // 2 4 T_OBJECT
605 // 3 0 T_BOOL
606 VMReg r_1 = regs[i].first();
607 VMReg r_2 = regs[i].second();
608 if (!r_1->is_valid()) {
609 assert(!r_2->is_valid(), "");
610 continue;
611 }
612
613 if (r_1->is_stack()) {
614 // memory to memory use fpu stack top
615 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
616
617 if (!r_2->is_valid()) {
618 __ movl(rdi, Address(rsp, ld_off));
619 __ movptr(Address(rsp, st_off), rdi);
620 } else {
621
622 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
623 // st_off == MSW, st_off-wordSize == LSW
624
625 __ movptr(rdi, Address(rsp, ld_off));
626 __ movptr(Address(rsp, next_off), rdi);
627 #ifndef _LP64
628 __ movptr(rdi, Address(rsp, ld_off + wordSize));
629 __ movptr(Address(rsp, st_off), rdi);
630 #else
631 #ifdef ASSERT
632 // Overwrite the unused slot with known junk
633 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
634 __ movptr(Address(rsp, st_off), rax);
635 #endif /* ASSERT */
636 #endif // _LP64
637 }
638 } else if (r_1->is_Register()) {
639 Register r = r_1->as_Register();
640 if (!r_2->is_valid()) {
641 __ movl(Address(rsp, st_off), r);
642 } else {
643 // long/double in gpr
644 NOT_LP64(ShouldNotReachHere());
645 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
646 // T_DOUBLE and T_LONG use two slots in the interpreter
647 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
648 // long/double in gpr
649 #ifdef ASSERT
650 // Overwrite the unused slot with known junk
651 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
652 __ movptr(Address(rsp, st_off), rax);
653 #endif /* ASSERT */
654 __ movptr(Address(rsp, next_off), r);
655 } else {
656 __ movptr(Address(rsp, st_off), r);
657 }
658 }
659 } else {
660 assert(r_1->is_XMMRegister(), "");
661 if (!r_2->is_valid()) {
662 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
663 } else {
664 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
665 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
666 }
667 }
668 }
669
670 // Schedule the branch target address early.
671 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
672 // And repush original return address
673 __ push(rax);
674 __ jmp(rcx);
675 }
676
677
678 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
679 int next_val_off = ld_off - Interpreter::stackElementSize;
680 __ movdbl(r, Address(saved_sp, next_val_off));
681 }
682
683 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
684 address code_start, address code_end,
685 Label& L_ok) {
686 Label L_fail;
687 __ lea(temp_reg, ExternalAddress(code_start));
688 __ cmpptr(pc_reg, temp_reg);
689 __ jcc(Assembler::belowEqual, L_fail);
690 __ lea(temp_reg, ExternalAddress(code_end));
691 __ cmpptr(pc_reg, temp_reg);
692 __ jcc(Assembler::below, L_ok);
693 __ bind(L_fail);
694 }
695
696 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
697 int total_args_passed,
698 int comp_args_on_stack,
699 const BasicType *sig_bt,
700 const VMRegPair *regs) {
701 // Note: rsi contains the senderSP on entry. We must preserve it since
702 // we may do a i2c -> c2i transition if we lose a race where compiled
703 // code goes non-entrant while we get args ready.
704
705 // Adapters can be frameless because they do not require the caller
706 // to perform additional cleanup work, such as correcting the stack pointer.
707 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
708 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
709 // even if a callee has modified the stack pointer.
710 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
711 // routinely repairs its caller's stack pointer (from sender_sp, which is set
712 // up via the senderSP register).
713 // In other words, if *either* the caller or callee is interpreted, we can
714 // get the stack pointer repaired after a call.
715 // This is why c2i and i2c adapters cannot be indefinitely composed.
716 // In particular, if a c2i adapter were to somehow call an i2c adapter,
717 // both caller and callee would be compiled methods, and neither would
718 // clean up the stack pointer changes performed by the two adapters.
719 // If this happens, control eventually transfers back to the compiled
720 // caller, but with an uncorrected stack, causing delayed havoc.
721
722 // Pick up the return address
723 __ movptr(rax, Address(rsp, 0));
724
725 if (VerifyAdapterCalls &&
726 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
727 // So, let's test for cascading c2i/i2c adapters right now.
728 // assert(Interpreter::contains($return_addr) ||
729 // StubRoutines::contains($return_addr),
730 // "i2c adapter must return to an interpreter frame");
731 __ block_comment("verify_i2c { ");
732 Label L_ok;
733 if (Interpreter::code() != NULL)
734 range_check(masm, rax, rdi,
735 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
736 L_ok);
737 if (StubRoutines::code1() != NULL)
738 range_check(masm, rax, rdi,
739 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
740 L_ok);
741 if (StubRoutines::code2() != NULL)
742 range_check(masm, rax, rdi,
743 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
744 L_ok);
745 const char* msg = "i2c adapter must return to an interpreter frame";
746 __ block_comment(msg);
747 __ stop(msg);
748 __ bind(L_ok);
749 __ block_comment("} verify_i2ce ");
750 }
751
752 // Must preserve original SP for loading incoming arguments because
753 // we need to align the outgoing SP for compiled code.
754 __ movptr(rdi, rsp);
755
756 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
757 // in registers, we will occasionally have no stack args.
758 int comp_words_on_stack = 0;
759 if (comp_args_on_stack) {
760 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
761 // registers are below. By subtracting stack0, we either get a negative
762 // number (all values in registers) or the maximum stack slot accessed.
763 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
764 // Convert 4-byte stack slots to words.
765 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
766 // Round up to miminum stack alignment, in wordSize
767 comp_words_on_stack = round_to(comp_words_on_stack, 2);
768 __ subptr(rsp, comp_words_on_stack * wordSize);
769 }
770
771 // Align the outgoing SP
772 __ andptr(rsp, -(StackAlignmentInBytes));
773
774 // push the return address on the stack (note that pushing, rather
775 // than storing it, yields the correct frame alignment for the callee)
776 __ push(rax);
777
778 // Put saved SP in another register
779 const Register saved_sp = rax;
780 __ movptr(saved_sp, rdi);
781
782
783 // Will jump to the compiled code just as if compiled code was doing it.
784 // Pre-load the register-jump target early, to schedule it better.
785 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
786
787 // Now generate the shuffle code. Pick up all register args and move the
788 // rest through the floating point stack top.
789 for (int i = 0; i < total_args_passed; i++) {
790 if (sig_bt[i] == T_VOID) {
791 // Longs and doubles are passed in native word order, but misaligned
792 // in the 32-bit build.
793 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
794 continue;
795 }
796
797 // Pick up 0, 1 or 2 words from SP+offset.
798
799 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
800 "scrambled load targets?");
801 // Load in argument order going down.
802 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
803 // Point to interpreter value (vs. tag)
804 int next_off = ld_off - Interpreter::stackElementSize;
805 //
806 //
807 //
808 VMReg r_1 = regs[i].first();
809 VMReg r_2 = regs[i].second();
810 if (!r_1->is_valid()) {
811 assert(!r_2->is_valid(), "");
812 continue;
813 }
814 if (r_1->is_stack()) {
815 // Convert stack slot to an SP offset (+ wordSize to account for return address )
816 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
817
818 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
819 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
820 // we be generated.
821 if (!r_2->is_valid()) {
822 // __ fld_s(Address(saved_sp, ld_off));
823 // __ fstp_s(Address(rsp, st_off));
824 __ movl(rsi, Address(saved_sp, ld_off));
825 __ movptr(Address(rsp, st_off), rsi);
826 } else {
827 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
828 // are accessed as negative so LSW is at LOW address
829
830 // ld_off is MSW so get LSW
831 // st_off is LSW (i.e. reg.first())
832 // __ fld_d(Address(saved_sp, next_off));
833 // __ fstp_d(Address(rsp, st_off));
834 //
835 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
836 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
837 // So we must adjust where to pick up the data to match the interpreter.
838 //
839 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
840 // are accessed as negative so LSW is at LOW address
841
842 // ld_off is MSW so get LSW
843 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
844 next_off : ld_off;
845 __ movptr(rsi, Address(saved_sp, offset));
846 __ movptr(Address(rsp, st_off), rsi);
847 #ifndef _LP64
848 __ movptr(rsi, Address(saved_sp, ld_off));
849 __ movptr(Address(rsp, st_off + wordSize), rsi);
850 #endif // _LP64
851 }
852 } else if (r_1->is_Register()) { // Register argument
853 Register r = r_1->as_Register();
854 assert(r != rax, "must be different");
855 if (r_2->is_valid()) {
856 //
857 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
858 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
859 // So we must adjust where to pick up the data to match the interpreter.
860
861 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
862 next_off : ld_off;
863
864 // this can be a misaligned move
865 __ movptr(r, Address(saved_sp, offset));
866 #ifndef _LP64
867 assert(r_2->as_Register() != rax, "need another temporary register");
868 // Remember r_1 is low address (and LSB on x86)
869 // So r_2 gets loaded from high address regardless of the platform
870 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
871 #endif // _LP64
872 } else {
873 __ movl(r, Address(saved_sp, ld_off));
874 }
875 } else {
876 assert(r_1->is_XMMRegister(), "");
877 if (!r_2->is_valid()) {
878 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
879 } else {
880 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
881 }
882 }
883 }
884
885 // 6243940 We might end up in handle_wrong_method if
886 // the callee is deoptimized as we race thru here. If that
887 // happens we don't want to take a safepoint because the
888 // caller frame will look interpreted and arguments are now
889 // "compiled" so it is much better to make this transition
890 // invisible to the stack walking code. Unfortunately if
891 // we try and find the callee by normal means a safepoint
892 // is possible. So we stash the desired callee in the thread
893 // and the vm will find there should this case occur.
894
895 __ get_thread(rax);
896 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
897
898 // move Method* to rax, in case we end up in an c2i adapter.
899 // the c2i adapters expect Method* in rax, (c2) because c2's
900 // resolve stubs return the result (the method) in rax,.
901 // I'd love to fix this.
902 __ mov(rax, rbx);
903
904 __ jmp(rdi);
905 }
906
907 // ---------------------------------------------------------------
908 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
909 int total_args_passed,
910 int comp_args_on_stack,
911 const BasicType *sig_bt,
912 const VMRegPair *regs,
913 AdapterFingerPrint* fingerprint) {
914 address i2c_entry = __ pc();
915
916 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
917
918 // -------------------------------------------------------------------------
919 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
920 // to the interpreter. The args start out packed in the compiled layout. They
921 // need to be unpacked into the interpreter layout. This will almost always
922 // require some stack space. We grow the current (compiled) stack, then repack
923 // the args. We finally end in a jump to the generic interpreter entry point.
924 // On exit from the interpreter, the interpreter will restore our SP (lest the
925 // compiled code, which relys solely on SP and not EBP, get sick).
926
927 address c2i_unverified_entry = __ pc();
928 Label skip_fixup;
929
930 Register holder = rax;
931 Register receiver = rcx;
932 Register temp = rbx;
933
934 {
935
936 Label missed;
937 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
938 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
939 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
940 __ jcc(Assembler::notEqual, missed);
941 // Method might have been compiled since the call site was patched to
942 // interpreted if that is the case treat it as a miss so we can get
943 // the call site corrected.
944 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
945 __ jcc(Assembler::equal, skip_fixup);
946
947 __ bind(missed);
948 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
949 }
950
951 address c2i_entry = __ pc();
952
953 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
954
955 __ flush();
956 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
957 }
958
959 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
960 VMRegPair *regs,
961 VMRegPair *regs2,
962 int total_args_passed) {
963 assert(regs2 == NULL, "not needed on x86");
964 // We return the amount of VMRegImpl stack slots we need to reserve for all
965 // the arguments NOT counting out_preserve_stack_slots.
966
967 uint stack = 0; // All arguments on stack
968
969 for( int i = 0; i < total_args_passed; i++) {
970 // From the type and the argument number (count) compute the location
971 switch( sig_bt[i] ) {
972 case T_BOOLEAN:
973 case T_CHAR:
974 case T_FLOAT:
975 case T_BYTE:
976 case T_SHORT:
977 case T_INT:
978 case T_OBJECT:
979 case T_ARRAY:
980 case T_ADDRESS:
981 case T_METADATA:
982 regs[i].set1(VMRegImpl::stack2reg(stack++));
983 break;
984 case T_LONG:
985 case T_DOUBLE: // The stack numbering is reversed from Java
986 // Since C arguments do not get reversed, the ordering for
987 // doubles on the stack must be opposite the Java convention
988 assert(sig_bt[i+1] == T_VOID, "missing Half" );
989 regs[i].set2(VMRegImpl::stack2reg(stack));
990 stack += 2;
991 break;
992 case T_VOID: regs[i].set_bad(); break;
993 default:
994 ShouldNotReachHere();
995 break;
996 }
997 }
998 return stack;
999 }
1000
1001 // A simple move of integer like type
1002 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1003 if (src.first()->is_stack()) {
1004 if (dst.first()->is_stack()) {
1005 // stack to stack
1006 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1007 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1008 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1009 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1010 } else {
1011 // stack to reg
1012 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1013 }
1014 } else if (dst.first()->is_stack()) {
1015 // reg to stack
1016 // no need to sign extend on 64bit
1017 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1018 } else {
1019 if (dst.first() != src.first()) {
1020 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1021 }
1022 }
1023 }
1024
1025 // An oop arg. Must pass a handle not the oop itself
1026 static void object_move(MacroAssembler* masm,
1027 OopMap* map,
1028 int oop_handle_offset,
1029 int framesize_in_slots,
1030 VMRegPair src,
1031 VMRegPair dst,
1032 bool is_receiver,
1033 int* receiver_offset) {
1034
1035 // Because of the calling conventions we know that src can be a
1036 // register or a stack location. dst can only be a stack location.
1037
1038 assert(dst.first()->is_stack(), "must be stack");
1039 // must pass a handle. First figure out the location we use as a handle
1040
1041 if (src.first()->is_stack()) {
1042 // Oop is already on the stack as an argument
1043 Register rHandle = rax;
1044 Label nil;
1045 __ xorptr(rHandle, rHandle);
1046 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1047 __ jcc(Assembler::equal, nil);
1048 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1049 __ bind(nil);
1050 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1051
1052 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1053 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1054 if (is_receiver) {
1055 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1056 }
1057 } else {
1058 // Oop is in an a register we must store it to the space we reserve
1059 // on the stack for oop_handles
1060 const Register rOop = src.first()->as_Register();
1061 const Register rHandle = rax;
1062 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1063 int offset = oop_slot*VMRegImpl::stack_slot_size;
1064 Label skip;
1065 __ movptr(Address(rsp, offset), rOop);
1066 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1067 __ xorptr(rHandle, rHandle);
1068 __ cmpptr(rOop, (int32_t)NULL_WORD);
1069 __ jcc(Assembler::equal, skip);
1070 __ lea(rHandle, Address(rsp, offset));
1071 __ bind(skip);
1072 // Store the handle parameter
1073 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1074 if (is_receiver) {
1075 *receiver_offset = offset;
1076 }
1077 }
1078 }
1079
1080 // A float arg may have to do float reg int reg conversion
1081 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1082 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1083
1084 // Because of the calling convention we know that src is either a stack location
1085 // or an xmm register. dst can only be a stack location.
1086
1087 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1088
1089 if (src.first()->is_stack()) {
1090 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1091 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1092 } else {
1093 // reg to stack
1094 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1095 }
1096 }
1097
1098 // A long move
1099 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1100
1101 // The only legal possibility for a long_move VMRegPair is:
1102 // 1: two stack slots (possibly unaligned)
1103 // as neither the java or C calling convention will use registers
1104 // for longs.
1105
1106 if (src.first()->is_stack() && dst.first()->is_stack()) {
1107 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1108 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1109 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1110 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1111 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1112 } else {
1113 ShouldNotReachHere();
1114 }
1115 }
1116
1117 // A double move
1118 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1119
1120 // The only legal possibilities for a double_move VMRegPair are:
1121 // The painful thing here is that like long_move a VMRegPair might be
1122
1123 // Because of the calling convention we know that src is either
1124 // 1: a single physical register (xmm registers only)
1125 // 2: two stack slots (possibly unaligned)
1126 // dst can only be a pair of stack slots.
1127
1128 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1129
1130 if (src.first()->is_stack()) {
1131 // source is all stack
1132 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1133 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1134 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1135 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1136 } else {
1137 // reg to stack
1138 // No worries about stack alignment
1139 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1140 }
1141 }
1142
1143
1144 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1145 // We always ignore the frame_slots arg and just use the space just below frame pointer
1146 // which by this time is free to use
1147 switch (ret_type) {
1148 case T_FLOAT:
1149 __ fstp_s(Address(rbp, -wordSize));
1150 break;
1151 case T_DOUBLE:
1152 __ fstp_d(Address(rbp, -2*wordSize));
1153 break;
1154 case T_VOID: break;
1155 case T_LONG:
1156 __ movptr(Address(rbp, -wordSize), rax);
1157 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1158 break;
1159 default: {
1160 __ movptr(Address(rbp, -wordSize), rax);
1161 }
1162 }
1163 }
1164
1165 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1166 // We always ignore the frame_slots arg and just use the space just below frame pointer
1167 // which by this time is free to use
1168 switch (ret_type) {
1169 case T_FLOAT:
1170 __ fld_s(Address(rbp, -wordSize));
1171 break;
1172 case T_DOUBLE:
1173 __ fld_d(Address(rbp, -2*wordSize));
1174 break;
1175 case T_LONG:
1176 __ movptr(rax, Address(rbp, -wordSize));
1177 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1178 break;
1179 case T_VOID: break;
1180 default: {
1181 __ movptr(rax, Address(rbp, -wordSize));
1182 }
1183 }
1184 }
1185
1186
1187 static void save_or_restore_arguments(MacroAssembler* masm,
1188 const int stack_slots,
1189 const int total_in_args,
1190 const int arg_save_area,
1191 OopMap* map,
1192 VMRegPair* in_regs,
1193 BasicType* in_sig_bt) {
1194 // if map is non-NULL then the code should store the values,
1195 // otherwise it should load them.
1196 int handle_index = 0;
1197 // Save down double word first
1198 for ( int i = 0; i < total_in_args; i++) {
1199 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1200 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1201 int offset = slot * VMRegImpl::stack_slot_size;
1202 handle_index += 2;
1203 assert(handle_index <= stack_slots, "overflow");
1204 if (map != NULL) {
1205 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1206 } else {
1207 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1208 }
1209 }
1210 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1211 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1212 int offset = slot * VMRegImpl::stack_slot_size;
1213 handle_index += 2;
1214 assert(handle_index <= stack_slots, "overflow");
1215 if (map != NULL) {
1216 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1217 if (in_regs[i].second()->is_Register()) {
1218 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1219 }
1220 } else {
1221 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1222 if (in_regs[i].second()->is_Register()) {
1223 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1224 }
1225 }
1226 }
1227 }
1228 // Save or restore single word registers
1229 for ( int i = 0; i < total_in_args; i++) {
1230 if (in_regs[i].first()->is_Register()) {
1231 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1232 int offset = slot * VMRegImpl::stack_slot_size;
1233 assert(handle_index <= stack_slots, "overflow");
1234 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1235 map->set_oop(VMRegImpl::stack2reg(slot));;
1236 }
1237
1238 // Value is in an input register pass we must flush it to the stack
1239 const Register reg = in_regs[i].first()->as_Register();
1240 switch (in_sig_bt[i]) {
1241 case T_ARRAY:
1242 if (map != NULL) {
1243 __ movptr(Address(rsp, offset), reg);
1244 } else {
1245 __ movptr(reg, Address(rsp, offset));
1246 }
1247 break;
1248 case T_BOOLEAN:
1249 case T_CHAR:
1250 case T_BYTE:
1251 case T_SHORT:
1252 case T_INT:
1253 if (map != NULL) {
1254 __ movl(Address(rsp, offset), reg);
1255 } else {
1256 __ movl(reg, Address(rsp, offset));
1257 }
1258 break;
1259 case T_OBJECT:
1260 default: ShouldNotReachHere();
1261 }
1262 } else if (in_regs[i].first()->is_XMMRegister()) {
1263 if (in_sig_bt[i] == T_FLOAT) {
1264 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1265 int offset = slot * VMRegImpl::stack_slot_size;
1266 assert(handle_index <= stack_slots, "overflow");
1267 if (map != NULL) {
1268 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1269 } else {
1270 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1271 }
1272 }
1273 } else if (in_regs[i].first()->is_stack()) {
1274 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1275 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1276 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1277 }
1278 }
1279 }
1280 }
1281
1282 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1283 // keeps a new JNI critical region from starting until a GC has been
1284 // forced. Save down any oops in registers and describe them in an
1285 // OopMap.
1286 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1287 Register thread,
1288 int stack_slots,
1289 int total_c_args,
1290 int total_in_args,
1291 int arg_save_area,
1292 OopMapSet* oop_maps,
1293 VMRegPair* in_regs,
1294 BasicType* in_sig_bt) {
1295 __ block_comment("check GCLocker::needs_gc");
1296 Label cont;
1297 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1298 __ jcc(Assembler::equal, cont);
1299
1300 // Save down any incoming oops and call into the runtime to halt for a GC
1301
1302 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1303
1304 save_or_restore_arguments(masm, stack_slots, total_in_args,
1305 arg_save_area, map, in_regs, in_sig_bt);
1306
1307 address the_pc = __ pc();
1308 oop_maps->add_gc_map( __ offset(), map);
1309 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1310
1311 __ block_comment("block_for_jni_critical");
1312 __ push(thread);
1313 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1314 __ increment(rsp, wordSize);
1315
1316 __ get_thread(thread);
1317 __ reset_last_Java_frame(thread, false, true);
1318
1319 save_or_restore_arguments(masm, stack_slots, total_in_args,
1320 arg_save_area, NULL, in_regs, in_sig_bt);
1321
1322 __ bind(cont);
1323 #ifdef ASSERT
1324 if (StressCriticalJNINatives) {
1325 // Stress register saving
1326 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1327 save_or_restore_arguments(masm, stack_slots, total_in_args,
1328 arg_save_area, map, in_regs, in_sig_bt);
1329 // Destroy argument registers
1330 for (int i = 0; i < total_in_args - 1; i++) {
1331 if (in_regs[i].first()->is_Register()) {
1332 const Register reg = in_regs[i].first()->as_Register();
1333 __ xorptr(reg, reg);
1334 } else if (in_regs[i].first()->is_XMMRegister()) {
1335 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1336 } else if (in_regs[i].first()->is_FloatRegister()) {
1337 ShouldNotReachHere();
1338 } else if (in_regs[i].first()->is_stack()) {
1339 // Nothing to do
1340 } else {
1341 ShouldNotReachHere();
1342 }
1343 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1344 i++;
1345 }
1346 }
1347
1348 save_or_restore_arguments(masm, stack_slots, total_in_args,
1349 arg_save_area, NULL, in_regs, in_sig_bt);
1350 }
1351 #endif
1352 }
1353
1354 // Unpack an array argument into a pointer to the body and the length
1355 // if the array is non-null, otherwise pass 0 for both.
1356 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1357 Register tmp_reg = rax;
1358 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1359 "possible collision");
1360 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1361 "possible collision");
1362
1363 // Pass the length, ptr pair
1364 Label is_null, done;
1365 VMRegPair tmp(tmp_reg->as_VMReg());
1366 if (reg.first()->is_stack()) {
1367 // Load the arg up from the stack
1368 simple_move32(masm, reg, tmp);
1369 reg = tmp;
1370 }
1371 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1372 __ jccb(Assembler::equal, is_null);
1373 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1374 simple_move32(masm, tmp, body_arg);
1375 // load the length relative to the body.
1376 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1377 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1378 simple_move32(masm, tmp, length_arg);
1379 __ jmpb(done);
1380 __ bind(is_null);
1381 // Pass zeros
1382 __ xorptr(tmp_reg, tmp_reg);
1383 simple_move32(masm, tmp, body_arg);
1384 simple_move32(masm, tmp, length_arg);
1385 __ bind(done);
1386 }
1387
1388 static void verify_oop_args(MacroAssembler* masm,
1389 methodHandle method,
1390 const BasicType* sig_bt,
1391 const VMRegPair* regs) {
1392 Register temp_reg = rbx; // not part of any compiled calling seq
1393 if (VerifyOops) {
1394 for (int i = 0; i < method->size_of_parameters(); i++) {
1395 if (sig_bt[i] == T_OBJECT ||
1396 sig_bt[i] == T_ARRAY) {
1397 VMReg r = regs[i].first();
1398 assert(r->is_valid(), "bad oop arg");
1399 if (r->is_stack()) {
1400 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1401 __ verify_oop(temp_reg);
1402 } else {
1403 __ verify_oop(r->as_Register());
1404 }
1405 }
1406 }
1407 }
1408 }
1409
1410 static void gen_special_dispatch(MacroAssembler* masm,
1411 methodHandle method,
1412 const BasicType* sig_bt,
1413 const VMRegPair* regs) {
1414 verify_oop_args(masm, method, sig_bt, regs);
1415 vmIntrinsics::ID iid = method->intrinsic_id();
1416
1417 // Now write the args into the outgoing interpreter space
1418 bool has_receiver = false;
1419 Register receiver_reg = noreg;
1420 int member_arg_pos = -1;
1421 Register member_reg = noreg;
1422 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1423 if (ref_kind != 0) {
1424 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1425 member_reg = rbx; // known to be free at this point
1426 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1427 } else if (iid == vmIntrinsics::_invokeBasic) {
1428 has_receiver = true;
1429 } else {
1430 fatal("unexpected intrinsic id %d", iid);
1431 }
1432
1433 if (member_reg != noreg) {
1434 // Load the member_arg into register, if necessary.
1435 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1436 VMReg r = regs[member_arg_pos].first();
1437 if (r->is_stack()) {
1438 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1439 } else {
1440 // no data motion is needed
1441 member_reg = r->as_Register();
1442 }
1443 }
1444
1445 if (has_receiver) {
1446 // Make sure the receiver is loaded into a register.
1447 assert(method->size_of_parameters() > 0, "oob");
1448 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1449 VMReg r = regs[0].first();
1450 assert(r->is_valid(), "bad receiver arg");
1451 if (r->is_stack()) {
1452 // Porting note: This assumes that compiled calling conventions always
1453 // pass the receiver oop in a register. If this is not true on some
1454 // platform, pick a temp and load the receiver from stack.
1455 fatal("receiver always in a register");
1456 receiver_reg = rcx; // known to be free at this point
1457 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1458 } else {
1459 // no data motion is needed
1460 receiver_reg = r->as_Register();
1461 }
1462 }
1463
1464 // Figure out which address we are really jumping to:
1465 MethodHandles::generate_method_handle_dispatch(masm, iid,
1466 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1467 }
1468
1469 // ---------------------------------------------------------------------------
1470 // Generate a native wrapper for a given method. The method takes arguments
1471 // in the Java compiled code convention, marshals them to the native
1472 // convention (handlizes oops, etc), transitions to native, makes the call,
1473 // returns to java state (possibly blocking), unhandlizes any result and
1474 // returns.
1475 //
1476 // Critical native functions are a shorthand for the use of
1477 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1478 // functions. The wrapper is expected to unpack the arguments before
1479 // passing them to the callee and perform checks before and after the
1480 // native call to ensure that they GCLocker
1481 // lock_critical/unlock_critical semantics are followed. Some other
1482 // parts of JNI setup are skipped like the tear down of the JNI handle
1483 // block and the check for pending exceptions it's impossible for them
1484 // to be thrown.
1485 //
1486 // They are roughly structured like this:
1487 // if (GCLocker::needs_gc())
1488 // SharedRuntime::block_for_jni_critical();
1489 // tranistion to thread_in_native
1490 // unpack arrray arguments and call native entry point
1491 // check for safepoint in progress
1492 // check if any thread suspend flags are set
1493 // call into JVM and possible unlock the JNI critical
1494 // if a GC was suppressed while in the critical native.
1495 // transition back to thread_in_Java
1496 // return to caller
1497 //
1498 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1499 const methodHandle& method,
1500 int compile_id,
1501 BasicType* in_sig_bt,
1502 VMRegPair* in_regs,
1503 BasicType ret_type) {
1504 if (method->is_method_handle_intrinsic()) {
1505 vmIntrinsics::ID iid = method->intrinsic_id();
1506 intptr_t start = (intptr_t)__ pc();
1507 int vep_offset = ((intptr_t)__ pc()) - start;
1508 gen_special_dispatch(masm,
1509 method,
1510 in_sig_bt,
1511 in_regs);
1512 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1513 __ flush();
1514 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1515 return nmethod::new_native_nmethod(method,
1516 compile_id,
1517 masm->code(),
1518 vep_offset,
1519 frame_complete,
1520 stack_slots / VMRegImpl::slots_per_word,
1521 in_ByteSize(-1),
1522 in_ByteSize(-1),
1523 (OopMapSet*)NULL);
1524 }
1525 bool is_critical_native = true;
1526 address native_func = method->critical_native_function();
1527 if (native_func == NULL) {
1528 native_func = method->native_function();
1529 is_critical_native = false;
1530 }
1531 assert(native_func != NULL, "must have function");
1532
1533 // An OopMap for lock (and class if static)
1534 OopMapSet *oop_maps = new OopMapSet();
1535
1536 // We have received a description of where all the java arg are located
1537 // on entry to the wrapper. We need to convert these args to where
1538 // the jni function will expect them. To figure out where they go
1539 // we convert the java signature to a C signature by inserting
1540 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1541
1542 const int total_in_args = method->size_of_parameters();
1543 int total_c_args = total_in_args;
1544 if (!is_critical_native) {
1545 total_c_args += 1;
1546 if (method->is_static()) {
1547 total_c_args++;
1548 }
1549 } else {
1550 for (int i = 0; i < total_in_args; i++) {
1551 if (in_sig_bt[i] == T_ARRAY) {
1552 total_c_args++;
1553 }
1554 }
1555 }
1556
1557 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1558 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1559 BasicType* in_elem_bt = NULL;
1560
1561 int argc = 0;
1562 if (!is_critical_native) {
1563 out_sig_bt[argc++] = T_ADDRESS;
1564 if (method->is_static()) {
1565 out_sig_bt[argc++] = T_OBJECT;
1566 }
1567
1568 for (int i = 0; i < total_in_args ; i++ ) {
1569 out_sig_bt[argc++] = in_sig_bt[i];
1570 }
1571 } else {
1572 Thread* THREAD = Thread::current();
1573 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1574 SignatureStream ss(method->signature());
1575 for (int i = 0; i < total_in_args ; i++ ) {
1576 if (in_sig_bt[i] == T_ARRAY) {
1577 // Arrays are passed as int, elem* pair
1578 out_sig_bt[argc++] = T_INT;
1579 out_sig_bt[argc++] = T_ADDRESS;
1580 Symbol* atype = ss.as_symbol(CHECK_NULL);
1581 const char* at = atype->as_C_string();
1582 if (strlen(at) == 2) {
1583 assert(at[0] == '[', "must be");
1584 switch (at[1]) {
1585 case 'B': in_elem_bt[i] = T_BYTE; break;
1586 case 'C': in_elem_bt[i] = T_CHAR; break;
1587 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1588 case 'F': in_elem_bt[i] = T_FLOAT; break;
1589 case 'I': in_elem_bt[i] = T_INT; break;
1590 case 'J': in_elem_bt[i] = T_LONG; break;
1591 case 'S': in_elem_bt[i] = T_SHORT; break;
1592 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1593 default: ShouldNotReachHere();
1594 }
1595 }
1596 } else {
1597 out_sig_bt[argc++] = in_sig_bt[i];
1598 in_elem_bt[i] = T_VOID;
1599 }
1600 if (in_sig_bt[i] != T_VOID) {
1601 assert(in_sig_bt[i] == ss.type(), "must match");
1602 ss.next();
1603 }
1604 }
1605 }
1606
1607 // Now figure out where the args must be stored and how much stack space
1608 // they require.
1609 int out_arg_slots;
1610 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1611
1612 // Compute framesize for the wrapper. We need to handlize all oops in
1613 // registers a max of 2 on x86.
1614
1615 // Calculate the total number of stack slots we will need.
1616
1617 // First count the abi requirement plus all of the outgoing args
1618 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1619
1620 // Now the space for the inbound oop handle area
1621 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1622 if (is_critical_native) {
1623 // Critical natives may have to call out so they need a save area
1624 // for register arguments.
1625 int double_slots = 0;
1626 int single_slots = 0;
1627 for ( int i = 0; i < total_in_args; i++) {
1628 if (in_regs[i].first()->is_Register()) {
1629 const Register reg = in_regs[i].first()->as_Register();
1630 switch (in_sig_bt[i]) {
1631 case T_ARRAY: // critical array (uses 2 slots on LP64)
1632 case T_BOOLEAN:
1633 case T_BYTE:
1634 case T_SHORT:
1635 case T_CHAR:
1636 case T_INT: single_slots++; break;
1637 case T_LONG: double_slots++; break;
1638 default: ShouldNotReachHere();
1639 }
1640 } else if (in_regs[i].first()->is_XMMRegister()) {
1641 switch (in_sig_bt[i]) {
1642 case T_FLOAT: single_slots++; break;
1643 case T_DOUBLE: double_slots++; break;
1644 default: ShouldNotReachHere();
1645 }
1646 } else if (in_regs[i].first()->is_FloatRegister()) {
1647 ShouldNotReachHere();
1648 }
1649 }
1650 total_save_slots = double_slots * 2 + single_slots;
1651 // align the save area
1652 if (double_slots != 0) {
1653 stack_slots = round_to(stack_slots, 2);
1654 }
1655 }
1656
1657 int oop_handle_offset = stack_slots;
1658 stack_slots += total_save_slots;
1659
1660 // Now any space we need for handlizing a klass if static method
1661
1662 int klass_slot_offset = 0;
1663 int klass_offset = -1;
1664 int lock_slot_offset = 0;
1665 bool is_static = false;
1666
1667 if (method->is_static()) {
1668 klass_slot_offset = stack_slots;
1669 stack_slots += VMRegImpl::slots_per_word;
1670 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1671 is_static = true;
1672 }
1673
1674 // Plus a lock if needed
1675
1676 if (method->is_synchronized()) {
1677 lock_slot_offset = stack_slots;
1678 stack_slots += VMRegImpl::slots_per_word;
1679 }
1680
1681 // Now a place (+2) to save return values or temp during shuffling
1682 // + 2 for return address (which we own) and saved rbp,
1683 stack_slots += 4;
1684
1685 // Ok The space we have allocated will look like:
1686 //
1687 //
1688 // FP-> | |
1689 // |---------------------|
1690 // | 2 slots for moves |
1691 // |---------------------|
1692 // | lock box (if sync) |
1693 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1694 // | klass (if static) |
1695 // |---------------------| <- klass_slot_offset
1696 // | oopHandle area |
1697 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1698 // | outbound memory |
1699 // | based arguments |
1700 // | |
1701 // |---------------------|
1702 // | |
1703 // SP-> | out_preserved_slots |
1704 //
1705 //
1706 // ****************************************************************************
1707 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1708 // arguments off of the stack after the jni call. Before the call we can use
1709 // instructions that are SP relative. After the jni call we switch to FP
1710 // relative instructions instead of re-adjusting the stack on windows.
1711 // ****************************************************************************
1712
1713
1714 // Now compute actual number of stack words we need rounding to make
1715 // stack properly aligned.
1716 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1717
1718 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1719
1720 intptr_t start = (intptr_t)__ pc();
1721
1722 // First thing make an ic check to see if we should even be here
1723
1724 // We are free to use all registers as temps without saving them and
1725 // restoring them except rbp. rbp is the only callee save register
1726 // as far as the interpreter and the compiler(s) are concerned.
1727
1728
1729 const Register ic_reg = rax;
1730 const Register receiver = rcx;
1731 Label hit;
1732 Label exception_pending;
1733
1734 __ verify_oop(receiver);
1735 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1736 __ jcc(Assembler::equal, hit);
1737
1738 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1739
1740 // verified entry must be aligned for code patching.
1741 // and the first 5 bytes must be in the same cache line
1742 // if we align at 8 then we will be sure 5 bytes are in the same line
1743 __ align(8);
1744
1745 __ bind(hit);
1746
1747 int vep_offset = ((intptr_t)__ pc()) - start;
1748
1749 #ifdef COMPILER1
1750 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1751 // Object.hashCode can pull the hashCode from the header word
1752 // instead of doing a full VM transition once it's been computed.
1753 // Since hashCode is usually polymorphic at call sites we can't do
1754 // this optimization at the call site without a lot of work.
1755 Label slowCase;
1756 Register receiver = rcx;
1757 Register result = rax;
1758 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1759
1760 // check if locked
1761 __ testptr(result, markOopDesc::unlocked_value);
1762 __ jcc (Assembler::zero, slowCase);
1763
1764 if (UseBiasedLocking) {
1765 // Check if biased and fall through to runtime if so
1766 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1767 __ jcc (Assembler::notZero, slowCase);
1768 }
1769
1770 // get hash
1771 __ andptr(result, markOopDesc::hash_mask_in_place);
1772 // test if hashCode exists
1773 __ jcc (Assembler::zero, slowCase);
1774 __ shrptr(result, markOopDesc::hash_shift);
1775 __ ret(0);
1776 __ bind (slowCase);
1777 }
1778 #endif // COMPILER1
1779
1780 // The instruction at the verified entry point must be 5 bytes or longer
1781 // because it can be patched on the fly by make_non_entrant. The stack bang
1782 // instruction fits that requirement.
1783
1784 // Generate stack overflow check
1785
1786 if (UseStackBanging) {
1787 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1788 } else {
1789 // need a 5 byte instruction to allow MT safe patching to non-entrant
1790 __ fat_nop();
1791 }
1792
1793 // Generate a new frame for the wrapper.
1794 __ enter();
1795 // -2 because return address is already present and so is saved rbp
1796 __ subptr(rsp, stack_size - 2*wordSize);
1797
1798 // Frame is now completed as far as size and linkage.
1799 int frame_complete = ((intptr_t)__ pc()) - start;
1800
1801 if (UseRTMLocking) {
1802 // Abort RTM transaction before calling JNI
1803 // because critical section will be large and will be
1804 // aborted anyway. Also nmethod could be deoptimized.
1805 __ xabort(0);
1806 }
1807
1808 // Calculate the difference between rsp and rbp,. We need to know it
1809 // after the native call because on windows Java Natives will pop
1810 // the arguments and it is painful to do rsp relative addressing
1811 // in a platform independent way. So after the call we switch to
1812 // rbp, relative addressing.
1813
1814 int fp_adjustment = stack_size - 2*wordSize;
1815
1816 #ifdef COMPILER2
1817 // C2 may leave the stack dirty if not in SSE2+ mode
1818 if (UseSSE >= 2) {
1819 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1820 } else {
1821 __ empty_FPU_stack();
1822 }
1823 #endif /* COMPILER2 */
1824
1825 // Compute the rbp, offset for any slots used after the jni call
1826
1827 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1828
1829 // We use rdi as a thread pointer because it is callee save and
1830 // if we load it once it is usable thru the entire wrapper
1831 const Register thread = rdi;
1832
1833 // We use rsi as the oop handle for the receiver/klass
1834 // It is callee save so it survives the call to native
1835
1836 const Register oop_handle_reg = rsi;
1837
1838 __ get_thread(thread);
1839
1840 if (is_critical_native) {
1841 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1842 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1843 }
1844
1845 //
1846 // We immediately shuffle the arguments so that any vm call we have to
1847 // make from here on out (sync slow path, jvmti, etc.) we will have
1848 // captured the oops from our caller and have a valid oopMap for
1849 // them.
1850
1851 // -----------------
1852 // The Grand Shuffle
1853 //
1854 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1855 // and, if static, the class mirror instead of a receiver. This pretty much
1856 // guarantees that register layout will not match (and x86 doesn't use reg
1857 // parms though amd does). Since the native abi doesn't use register args
1858 // and the java conventions does we don't have to worry about collisions.
1859 // All of our moved are reg->stack or stack->stack.
1860 // We ignore the extra arguments during the shuffle and handle them at the
1861 // last moment. The shuffle is described by the two calling convention
1862 // vectors we have in our possession. We simply walk the java vector to
1863 // get the source locations and the c vector to get the destinations.
1864
1865 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1866
1867 // Record rsp-based slot for receiver on stack for non-static methods
1868 int receiver_offset = -1;
1869
1870 // This is a trick. We double the stack slots so we can claim
1871 // the oops in the caller's frame. Since we are sure to have
1872 // more args than the caller doubling is enough to make
1873 // sure we can capture all the incoming oop args from the
1874 // caller.
1875 //
1876 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1877
1878 // Mark location of rbp,
1879 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1880
1881 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1882 // Are free to temporaries if we have to do stack to steck moves.
1883 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1884
1885 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1886 switch (in_sig_bt[i]) {
1887 case T_ARRAY:
1888 if (is_critical_native) {
1889 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1890 c_arg++;
1891 break;
1892 }
1893 case T_OBJECT:
1894 assert(!is_critical_native, "no oop arguments");
1895 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1896 ((i == 0) && (!is_static)),
1897 &receiver_offset);
1898 break;
1899 case T_VOID:
1900 break;
1901
1902 case T_FLOAT:
1903 float_move(masm, in_regs[i], out_regs[c_arg]);
1904 break;
1905
1906 case T_DOUBLE:
1907 assert( i + 1 < total_in_args &&
1908 in_sig_bt[i + 1] == T_VOID &&
1909 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1910 double_move(masm, in_regs[i], out_regs[c_arg]);
1911 break;
1912
1913 case T_LONG :
1914 long_move(masm, in_regs[i], out_regs[c_arg]);
1915 break;
1916
1917 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1918
1919 default:
1920 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1921 }
1922 }
1923
1924 // Pre-load a static method's oop into rsi. Used both by locking code and
1925 // the normal JNI call code.
1926 if (method->is_static() && !is_critical_native) {
1927
1928 // load opp into a register
1929 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1930
1931 // Now handlize the static class mirror it's known not-null.
1932 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1933 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1934
1935 // Now get the handle
1936 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1937 // store the klass handle as second argument
1938 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1939 }
1940
1941 // Change state to native (we save the return address in the thread, since it might not
1942 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1943 // points into the right code segment. It does not have to be the correct return pc.
1944 // We use the same pc/oopMap repeatedly when we call out
1945
1946 intptr_t the_pc = (intptr_t) __ pc();
1947 oop_maps->add_gc_map(the_pc - start, map);
1948
1949 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1950
1951
1952 // We have all of the arguments setup at this point. We must not touch any register
1953 // argument registers at this point (what if we save/restore them there are no oop?
1954
1955 {
1956 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1957 __ mov_metadata(rax, method());
1958 __ call_VM_leaf(
1959 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1960 thread, rax);
1961 }
1962
1963 // RedefineClasses() tracing support for obsolete method entry
1964 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1965 __ mov_metadata(rax, method());
1966 __ call_VM_leaf(
1967 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1968 thread, rax);
1969 }
1970
1971 // These are register definitions we need for locking/unlocking
1972 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1973 const Register obj_reg = rcx; // Will contain the oop
1974 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1975
1976 Label slow_path_lock;
1977 Label lock_done;
1978
1979 // Lock a synchronized method
1980 if (method->is_synchronized()) {
1981 assert(!is_critical_native, "unhandled");
1982
1983
1984 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1985
1986 // Get the handle (the 2nd argument)
1987 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1988
1989 // Get address of the box
1990
1991 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1992
1993 // Load the oop from the handle
1994 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1995
1996 if (UseBiasedLocking) {
1997 // Note that oop_handle_reg is trashed during this call
1998 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1999 }
2000
2001 // Load immediate 1 into swap_reg %rax,
2002 __ movptr(swap_reg, 1);
2003
2004 // Load (object->mark() | 1) into swap_reg %rax,
2005 __ orptr(swap_reg, Address(obj_reg, 0));
2006
2007 // Save (object->mark() | 1) into BasicLock's displaced header
2008 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2009
2010 if (os::is_MP()) {
2011 __ lock();
2012 }
2013
2014 // src -> dest iff dest == rax, else rax, <- dest
2015 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2016 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2017 __ jcc(Assembler::equal, lock_done);
2018
2019 // Test if the oopMark is an obvious stack pointer, i.e.,
2020 // 1) (mark & 3) == 0, and
2021 // 2) rsp <= mark < mark + os::pagesize()
2022 // These 3 tests can be done by evaluating the following
2023 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2024 // assuming both stack pointer and pagesize have their
2025 // least significant 2 bits clear.
2026 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2027
2028 __ subptr(swap_reg, rsp);
2029 __ andptr(swap_reg, 3 - os::vm_page_size());
2030
2031 // Save the test result, for recursive case, the result is zero
2032 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2033 __ jcc(Assembler::notEqual, slow_path_lock);
2034 // Slow path will re-enter here
2035 __ bind(lock_done);
2036
2037 if (UseBiasedLocking) {
2038 // Re-fetch oop_handle_reg as we trashed it above
2039 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2040 }
2041 }
2042
2043
2044 // Finally just about ready to make the JNI call
2045
2046
2047 // get JNIEnv* which is first argument to native
2048 if (!is_critical_native) {
2049 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2050 __ movptr(Address(rsp, 0), rdx);
2051 }
2052
2053 // Now set thread in native
2054 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2055
2056 __ call(RuntimeAddress(native_func));
2057
2058 // Verify or restore cpu control state after JNI call
2059 __ restore_cpu_control_state_after_jni();
2060
2061 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2062 // arguments off of the stack. We could just re-adjust the stack pointer here
2063 // and continue to do SP relative addressing but we instead switch to FP
2064 // relative addressing.
2065
2066 // Unpack native results.
2067 switch (ret_type) {
2068 case T_BOOLEAN: __ c2bool(rax); break;
2069 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2070 case T_BYTE : __ sign_extend_byte (rax); break;
2071 case T_SHORT : __ sign_extend_short(rax); break;
2072 case T_INT : /* nothing to do */ break;
2073 case T_DOUBLE :
2074 case T_FLOAT :
2075 // Result is in st0 we'll save as needed
2076 break;
2077 case T_ARRAY: // Really a handle
2078 case T_OBJECT: // Really a handle
2079 break; // can't de-handlize until after safepoint check
2080 case T_VOID: break;
2081 case T_LONG: break;
2082 default : ShouldNotReachHere();
2083 }
2084
2085 // Switch thread to "native transition" state before reading the synchronization state.
2086 // This additional state is necessary because reading and testing the synchronization
2087 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2088 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2089 // VM thread changes sync state to synchronizing and suspends threads for GC.
2090 // Thread A is resumed to finish this native method, but doesn't block here since it
2091 // didn't see any synchronization is progress, and escapes.
2092 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2093
2094 if(os::is_MP()) {
2095 if (UseMembar) {
2096 // Force this write out before the read below
2097 __ membar(Assembler::Membar_mask_bits(
2098 Assembler::LoadLoad | Assembler::LoadStore |
2099 Assembler::StoreLoad | Assembler::StoreStore));
2100 } else {
2101 // Write serialization page so VM thread can do a pseudo remote membar.
2102 // We use the current thread pointer to calculate a thread specific
2103 // offset to write to within the page. This minimizes bus traffic
2104 // due to cache line collision.
2105 __ serialize_memory(thread, rcx);
2106 }
2107 }
2108
2109 if (AlwaysRestoreFPU) {
2110 // Make sure the control word is correct.
2111 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2112 }
2113
2114 Label after_transition;
2115
2116 // check for safepoint operation in progress and/or pending suspend requests
2117 { Label Continue;
2118
2119 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2120 SafepointSynchronize::_not_synchronized);
2121
2122 Label L;
2123 __ jcc(Assembler::notEqual, L);
2124 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2125 __ jcc(Assembler::equal, Continue);
2126 __ bind(L);
2127
2128 // Don't use call_VM as it will see a possible pending exception and forward it
2129 // and never return here preventing us from clearing _last_native_pc down below.
2130 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2131 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2132 // by hand.
2133 //
2134 save_native_result(masm, ret_type, stack_slots);
2135 __ push(thread);
2136 if (!is_critical_native) {
2137 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2138 JavaThread::check_special_condition_for_native_trans)));
2139 } else {
2140 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2141 JavaThread::check_special_condition_for_native_trans_and_transition)));
2142 }
2143 __ increment(rsp, wordSize);
2144 // Restore any method result value
2145 restore_native_result(masm, ret_type, stack_slots);
2146
2147 if (is_critical_native) {
2148 // The call above performed the transition to thread_in_Java so
2149 // skip the transition logic below.
2150 __ jmpb(after_transition);
2151 }
2152
2153 __ bind(Continue);
2154 }
2155
2156 // change thread state
2157 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2158 __ bind(after_transition);
2159
2160 Label reguard;
2161 Label reguard_done;
2162 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2163 __ jcc(Assembler::equal, reguard);
2164
2165 // slow path reguard re-enters here
2166 __ bind(reguard_done);
2167
2168 // Handle possible exception (will unlock if necessary)
2169
2170 // native result if any is live
2171
2172 // Unlock
2173 Label slow_path_unlock;
2174 Label unlock_done;
2175 if (method->is_synchronized()) {
2176
2177 Label done;
2178
2179 // Get locked oop from the handle we passed to jni
2180 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2181
2182 if (UseBiasedLocking) {
2183 __ biased_locking_exit(obj_reg, rbx, done);
2184 }
2185
2186 // Simple recursive lock?
2187
2188 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2189 __ jcc(Assembler::equal, done);
2190
2191 // Must save rax, if if it is live now because cmpxchg must use it
2192 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2193 save_native_result(masm, ret_type, stack_slots);
2194 }
2195
2196 // get old displaced header
2197 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2198
2199 // get address of the stack lock
2200 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2201
2202 // Atomic swap old header if oop still contains the stack lock
2203 if (os::is_MP()) {
2204 __ lock();
2205 }
2206
2207 // src -> dest iff dest == rax, else rax, <- dest
2208 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2209 __ cmpxchgptr(rbx, Address(obj_reg, 0));
2210 __ jcc(Assembler::notEqual, slow_path_unlock);
2211
2212 // slow path re-enters here
2213 __ bind(unlock_done);
2214 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2215 restore_native_result(masm, ret_type, stack_slots);
2216 }
2217
2218 __ bind(done);
2219
2220 }
2221
2222 {
2223 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2224 // Tell dtrace about this method exit
2225 save_native_result(masm, ret_type, stack_slots);
2226 __ mov_metadata(rax, method());
2227 __ call_VM_leaf(
2228 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2229 thread, rax);
2230 restore_native_result(masm, ret_type, stack_slots);
2231 }
2232
2233 // We can finally stop using that last_Java_frame we setup ages ago
2234
2235 __ reset_last_Java_frame(thread, false, true);
2236
2237 // Unpack oop result
2238 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2239 Label L;
2240 __ cmpptr(rax, (int32_t)NULL_WORD);
2241 __ jcc(Assembler::equal, L);
2242 __ movptr(rax, Address(rax, 0));
2243 __ bind(L);
2244 __ verify_oop(rax);
2245 }
2246
2247 if (!is_critical_native) {
2248 // reset handle block
2249 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2250 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2251
2252 // Any exception pending?
2253 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2254 __ jcc(Assembler::notEqual, exception_pending);
2255 }
2256
2257 // no exception, we're almost done
2258
2259 // check that only result value is on FPU stack
2260 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2261
2262 // Fixup floating pointer results so that result looks like a return from a compiled method
2263 if (ret_type == T_FLOAT) {
2264 if (UseSSE >= 1) {
2265 // Pop st0 and store as float and reload into xmm register
2266 __ fstp_s(Address(rbp, -4));
2267 __ movflt(xmm0, Address(rbp, -4));
2268 }
2269 } else if (ret_type == T_DOUBLE) {
2270 if (UseSSE >= 2) {
2271 // Pop st0 and store as double and reload into xmm register
2272 __ fstp_d(Address(rbp, -8));
2273 __ movdbl(xmm0, Address(rbp, -8));
2274 }
2275 }
2276
2277 // Return
2278
2279 __ leave();
2280 __ ret(0);
2281
2282 // Unexpected paths are out of line and go here
2283
2284 // Slow path locking & unlocking
2285 if (method->is_synchronized()) {
2286
2287 // BEGIN Slow path lock
2288
2289 __ bind(slow_path_lock);
2290
2291 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2292 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2293 __ push(thread);
2294 __ push(lock_reg);
2295 __ push(obj_reg);
2296 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2297 __ addptr(rsp, 3*wordSize);
2298
2299 #ifdef ASSERT
2300 { Label L;
2301 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2302 __ jcc(Assembler::equal, L);
2303 __ stop("no pending exception allowed on exit from monitorenter");
2304 __ bind(L);
2305 }
2306 #endif
2307 __ jmp(lock_done);
2308
2309 // END Slow path lock
2310
2311 // BEGIN Slow path unlock
2312 __ bind(slow_path_unlock);
2313
2314 // Slow path unlock
2315
2316 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2317 save_native_result(masm, ret_type, stack_slots);
2318 }
2319 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2320
2321 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2322 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2323
2324
2325 // should be a peal
2326 // +wordSize because of the push above
2327 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2328 __ push(thread);
2329 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2330 __ push(rax);
2331
2332 __ push(obj_reg);
2333 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2334 __ addptr(rsp, 3*wordSize);
2335 #ifdef ASSERT
2336 {
2337 Label L;
2338 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2339 __ jcc(Assembler::equal, L);
2340 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2341 __ bind(L);
2342 }
2343 #endif /* ASSERT */
2344
2345 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2346
2347 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2348 restore_native_result(masm, ret_type, stack_slots);
2349 }
2350 __ jmp(unlock_done);
2351 // END Slow path unlock
2352
2353 }
2354
2355 // SLOW PATH Reguard the stack if needed
2356
2357 __ bind(reguard);
2358 save_native_result(masm, ret_type, stack_slots);
2359 {
2360 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2361 }
2362 restore_native_result(masm, ret_type, stack_slots);
2363 __ jmp(reguard_done);
2364
2365
2366 // BEGIN EXCEPTION PROCESSING
2367
2368 if (!is_critical_native) {
2369 // Forward the exception
2370 __ bind(exception_pending);
2371
2372 // remove possible return value from FPU register stack
2373 __ empty_FPU_stack();
2374
2375 // pop our frame
2376 __ leave();
2377 // and forward the exception
2378 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2379 }
2380
2381 __ flush();
2382
2383 nmethod *nm = nmethod::new_native_nmethod(method,
2384 compile_id,
2385 masm->code(),
2386 vep_offset,
2387 frame_complete,
2388 stack_slots / VMRegImpl::slots_per_word,
2389 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2390 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2391 oop_maps);
2392
2393 if (is_critical_native) {
2394 nm->set_lazy_critical_native(true);
2395 }
2396
2397 return nm;
2398
2399 }
2400
2401 // this function returns the adjust size (in number of words) to a c2i adapter
2402 // activation for use during deoptimization
2403 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2404 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2405 }
2406
2407
2408 uint SharedRuntime::out_preserve_stack_slots() {
2409 return 0;
2410 }
2411
2412 //------------------------------generate_deopt_blob----------------------------
2413 void SharedRuntime::generate_deopt_blob() {
2414 // allocate space for the code
2415 ResourceMark rm;
2416 // setup code generation tools
2417 // note: the buffer code size must account for StackShadowPages=50
2418 CodeBuffer buffer("deopt_blob", 1536, 1024);
2419 MacroAssembler* masm = new MacroAssembler(&buffer);
2420 int frame_size_in_words;
2421 OopMap* map = NULL;
2422 // Account for the extra args we place on the stack
2423 // by the time we call fetch_unroll_info
2424 const int additional_words = 2; // deopt kind, thread
2425
2426 OopMapSet *oop_maps = new OopMapSet();
2427
2428 // -------------
2429 // This code enters when returning to a de-optimized nmethod. A return
2430 // address has been pushed on the the stack, and return values are in
2431 // registers.
2432 // If we are doing a normal deopt then we were called from the patched
2433 // nmethod from the point we returned to the nmethod. So the return
2434 // address on the stack is wrong by NativeCall::instruction_size
2435 // We will adjust the value to it looks like we have the original return
2436 // address on the stack (like when we eagerly deoptimized).
2437 // In the case of an exception pending with deoptimized then we enter
2438 // with a return address on the stack that points after the call we patched
2439 // into the exception handler. We have the following register state:
2440 // rax,: exception
2441 // rbx,: exception handler
2442 // rdx: throwing pc
2443 // So in this case we simply jam rdx into the useless return address and
2444 // the stack looks just like we want.
2445 //
2446 // At this point we need to de-opt. We save the argument return
2447 // registers. We call the first C routine, fetch_unroll_info(). This
2448 // routine captures the return values and returns a structure which
2449 // describes the current frame size and the sizes of all replacement frames.
2450 // The current frame is compiled code and may contain many inlined
2451 // functions, each with their own JVM state. We pop the current frame, then
2452 // push all the new frames. Then we call the C routine unpack_frames() to
2453 // populate these frames. Finally unpack_frames() returns us the new target
2454 // address. Notice that callee-save registers are BLOWN here; they have
2455 // already been captured in the vframeArray at the time the return PC was
2456 // patched.
2457 address start = __ pc();
2458 Label cont;
2459
2460 // Prolog for non exception case!
2461
2462 // Save everything in sight.
2463
2464 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2465 // Normal deoptimization
2466 __ push(Deoptimization::Unpack_deopt);
2467 __ jmp(cont);
2468
2469 int reexecute_offset = __ pc() - start;
2470
2471 // Reexecute case
2472 // return address is the pc describes what bci to do re-execute at
2473
2474 // No need to update map as each call to save_live_registers will produce identical oopmap
2475 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2476
2477 __ push(Deoptimization::Unpack_reexecute);
2478 __ jmp(cont);
2479
2480 int exception_offset = __ pc() - start;
2481
2482 // Prolog for exception case
2483
2484 // all registers are dead at this entry point, except for rax, and
2485 // rdx which contain the exception oop and exception pc
2486 // respectively. Set them in TLS and fall thru to the
2487 // unpack_with_exception_in_tls entry point.
2488
2489 __ get_thread(rdi);
2490 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2491 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2492
2493 int exception_in_tls_offset = __ pc() - start;
2494
2495 // new implementation because exception oop is now passed in JavaThread
2496
2497 // Prolog for exception case
2498 // All registers must be preserved because they might be used by LinearScan
2499 // Exceptiop oop and throwing PC are passed in JavaThread
2500 // tos: stack at point of call to method that threw the exception (i.e. only
2501 // args are on the stack, no return address)
2502
2503 // make room on stack for the return address
2504 // It will be patched later with the throwing pc. The correct value is not
2505 // available now because loading it from memory would destroy registers.
2506 __ push(0);
2507
2508 // Save everything in sight.
2509
2510 // No need to update map as each call to save_live_registers will produce identical oopmap
2511 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2512
2513 // Now it is safe to overwrite any register
2514
2515 // store the correct deoptimization type
2516 __ push(Deoptimization::Unpack_exception);
2517
2518 // load throwing pc from JavaThread and patch it as the return address
2519 // of the current frame. Then clear the field in JavaThread
2520 __ get_thread(rdi);
2521 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2522 __ movptr(Address(rbp, wordSize), rdx);
2523 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2524
2525 #ifdef ASSERT
2526 // verify that there is really an exception oop in JavaThread
2527 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2528 __ verify_oop(rax);
2529
2530 // verify that there is no pending exception
2531 Label no_pending_exception;
2532 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2533 __ testptr(rax, rax);
2534 __ jcc(Assembler::zero, no_pending_exception);
2535 __ stop("must not have pending exception here");
2536 __ bind(no_pending_exception);
2537 #endif
2538
2539 __ bind(cont);
2540
2541 // Compiled code leaves the floating point stack dirty, empty it.
2542 __ empty_FPU_stack();
2543
2544
2545 // Call C code. Need thread and this frame, but NOT official VM entry
2546 // crud. We cannot block on this call, no GC can happen.
2547 __ get_thread(rcx);
2548 __ push(rcx);
2549 // fetch_unroll_info needs to call last_java_frame()
2550 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2551
2552 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2553
2554 // Need to have an oopmap that tells fetch_unroll_info where to
2555 // find any register it might need.
2556
2557 oop_maps->add_gc_map( __ pc()-start, map);
2558
2559 // Discard args to fetch_unroll_info
2560 __ pop(rcx);
2561 __ pop(rcx);
2562
2563 __ get_thread(rcx);
2564 __ reset_last_Java_frame(rcx, false, false);
2565
2566 // Load UnrollBlock into EDI
2567 __ mov(rdi, rax);
2568
2569 // Move the unpack kind to a safe place in the UnrollBlock because
2570 // we are very short of registers
2571
2572 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2573 // retrieve the deopt kind from the UnrollBlock.
2574 __ movl(rax, unpack_kind);
2575
2576 Label noException;
2577 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2578 __ jcc(Assembler::notEqual, noException);
2579 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2580 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2581 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2582 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2583
2584 __ verify_oop(rax);
2585
2586 // Overwrite the result registers with the exception results.
2587 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2588 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2589
2590 __ bind(noException);
2591
2592 // Stack is back to only having register save data on the stack.
2593 // Now restore the result registers. Everything else is either dead or captured
2594 // in the vframeArray.
2595
2596 RegisterSaver::restore_result_registers(masm);
2597
2598 // Non standard control word may be leaked out through a safepoint blob, and we can
2599 // deopt at a poll point with the non standard control word. However, we should make
2600 // sure the control word is correct after restore_result_registers.
2601 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2602
2603 // All of the register save area has been popped of the stack. Only the
2604 // return address remains.
2605
2606 // Pop all the frames we must move/replace.
2607 //
2608 // Frame picture (youngest to oldest)
2609 // 1: self-frame (no frame link)
2610 // 2: deopting frame (no frame link)
2611 // 3: caller of deopting frame (could be compiled/interpreted).
2612 //
2613 // Note: by leaving the return address of self-frame on the stack
2614 // and using the size of frame 2 to adjust the stack
2615 // when we are done the return to frame 3 will still be on the stack.
2616
2617 // Pop deoptimized frame
2618 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2619
2620 // sp should be pointing at the return address to the caller (3)
2621
2622 // Pick up the initial fp we should save
2623 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2624 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2625
2626 #ifdef ASSERT
2627 // Compilers generate code that bang the stack by as much as the
2628 // interpreter would need. So this stack banging should never
2629 // trigger a fault. Verify that it does not on non product builds.
2630 if (UseStackBanging) {
2631 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2632 __ bang_stack_size(rbx, rcx);
2633 }
2634 #endif
2635
2636 // Load array of frame pcs into ECX
2637 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2638
2639 __ pop(rsi); // trash the old pc
2640
2641 // Load array of frame sizes into ESI
2642 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2643
2644 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2645
2646 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2647 __ movl(counter, rbx);
2648
2649 // Now adjust the caller's stack to make up for the extra locals
2650 // but record the original sp so that we can save it in the skeletal interpreter
2651 // frame and the stack walking of interpreter_sender will get the unextended sp
2652 // value and not the "real" sp value.
2653
2654 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2655 __ movptr(sp_temp, rsp);
2656 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2657 __ subptr(rsp, rbx);
2658
2659 // Push interpreter frames in a loop
2660 Label loop;
2661 __ bind(loop);
2662 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2663 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2664 __ pushptr(Address(rcx, 0)); // save return address
2665 __ enter(); // save old & set new rbp,
2666 __ subptr(rsp, rbx); // Prolog!
2667 __ movptr(rbx, sp_temp); // sender's sp
2668 // This value is corrected by layout_activation_impl
2669 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2670 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2671 __ movptr(sp_temp, rsp); // pass to next frame
2672 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2673 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2674 __ decrementl(counter); // decrement counter
2675 __ jcc(Assembler::notZero, loop);
2676 __ pushptr(Address(rcx, 0)); // save final return address
2677
2678 // Re-push self-frame
2679 __ enter(); // save old & set new rbp,
2680
2681 // Return address and rbp, are in place
2682 // We'll push additional args later. Just allocate a full sized
2683 // register save area
2684 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2685
2686 // Restore frame locals after moving the frame
2687 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2688 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2689 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2690 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2691 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2692
2693 // Set up the args to unpack_frame
2694
2695 __ pushl(unpack_kind); // get the unpack_kind value
2696 __ get_thread(rcx);
2697 __ push(rcx);
2698
2699 // set last_Java_sp, last_Java_fp
2700 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2701
2702 // Call C code. Need thread but NOT official VM entry
2703 // crud. We cannot block on this call, no GC can happen. Call should
2704 // restore return values to their stack-slots with the new SP.
2705 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2706 // Set an oopmap for the call site
2707 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2708
2709 // rax, contains the return result type
2710 __ push(rax);
2711
2712 __ get_thread(rcx);
2713 __ reset_last_Java_frame(rcx, false, false);
2714
2715 // Collect return values
2716 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2717 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2718
2719 // Clear floating point stack before returning to interpreter
2720 __ empty_FPU_stack();
2721
2722 // Check if we should push the float or double return value.
2723 Label results_done, yes_double_value;
2724 __ cmpl(Address(rsp, 0), T_DOUBLE);
2725 __ jcc (Assembler::zero, yes_double_value);
2726 __ cmpl(Address(rsp, 0), T_FLOAT);
2727 __ jcc (Assembler::notZero, results_done);
2728
2729 // return float value as expected by interpreter
2730 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2731 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2732 __ jmp(results_done);
2733
2734 // return double value as expected by interpreter
2735 __ bind(yes_double_value);
2736 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2737 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2738
2739 __ bind(results_done);
2740
2741 // Pop self-frame.
2742 __ leave(); // Epilog!
2743
2744 // Jump to interpreter
2745 __ ret(0);
2746
2747 // -------------
2748 // make sure all code is generated
2749 masm->flush();
2750
2751 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2752 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2753 }
2754
2755
2756 #ifdef COMPILER2
2757 //------------------------------generate_uncommon_trap_blob--------------------
2758 void SharedRuntime::generate_uncommon_trap_blob() {
2759 // allocate space for the code
2760 ResourceMark rm;
2761 // setup code generation tools
2762 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2763 MacroAssembler* masm = new MacroAssembler(&buffer);
2764
2765 enum frame_layout {
2766 arg0_off, // thread sp + 0 // Arg location for
2767 arg1_off, // unloaded_class_index sp + 1 // calling C
2768 arg2_off, // exec_mode sp + 2
2769 // The frame sender code expects that rbp will be in the "natural" place and
2770 // will override any oopMap setting for it. We must therefore force the layout
2771 // so that it agrees with the frame sender code.
2772 rbp_off, // callee saved register sp + 3
2773 return_off, // slot for return address sp + 4
2774 framesize
2775 };
2776
2777 address start = __ pc();
2778
2779 if (UseRTMLocking) {
2780 // Abort RTM transaction before possible nmethod deoptimization.
2781 __ xabort(0);
2782 }
2783
2784 // Push self-frame.
2785 __ subptr(rsp, return_off*wordSize); // Epilog!
2786
2787 // rbp, is an implicitly saved callee saved register (i.e. the calling
2788 // convention will save restore it in prolog/epilog) Other than that
2789 // there are no callee save registers no that adapter frames are gone.
2790 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2791
2792 // Clear the floating point exception stack
2793 __ empty_FPU_stack();
2794
2795 // set last_Java_sp
2796 __ get_thread(rdx);
2797 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2798
2799 // Call C code. Need thread but NOT official VM entry
2800 // crud. We cannot block on this call, no GC can happen. Call should
2801 // capture callee-saved registers as well as return values.
2802 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2803 // argument already in ECX
2804 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2805 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2806 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2807
2808 // Set an oopmap for the call site
2809 OopMapSet *oop_maps = new OopMapSet();
2810 OopMap* map = new OopMap( framesize, 0 );
2811 // No oopMap for rbp, it is known implicitly
2812
2813 oop_maps->add_gc_map( __ pc()-start, map);
2814
2815 __ get_thread(rcx);
2816
2817 __ reset_last_Java_frame(rcx, false, false);
2818
2819 // Load UnrollBlock into EDI
2820 __ movptr(rdi, rax);
2821
2822 #ifdef ASSERT
2823 { Label L;
2824 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2825 (int32_t)Deoptimization::Unpack_uncommon_trap);
2826 __ jcc(Assembler::equal, L);
2827 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2828 __ bind(L);
2829 }
2830 #endif
2831
2832 // Pop all the frames we must move/replace.
2833 //
2834 // Frame picture (youngest to oldest)
2835 // 1: self-frame (no frame link)
2836 // 2: deopting frame (no frame link)
2837 // 3: caller of deopting frame (could be compiled/interpreted).
2838
2839 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2840 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2841
2842 // Pop deoptimized frame
2843 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2844 __ addptr(rsp, rcx);
2845
2846 // sp should be pointing at the return address to the caller (3)
2847
2848 // Pick up the initial fp we should save
2849 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2850 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2851
2852 #ifdef ASSERT
2853 // Compilers generate code that bang the stack by as much as the
2854 // interpreter would need. So this stack banging should never
2855 // trigger a fault. Verify that it does not on non product builds.
2856 if (UseStackBanging) {
2857 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2858 __ bang_stack_size(rbx, rcx);
2859 }
2860 #endif
2861
2862 // Load array of frame pcs into ECX
2863 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2864
2865 __ pop(rsi); // trash the pc
2866
2867 // Load array of frame sizes into ESI
2868 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2869
2870 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2871
2872 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2873 __ movl(counter, rbx);
2874
2875 // Now adjust the caller's stack to make up for the extra locals
2876 // but record the original sp so that we can save it in the skeletal interpreter
2877 // frame and the stack walking of interpreter_sender will get the unextended sp
2878 // value and not the "real" sp value.
2879
2880 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2881 __ movptr(sp_temp, rsp);
2882 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2883 __ subptr(rsp, rbx);
2884
2885 // Push interpreter frames in a loop
2886 Label loop;
2887 __ bind(loop);
2888 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2889 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2890 __ pushptr(Address(rcx, 0)); // save return address
2891 __ enter(); // save old & set new rbp,
2892 __ subptr(rsp, rbx); // Prolog!
2893 __ movptr(rbx, sp_temp); // sender's sp
2894 // This value is corrected by layout_activation_impl
2895 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2896 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2897 __ movptr(sp_temp, rsp); // pass to next frame
2898 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2899 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2900 __ decrementl(counter); // decrement counter
2901 __ jcc(Assembler::notZero, loop);
2902 __ pushptr(Address(rcx, 0)); // save final return address
2903
2904 // Re-push self-frame
2905 __ enter(); // save old & set new rbp,
2906 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2907
2908
2909 // set last_Java_sp, last_Java_fp
2910 __ get_thread(rdi);
2911 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2912
2913 // Call C code. Need thread but NOT official VM entry
2914 // crud. We cannot block on this call, no GC can happen. Call should
2915 // restore return values to their stack-slots with the new SP.
2916 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2917 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2918 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2919 // Set an oopmap for the call site
2920 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2921
2922 __ get_thread(rdi);
2923 __ reset_last_Java_frame(rdi, true, false);
2924
2925 // Pop self-frame.
2926 __ leave(); // Epilog!
2927
2928 // Jump to interpreter
2929 __ ret(0);
2930
2931 // -------------
2932 // make sure all code is generated
2933 masm->flush();
2934
2935 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2936 }
2937 #endif // COMPILER2
2938
2939 //------------------------------generate_handler_blob------
2940 //
2941 // Generate a special Compile2Runtime blob that saves all registers,
2942 // setup oopmap, and calls safepoint code to stop the compiled code for
2943 // a safepoint.
2944 //
2945 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2946
2947 // Account for thread arg in our frame
2948 const int additional_words = 1;
2949 int frame_size_in_words;
2950
2951 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2952
2953 ResourceMark rm;
2954 OopMapSet *oop_maps = new OopMapSet();
2955 OopMap* map;
2956
2957 // allocate space for the code
2958 // setup code generation tools
2959 CodeBuffer buffer("handler_blob", 1024, 512);
2960 MacroAssembler* masm = new MacroAssembler(&buffer);
2961
2962 const Register java_thread = rdi; // callee-saved for VC++
2963 address start = __ pc();
2964 address call_pc = NULL;
2965 bool cause_return = (poll_type == POLL_AT_RETURN);
2966 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2967
2968 if (UseRTMLocking) {
2969 // Abort RTM transaction before calling runtime
2970 // because critical section will be large and will be
2971 // aborted anyway. Also nmethod could be deoptimized.
2972 __ xabort(0);
2973 }
2974
2975 // If cause_return is true we are at a poll_return and there is
2976 // the return address on the stack to the caller on the nmethod
2977 // that is safepoint. We can leave this return on the stack and
2978 // effectively complete the return and safepoint in the caller.
2979 // Otherwise we push space for a return address that the safepoint
2980 // handler will install later to make the stack walking sensible.
2981 if (!cause_return)
2982 __ push(rbx); // Make room for return address (or push it again)
2983
2984 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2985
2986 // The following is basically a call_VM. However, we need the precise
2987 // address of the call in order to generate an oopmap. Hence, we do all the
2988 // work ourselves.
2989
2990 // Push thread argument and setup last_Java_sp
2991 __ get_thread(java_thread);
2992 __ push(java_thread);
2993 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2994
2995 // if this was not a poll_return then we need to correct the return address now.
2996 if (!cause_return) {
2997 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2998 __ movptr(Address(rbp, wordSize), rax);
2999 }
3000
3001 // do the call
3002 __ call(RuntimeAddress(call_ptr));
3003
3004 // Set an oopmap for the call site. This oopmap will map all
3005 // oop-registers and debug-info registers as callee-saved. This
3006 // will allow deoptimization at this safepoint to find all possible
3007 // debug-info recordings, as well as let GC find all oops.
3008
3009 oop_maps->add_gc_map( __ pc() - start, map);
3010
3011 // Discard arg
3012 __ pop(rcx);
3013
3014 Label noException;
3015
3016 // Clear last_Java_sp again
3017 __ get_thread(java_thread);
3018 __ reset_last_Java_frame(java_thread, false, false);
3019
3020 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3021 __ jcc(Assembler::equal, noException);
3022
3023 // Exception pending
3024 RegisterSaver::restore_live_registers(masm, save_vectors);
3025
3026 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3027
3028 __ bind(noException);
3029
3030 // Normal exit, register restoring and exit
3031 RegisterSaver::restore_live_registers(masm, save_vectors);
3032
3033 __ ret(0);
3034
3035 // make sure all code is generated
3036 masm->flush();
3037
3038 // Fill-out other meta info
3039 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3040 }
3041
3042 //
3043 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3044 //
3045 // Generate a stub that calls into vm to find out the proper destination
3046 // of a java call. All the argument registers are live at this point
3047 // but since this is generic code we don't know what they are and the caller
3048 // must do any gc of the args.
3049 //
3050 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3051 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3052
3053 // allocate space for the code
3054 ResourceMark rm;
3055
3056 CodeBuffer buffer(name, 1000, 512);
3057 MacroAssembler* masm = new MacroAssembler(&buffer);
3058
3059 int frame_size_words;
3060 enum frame_layout {
3061 thread_off,
3062 extra_words };
3063
3064 OopMapSet *oop_maps = new OopMapSet();
3065 OopMap* map = NULL;
3066
3067 int start = __ offset();
3068
3069 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3070
3071 int frame_complete = __ offset();
3072
3073 const Register thread = rdi;
3074 __ get_thread(rdi);
3075
3076 __ push(thread);
3077 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3078
3079 __ call(RuntimeAddress(destination));
3080
3081
3082 // Set an oopmap for the call site.
3083 // We need this not only for callee-saved registers, but also for volatile
3084 // registers that the compiler might be keeping live across a safepoint.
3085
3086 oop_maps->add_gc_map( __ offset() - start, map);
3087
3088 // rax, contains the address we are going to jump to assuming no exception got installed
3089
3090 __ addptr(rsp, wordSize);
3091
3092 // clear last_Java_sp
3093 __ reset_last_Java_frame(thread, true, false);
3094 // check for pending exceptions
3095 Label pending;
3096 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3097 __ jcc(Assembler::notEqual, pending);
3098
3099 // get the returned Method*
3100 __ get_vm_result_2(rbx, thread);
3101 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3102
3103 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3104
3105 RegisterSaver::restore_live_registers(masm);
3106
3107 // We are back the the original state on entry and ready to go.
3108
3109 __ jmp(rax);
3110
3111 // Pending exception after the safepoint
3112
3113 __ bind(pending);
3114
3115 RegisterSaver::restore_live_registers(masm);
3116
3117 // exception pending => remove activation and forward to exception handler
3118
3119 __ get_thread(thread);
3120 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3121 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3122 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3123
3124 // -------------
3125 // make sure all code is generated
3126 masm->flush();
3127
3128 // return the blob
3129 // frame_size_words or bytes??
3130 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3131 }