322
323 // Recover XMM & FPU state
324 if( UseSSE == 1 ) {
325 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
326 } else if( UseSSE >= 2 ) {
327 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
328 }
329 __ movptr(rax, Address(rsp, rax_off*wordSize));
330 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
331 // Pop all of the register save are off the stack except the return address
332 __ addptr(rsp, return_off * wordSize);
333 }
334
335 // Is vector's size (in bytes) bigger than a size saved by default?
336 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
337 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
338 bool SharedRuntime::is_wide_vector(int size) {
339 return size > 16;
340 }
341
342 // The java_calling_convention describes stack locations as ideal slots on
343 // a frame with no abi restrictions. Since we must observe abi restrictions
344 // (like the placement of the register window) the slots must be biased by
345 // the following value.
346 static int reg2offset_in(VMReg r) {
347 // Account for saved rbp, and return address
348 // This should really be in_preserve_stack_slots
349 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
350 }
351
352 static int reg2offset_out(VMReg r) {
353 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
354 }
355
356 // ---------------------------------------------------------------------------
357 // Read the array of BasicTypes from a signature, and compute where the
358 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
359 // quantities. Values less than SharedInfo::stack0 are registers, those above
360 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
361 // as framesizes are fixed.
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322
323 // Recover XMM & FPU state
324 if( UseSSE == 1 ) {
325 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
326 } else if( UseSSE >= 2 ) {
327 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
328 }
329 __ movptr(rax, Address(rsp, rax_off*wordSize));
330 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
331 // Pop all of the register save are off the stack except the return address
332 __ addptr(rsp, return_off * wordSize);
333 }
334
335 // Is vector's size (in bytes) bigger than a size saved by default?
336 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
337 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
338 bool SharedRuntime::is_wide_vector(int size) {
339 return size > 16;
340 }
341
342 size_t SharedRuntime::trampoline_size() {
343 return 16;
344 }
345
346 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
347 __ jump(RuntimeAddress(destination));
348 }
349
350 // The java_calling_convention describes stack locations as ideal slots on
351 // a frame with no abi restrictions. Since we must observe abi restrictions
352 // (like the placement of the register window) the slots must be biased by
353 // the following value.
354 static int reg2offset_in(VMReg r) {
355 // Account for saved rbp, and return address
356 // This should really be in_preserve_stack_slots
357 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
358 }
359
360 static int reg2offset_out(VMReg r) {
361 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
362 }
363
364 // ---------------------------------------------------------------------------
365 // Read the array of BasicTypes from a signature, and compute where the
366 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
367 // quantities. Values less than SharedInfo::stack0 are registers, those above
368 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
369 // as framesizes are fixed.
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