258 }
259
260 // Cortex A53
261 if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03)) {
262 _features |= CPU_A53MAC;
263 if (FLAG_IS_DEFAULT(UseSIMDForArrayEquals)) {
264 FLAG_SET_DEFAULT(UseSIMDForArrayEquals, false);
265 }
266 }
267
268 // Cortex A73
269 if (_cpu == CPU_ARM && (_model == 0xd09 || _model2 == 0xd09)) {
270 if (FLAG_IS_DEFAULT(SoftwarePrefetchHintDistance)) {
271 FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, -1);
272 }
273 // A73 is faster with short-and-easy-for-speculative-execution-loop
274 if (FLAG_IS_DEFAULT(UseSimpleArrayEquals)) {
275 FLAG_SET_DEFAULT(UseSimpleArrayEquals, true);
276 }
277 }
278
279 if (_cpu == CPU_ARM && (_model == 0xd07 || _model2 == 0xd07)) _features |= CPU_STXR_PREFETCH;
280 // If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model is an A57 (0xd07)
281 // we assume the worst and assume we could be on a big little system and have
282 // undisclosed A53 cores which we could be swapped to at any stage
283 if (_cpu == CPU_ARM && cpu_lines == 1 && _model == 0xd07) _features |= CPU_A53MAC;
284
285 sprintf(buf, "0x%02x:0x%x:0x%03x:%d", _cpu, _variant, _model, _revision);
286 if (_model2) sprintf(buf+strlen(buf), "(0x%03x)", _model2);
287 if (auxv & HWCAP_ASIMD) strcat(buf, ", simd");
288 if (auxv & HWCAP_CRC32) strcat(buf, ", crc");
289 if (auxv & HWCAP_AES) strcat(buf, ", aes");
290 if (auxv & HWCAP_SHA1) strcat(buf, ", sha1");
291 if (auxv & HWCAP_SHA2) strcat(buf, ", sha256");
292 if (auxv & HWCAP_SHA512) strcat(buf, ", sha512");
293 if (auxv & HWCAP_ATOMICS) strcat(buf, ", lse");
294
295 _features_string = os::strdup(buf);
296
297 if (FLAG_IS_DEFAULT(UseCRC32)) {
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258 }
259
260 // Cortex A53
261 if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03)) {
262 _features |= CPU_A53MAC;
263 if (FLAG_IS_DEFAULT(UseSIMDForArrayEquals)) {
264 FLAG_SET_DEFAULT(UseSIMDForArrayEquals, false);
265 }
266 }
267
268 // Cortex A73
269 if (_cpu == CPU_ARM && (_model == 0xd09 || _model2 == 0xd09)) {
270 if (FLAG_IS_DEFAULT(SoftwarePrefetchHintDistance)) {
271 FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, -1);
272 }
273 // A73 is faster with short-and-easy-for-speculative-execution-loop
274 if (FLAG_IS_DEFAULT(UseSimpleArrayEquals)) {
275 FLAG_SET_DEFAULT(UseSimpleArrayEquals, true);
276 }
277 }
278
279 if (_cpu == CPU_ARM) {
280 if (FLAG_IS_DEFAULT(UseSignumIntrinsic)) {
281 FLAG_SET_DEFAULT(UseSignumIntrinsic, true);
282 }
283 }
284
285 if (_cpu == CPU_ARM && (_model == 0xd07 || _model2 == 0xd07)) _features |= CPU_STXR_PREFETCH;
286 // If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model is an A57 (0xd07)
287 // we assume the worst and assume we could be on a big little system and have
288 // undisclosed A53 cores which we could be swapped to at any stage
289 if (_cpu == CPU_ARM && cpu_lines == 1 && _model == 0xd07) _features |= CPU_A53MAC;
290
291 sprintf(buf, "0x%02x:0x%x:0x%03x:%d", _cpu, _variant, _model, _revision);
292 if (_model2) sprintf(buf+strlen(buf), "(0x%03x)", _model2);
293 if (auxv & HWCAP_ASIMD) strcat(buf, ", simd");
294 if (auxv & HWCAP_CRC32) strcat(buf, ", crc");
295 if (auxv & HWCAP_AES) strcat(buf, ", aes");
296 if (auxv & HWCAP_SHA1) strcat(buf, ", sha1");
297 if (auxv & HWCAP_SHA2) strcat(buf, ", sha256");
298 if (auxv & HWCAP_SHA512) strcat(buf, ", sha512");
299 if (auxv & HWCAP_ATOMICS) strcat(buf, ", lse");
300
301 _features_string = os::strdup(buf);
302
303 if (FLAG_IS_DEFAULT(UseCRC32)) {
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