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src/share/vm/c1/c1_LIRGenerator.cpp
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@@ -1,7 +1,7 @@
/*
- * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
@@ -21,10 +21,11 @@
* questions.
*
*/
#include "precompiled.hpp"
+#include "c1/c1_Defs.hpp"
#include "c1/c1_Compilation.hpp"
#include "c1/c1_FrameMap.hpp"
#include "c1/c1_Instruction.hpp"
#include "c1/c1_LIRAssembler.hpp"
#include "c1/c1_LIRGenerator.hpp"
@@ -44,14 +45,11 @@
#define __ gen()->lir(__FILE__, __LINE__)->
#else
#define __ gen()->lir()->
#endif
-// TODO: ARM - Use some recognizable constant which still fits architectural constraints
-#ifdef ARM
-#define PATCHED_ADDR (204)
-#else
+#ifndef PATCHED_ADDR
#define PATCHED_ADDR (max_jint)
#endif
void PhiResolverState::reset(int max_vregs) {
// Initialize array sizes
@@ -1597,29 +1595,13 @@
}
addr = ptr;
}
assert(addr->is_register(), "must be a register at this point");
-#ifdef ARM
- // TODO: ARM - move to platform-dependent code
- LIR_Opr tmp = FrameMap::R14_opr;
- if (VM_Version::supports_movw()) {
- __ move((LIR_Opr)card_table_base, tmp);
- } else {
- __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
- }
-
- CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
- LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
- if(((int)ct->byte_map_base & 0xff) == 0) {
- __ move(tmp, card_addr);
- } else {
- LIR_Opr tmp_zero = new_register(T_INT);
- __ move(LIR_OprFact::intConst(0), tmp_zero);
- __ move(tmp_zero, card_addr);
- }
-#else // ARM
+#ifdef CARDTABLEMODREF_POST_BARRIER_HELPER
+ CardTableModRef_post_barrier_helper(addr, card_table_base);
+#else
LIR_Opr tmp = new_pointer_register();
if (TwoOperandLIRForm) {
__ move(addr, tmp);
__ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
} else {
@@ -1631,11 +1613,11 @@
} else {
__ move(LIR_OprFact::intConst(0),
new LIR_Address(tmp, load_constant(card_table_base),
T_BYTE));
}
-#endif // ARM
+#endif
}
//------------------------field access--------------------------------------
@@ -2119,11 +2101,11 @@
assert(index_op->type() == T_INT, "only int constants supported");
addr = new LIR_Address(base_op, index_op->as_jint(), dst_type);
} else {
#ifdef X86
addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
-#elif defined(ARM)
+#elif defined(GENERATE_ADDRESS_IS_PREFERRED)
addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
#else
if (index_op->is_illegal() || log2_scale == 0) {
addr = new LIR_Address(base_op, index_op, dst_type);
} else {
@@ -2173,10 +2155,13 @@
set_no_result(x);
LIR_Opr base_op = base.result();
LIR_Opr index_op = idx.result();
+#ifdef GENERATE_ADDRESS_IS_PREFERRED
+ LIR_Address* addr = generate_address(base_op, index_op, log2_scale, 0, x->basic_type());
+#else
#ifndef _LP64
if (base_op->type() == T_LONG) {
base_op = new_register(T_INT);
__ convert(Bytecodes::_l2i, base.result(), base_op);
}
@@ -2206,10 +2191,11 @@
// TODO: ARM also allows embedded shift in the address
__ shift_left(index_op, log2_scale, index_op);
}
LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
+#endif // !GENERATE_ADDRESS_IS_PREFERRED
__ move(value.result(), addr);
}
void LIRGenerator::do_UnsafeGetObject(UnsafeGetObject* x) {
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