1 /*
2 * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
823 // RegL RegI RegFlags RegF RegD INTPRESSURE FLOATPRESSURE
824 // IA32 2 1 1 1 1 6 6
825 // IA64 1 1 1 1 1 50 41
826 // SPARC 2 2 2 2 2 48 (24) 52 (26)
827 // SPARCV9 2 2 2 2 2 48 (24) 52 (26)
828 // AMD64 1 1 1 1 1 14 15
829 // -----------------------------------------------------
830 #if defined(SPARC)
831 lrg.set_reg_pressure(2); // use for v9 as well
832 #else
833 lrg.set_reg_pressure(1); // normally one value per register
834 #endif
835 if( n_type->isa_oop_ptr() ) {
836 lrg._is_oop = 1;
837 }
838 break;
839 case Op_RegL: // Check for long or double
840 case Op_RegD:
841 lrg.set_num_regs(2);
842 // Define platform specific register pressure
843 #if defined(SPARC) || defined(ARM)
844 lrg.set_reg_pressure(2);
845 #elif defined(IA32)
846 if( ireg == Op_RegL ) {
847 lrg.set_reg_pressure(2);
848 } else {
849 lrg.set_reg_pressure(1);
850 }
851 #else
852 lrg.set_reg_pressure(1); // normally one value per register
853 #endif
854 // If this def of a double forces a mis-aligned double,
855 // flag as '_fat_proj' - really flag as allowing misalignment
856 // AND changes how we count interferences. A mis-aligned
857 // double can interfere with TWO aligned pairs, or effectively
858 // FOUR registers!
859 if (rm.is_misaligned_pair()) {
860 lrg._fat_proj = 1;
861 lrg._is_bound = 1;
862 }
863 break;
|
1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
823 // RegL RegI RegFlags RegF RegD INTPRESSURE FLOATPRESSURE
824 // IA32 2 1 1 1 1 6 6
825 // IA64 1 1 1 1 1 50 41
826 // SPARC 2 2 2 2 2 48 (24) 52 (26)
827 // SPARCV9 2 2 2 2 2 48 (24) 52 (26)
828 // AMD64 1 1 1 1 1 14 15
829 // -----------------------------------------------------
830 #if defined(SPARC)
831 lrg.set_reg_pressure(2); // use for v9 as well
832 #else
833 lrg.set_reg_pressure(1); // normally one value per register
834 #endif
835 if( n_type->isa_oop_ptr() ) {
836 lrg._is_oop = 1;
837 }
838 break;
839 case Op_RegL: // Check for long or double
840 case Op_RegD:
841 lrg.set_num_regs(2);
842 // Define platform specific register pressure
843 #if defined(SPARC) || defined(ARM32)
844 lrg.set_reg_pressure(2);
845 #elif defined(IA32)
846 if( ireg == Op_RegL ) {
847 lrg.set_reg_pressure(2);
848 } else {
849 lrg.set_reg_pressure(1);
850 }
851 #else
852 lrg.set_reg_pressure(1); // normally one value per register
853 #endif
854 // If this def of a double forces a mis-aligned double,
855 // flag as '_fat_proj' - really flag as allowing misalignment
856 // AND changes how we count interferences. A mis-aligned
857 // double can interfere with TWO aligned pairs, or effectively
858 // FOUR registers!
859 if (rm.is_misaligned_pair()) {
860 lrg._fat_proj = 1;
861 lrg._is_bound = 1;
862 }
863 break;
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