830 // RegL RegI RegFlags RegF RegD INTPRESSURE FLOATPRESSURE
831 // IA32 2 1 1 1 1 6 6
832 // IA64 1 1 1 1 1 50 41
833 // SPARC 2 2 2 2 2 48 (24) 52 (26)
834 // SPARCV9 2 2 2 2 2 48 (24) 52 (26)
835 // AMD64 1 1 1 1 1 14 15
836 // -----------------------------------------------------
837 #if defined(SPARC)
838 lrg.set_reg_pressure(2); // use for v9 as well
839 #else
840 lrg.set_reg_pressure(1); // normally one value per register
841 #endif
842 if( n_type->isa_oop_ptr() ) {
843 lrg._is_oop = 1;
844 }
845 break;
846 case Op_RegL: // Check for long or double
847 case Op_RegD:
848 lrg.set_num_regs(2);
849 // Define platform specific register pressure
850 #if defined(SPARC) || defined(ARM)
851 lrg.set_reg_pressure(2);
852 #elif defined(IA32)
853 if( ireg == Op_RegL ) {
854 lrg.set_reg_pressure(2);
855 } else {
856 lrg.set_reg_pressure(1);
857 }
858 #else
859 lrg.set_reg_pressure(1); // normally one value per register
860 #endif
861 // If this def of a double forces a mis-aligned double,
862 // flag as '_fat_proj' - really flag as allowing misalignment
863 // AND changes how we count interferences. A mis-aligned
864 // double can interfere with TWO aligned pairs, or effectively
865 // FOUR registers!
866 if (rm.is_misaligned_pair()) {
867 lrg._fat_proj = 1;
868 lrg._is_bound = 1;
869 }
870 break;
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830 // RegL RegI RegFlags RegF RegD INTPRESSURE FLOATPRESSURE
831 // IA32 2 1 1 1 1 6 6
832 // IA64 1 1 1 1 1 50 41
833 // SPARC 2 2 2 2 2 48 (24) 52 (26)
834 // SPARCV9 2 2 2 2 2 48 (24) 52 (26)
835 // AMD64 1 1 1 1 1 14 15
836 // -----------------------------------------------------
837 #if defined(SPARC)
838 lrg.set_reg_pressure(2); // use for v9 as well
839 #else
840 lrg.set_reg_pressure(1); // normally one value per register
841 #endif
842 if( n_type->isa_oop_ptr() ) {
843 lrg._is_oop = 1;
844 }
845 break;
846 case Op_RegL: // Check for long or double
847 case Op_RegD:
848 lrg.set_num_regs(2);
849 // Define platform specific register pressure
850 #if defined(SPARC) || defined(ARM32)
851 lrg.set_reg_pressure(2);
852 #elif defined(IA32)
853 if( ireg == Op_RegL ) {
854 lrg.set_reg_pressure(2);
855 } else {
856 lrg.set_reg_pressure(1);
857 }
858 #else
859 lrg.set_reg_pressure(1); // normally one value per register
860 #endif
861 // If this def of a double forces a mis-aligned double,
862 // flag as '_fat_proj' - really flag as allowing misalignment
863 // AND changes how we count interferences. A mis-aligned
864 // double can interfere with TWO aligned pairs, or effectively
865 // FOUR registers!
866 if (rm.is_misaligned_pair()) {
867 lrg._fat_proj = 1;
868 lrg._is_bound = 1;
869 }
870 break;
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