1 /*
2 * Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2106
2107 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2108 assert(interval->assigned_regHi() == any_reg, "must not have hi register");
2109 return LIR_OprFact::single_fpu(assigned_reg - pd_first_fpu_reg);
2110 }
2111
2112 case T_DOUBLE: {
2113 #ifdef X86
2114 if (UseSSE >= 2) {
2115 assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register");
2116 assert(interval->assigned_regHi() == any_reg, "must not have hi register (double xmm values are stored in one register)");
2117 return LIR_OprFact::double_xmm(assigned_reg - pd_first_xmm_reg);
2118 }
2119 #endif
2120
2121 #ifdef SPARC
2122 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2123 assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
2124 assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
2125 LIR_Opr result = LIR_OprFact::double_fpu(interval->assigned_regHi() - pd_first_fpu_reg, assigned_reg - pd_first_fpu_reg);
2126 #elif defined(ARM)
2127 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2128 assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
2129 assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
2130 LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg, interval->assigned_regHi() - pd_first_fpu_reg);
2131 #else
2132 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2133 assert(interval->assigned_regHi() == any_reg, "must not have hi register (double fpu values are stored in one register on Intel)");
2134 LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg);
2135 #endif
2136 return result;
2137 }
2138 #endif // __SOFTFP__
2139
2140 default: {
2141 ShouldNotReachHere();
2142 return LIR_OprFact::illegalOpr;
2143 }
2144 }
2145 }
2146 }
2695 // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of
2696 // the double as float registers in the native ordering. On X86,
2697 // fpu_regnrLo is a FPU stack slot whose VMReg represents
2698 // the low-order word of the double and fpu_regnrLo + 1 is the
2699 // name for the other half. *first and *second must represent the
2700 // least and most significant words, respectively.
2701
2702 #ifdef X86
2703 // the exact location of fpu stack values is only known
2704 // during fpu stack allocation, so the stack allocator object
2705 // must be present
2706 assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2707 assert(_fpu_stack_allocator != NULL, "must be present");
2708 opr = _fpu_stack_allocator->to_fpu_stack(opr);
2709
2710 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrLo is used)");
2711 #endif
2712 #ifdef SPARC
2713 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)");
2714 #endif
2715 #ifdef ARM
2716 assert(opr->fpu_regnrHi() == opr->fpu_regnrLo() + 1, "assumed in calculation (only fpu_regnrLo is used)");
2717 #endif
2718 #ifdef PPC
2719 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrHi is used)");
2720 #endif
2721
2722 #ifdef VM_LITTLE_ENDIAN
2723 VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrLo());
2724 #else
2725 VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrHi());
2726 #endif
2727
2728 #ifdef _LP64
2729 first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
2730 second = _int_0_scope_value;
2731 #else
2732 first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2733 // %%% This is probably a waste but we'll keep things as they were for now
2734 if (true) {
2735 VMReg rname_second = rname_first->next();
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1 /*
2 * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2106
2107 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2108 assert(interval->assigned_regHi() == any_reg, "must not have hi register");
2109 return LIR_OprFact::single_fpu(assigned_reg - pd_first_fpu_reg);
2110 }
2111
2112 case T_DOUBLE: {
2113 #ifdef X86
2114 if (UseSSE >= 2) {
2115 assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register");
2116 assert(interval->assigned_regHi() == any_reg, "must not have hi register (double xmm values are stored in one register)");
2117 return LIR_OprFact::double_xmm(assigned_reg - pd_first_xmm_reg);
2118 }
2119 #endif
2120
2121 #ifdef SPARC
2122 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2123 assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
2124 assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
2125 LIR_Opr result = LIR_OprFact::double_fpu(interval->assigned_regHi() - pd_first_fpu_reg, assigned_reg - pd_first_fpu_reg);
2126 #elif defined(ARM32)
2127 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2128 assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
2129 assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
2130 LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg, interval->assigned_regHi() - pd_first_fpu_reg);
2131 #else
2132 assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
2133 assert(interval->assigned_regHi() == any_reg, "must not have hi register (double fpu values are stored in one register on Intel)");
2134 LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg);
2135 #endif
2136 return result;
2137 }
2138 #endif // __SOFTFP__
2139
2140 default: {
2141 ShouldNotReachHere();
2142 return LIR_OprFact::illegalOpr;
2143 }
2144 }
2145 }
2146 }
2695 // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of
2696 // the double as float registers in the native ordering. On X86,
2697 // fpu_regnrLo is a FPU stack slot whose VMReg represents
2698 // the low-order word of the double and fpu_regnrLo + 1 is the
2699 // name for the other half. *first and *second must represent the
2700 // least and most significant words, respectively.
2701
2702 #ifdef X86
2703 // the exact location of fpu stack values is only known
2704 // during fpu stack allocation, so the stack allocator object
2705 // must be present
2706 assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2707 assert(_fpu_stack_allocator != NULL, "must be present");
2708 opr = _fpu_stack_allocator->to_fpu_stack(opr);
2709
2710 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrLo is used)");
2711 #endif
2712 #ifdef SPARC
2713 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)");
2714 #endif
2715 #ifdef ARM32
2716 assert(opr->fpu_regnrHi() == opr->fpu_regnrLo() + 1, "assumed in calculation (only fpu_regnrLo is used)");
2717 #endif
2718 #ifdef PPC
2719 assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrHi is used)");
2720 #endif
2721
2722 #ifdef VM_LITTLE_ENDIAN
2723 VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrLo());
2724 #else
2725 VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrHi());
2726 #endif
2727
2728 #ifdef _LP64
2729 first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
2730 second = _int_0_scope_value;
2731 #else
2732 first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2733 // %%% This is probably a waste but we'll keep things as they were for now
2734 if (true) {
2735 VMReg rname_second = rname_first->next();
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