40 Register addr, Register count, RegSet saved_regs);
41 void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
42 Register start, Register count, Register tmp, RegSet saved_regs);
43
44 void g1_write_barrier_pre(MacroAssembler* masm,
45 Register obj,
46 Register pre_val,
47 Register thread,
48 Register tmp,
49 bool tosca_live,
50 bool expand_call);
51
52 void g1_write_barrier_post(MacroAssembler* masm,
53 Register store_addr,
54 Register new_val,
55 Register thread,
56 Register tmp,
57 Register tmp2);
58
59 virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
60 Address dst, Register val, Register tmp1, Register tmp2);
61
62 public:
63 #ifdef COMPILER1
64 void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
65 void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
66
67 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
68 void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
69 #endif
70
71 void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
72 Register dst, Address src, Register tmp1, Register tmp_thread);
73 };
74
75 #endif // CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP
|
40 Register addr, Register count, RegSet saved_regs);
41 void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
42 Register start, Register count, Register tmp, RegSet saved_regs);
43
44 void g1_write_barrier_pre(MacroAssembler* masm,
45 Register obj,
46 Register pre_val,
47 Register thread,
48 Register tmp,
49 bool tosca_live,
50 bool expand_call);
51
52 void g1_write_barrier_post(MacroAssembler* masm,
53 Register store_addr,
54 Register new_val,
55 Register thread,
56 Register tmp,
57 Register tmp2);
58
59 virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
60 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
61
62 public:
63 #ifdef COMPILER1
64 void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
65 void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
66
67 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
68 void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
69 #endif
70
71 void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
72 Register dst, Address src, Register tmp1, Register tmp_thread);
73 };
74
75 #endif // CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP
|