1 /* 2 * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/macroAssembler.hpp" 28 #include "asm/macroAssembler.inline.hpp" 29 #include "code/debugInfoRec.hpp" 30 #include "code/icBuffer.hpp" 31 #include "code/vtableStubs.hpp" 32 #include "interpreter/interpreter.hpp" 33 #include "interpreter/interp_masm.hpp" 34 #include "logging/log.hpp" 35 #include "memory/resourceArea.hpp" 36 #include "oops/compiledICHolder.hpp" 37 #include "runtime/safepointMechanism.hpp" 38 #include "runtime/sharedRuntime.hpp" 39 #include "runtime/vframeArray.hpp" 40 #include "utilities/align.hpp" 41 #include "vmreg_aarch64.inline.hpp" 42 #ifdef COMPILER1 43 #include "c1/c1_Runtime1.hpp" 44 #endif 45 #if COMPILER2_OR_JVMCI 46 #include "adfiles/ad_aarch64.hpp" 47 #include "opto/runtime.hpp" 48 #endif 49 #if INCLUDE_JVMCI 50 #include "jvmci/jvmciJavaClasses.hpp" 51 #endif 52 53 #ifdef BUILTIN_SIM 54 #include "../../../../../../simulator/simulator.hpp" 55 #endif 56 57 #define __ masm-> 58 59 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 60 61 class SimpleRuntimeFrame { 62 63 public: 64 65 // Most of the runtime stubs have this simple frame layout. 66 // This class exists to make the layout shared in one place. 67 // Offsets are for compiler stack slots, which are jints. 68 enum layout { 69 // The frame sender code expects that rbp will be in the "natural" place and 70 // will override any oopMap setting for it. We must therefore force the layout 71 // so that it agrees with the frame sender code. 72 // we don't expect any arg reg save area so aarch64 asserts that 73 // frame::arg_reg_save_area_bytes == 0 74 rbp_off = 0, 75 rbp_off2, 76 return_off, return_off2, 77 framesize 78 }; 79 }; 80 81 // FIXME -- this is used by C1 82 class RegisterSaver { 83 public: 84 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); 85 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 86 87 // Offsets into the register save area 88 // Used by deoptimization when it is managing result register 89 // values on its own 90 91 static int r0_offset_in_bytes(void) { return (32 + r0->encoding()) * wordSize; } 92 static int reg_offset_in_bytes(Register r) { return r0_offset_in_bytes() + r->encoding() * wordSize; } 93 static int rmethod_offset_in_bytes(void) { return reg_offset_in_bytes(rmethod); } 94 static int rscratch1_offset_in_bytes(void) { return (32 + rscratch1->encoding()) * wordSize; } 95 static int v0_offset_in_bytes(void) { return 0; } 96 static int return_offset_in_bytes(void) { return (32 /* floats*/ + 31 /* gregs*/) * wordSize; } 97 98 // During deoptimization only the result registers need to be restored, 99 // all the other values have already been extracted. 100 static void restore_result_registers(MacroAssembler* masm); 101 102 // Capture info about frame layout 103 enum layout { 104 fpu_state_off = 0, 105 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1, 106 // The frame sender code expects that rfp will be in 107 // the "natural" place and will override any oopMap 108 // setting for it. We must therefore force the layout 109 // so that it agrees with the frame sender code. 110 r0_off = fpu_state_off+FPUStateSizeInWords, 111 rfp_off = r0_off + 30 * 2, 112 return_off = rfp_off + 2, // slot for return address 113 reg_save_size = return_off + 2}; 114 115 }; 116 117 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { 118 #if COMPILER2_OR_JVMCI 119 if (save_vectors) { 120 // Save upper half of vector registers 121 int vect_words = 32 * 8 / wordSize; 122 additional_frame_words += vect_words; 123 } 124 #else 125 assert(!save_vectors, "vectors are generated only by C2 and JVMCI"); 126 #endif 127 128 int frame_size_in_bytes = align_up(additional_frame_words*wordSize + 129 reg_save_size*BytesPerInt, 16); 130 // OopMap frame size is in compiler stack slots (jint's) not bytes or words 131 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; 132 // The caller will allocate additional_frame_words 133 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; 134 // CodeBlob frame size is in words. 135 int frame_size_in_words = frame_size_in_bytes / wordSize; 136 *total_frame_words = frame_size_in_words; 137 138 // Save Integer and Float registers. 139 __ enter(); 140 __ push_CPU_state(save_vectors); 141 142 // Set an oopmap for the call site. This oopmap will map all 143 // oop-registers and debug-info registers as callee-saved. This 144 // will allow deoptimization at this safepoint to find all possible 145 // debug-info recordings, as well as let GC find all oops. 146 147 OopMapSet *oop_maps = new OopMapSet(); 148 OopMap* oop_map = new OopMap(frame_size_in_slots, 0); 149 150 for (int i = 0; i < RegisterImpl::number_of_registers; i++) { 151 Register r = as_Register(i); 152 if (r < rheapbase && r != rscratch1 && r != rscratch2) { 153 int sp_offset = 2 * (i + 32); // SP offsets are in 4-byte words, 154 // register slots are 8 bytes 155 // wide, 32 floating-point 156 // registers 157 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), 158 r->as_VMReg()); 159 } 160 } 161 162 for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { 163 FloatRegister r = as_FloatRegister(i); 164 int sp_offset = save_vectors ? (4 * i) : (2 * i); 165 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), 166 r->as_VMReg()); 167 } 168 169 return oop_map; 170 } 171 172 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 173 #ifndef COMPILER2 174 assert(!restore_vectors, "vectors are generated only by C2 and JVMCI"); 175 #endif 176 __ pop_CPU_state(restore_vectors); 177 __ leave(); 178 } 179 180 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 181 182 // Just restore result register. Only used by deoptimization. By 183 // now any callee save register that needs to be restored to a c2 184 // caller of the deoptee has been extracted into the vframeArray 185 // and will be stuffed into the c2i adapter we create for later 186 // restoration so only result registers need to be restored here. 187 188 // Restore fp result register 189 __ ldrd(v0, Address(sp, v0_offset_in_bytes())); 190 // Restore integer result register 191 __ ldr(r0, Address(sp, r0_offset_in_bytes())); 192 193 // Pop all of the register save are off the stack 194 __ add(sp, sp, align_up(return_offset_in_bytes(), 16)); 195 } 196 197 // Is vector's size (in bytes) bigger than a size saved by default? 198 // 8 bytes vector registers are saved by default on AArch64. 199 bool SharedRuntime::is_wide_vector(int size) { 200 return size > 8; 201 } 202 203 size_t SharedRuntime::trampoline_size() { 204 return 16; 205 } 206 207 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) { 208 __ mov(rscratch1, destination); 209 __ br(rscratch1); 210 } 211 212 // The java_calling_convention describes stack locations as ideal slots on 213 // a frame with no abi restrictions. Since we must observe abi restrictions 214 // (like the placement of the register window) the slots must be biased by 215 // the following value. 216 static int reg2offset_in(VMReg r) { 217 // Account for saved rfp and lr 218 // This should really be in_preserve_stack_slots 219 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; 220 } 221 222 static int reg2offset_out(VMReg r) { 223 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 224 } 225 226 // --------------------------------------------------------------------------- 227 // Read the array of BasicTypes from a signature, and compute where the 228 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 229 // quantities. Values less than VMRegImpl::stack0 are registers, those above 230 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 231 // as framesizes are fixed. 232 // VMRegImpl::stack0 refers to the first slot 0(sp). 233 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 234 // up to RegisterImpl::number_of_registers) are the 64-bit 235 // integer registers. 236 237 // Note: the INPUTS in sig_bt are in units of Java argument words, 238 // which are 64-bit. The OUTPUTS are in 32-bit units. 239 240 // The Java calling convention is a "shifted" version of the C ABI. 241 // By skipping the first C ABI register we can call non-static jni 242 // methods with small numbers of arguments without having to shuffle 243 // the arguments at all. Since we control the java ABI we ought to at 244 // least get some advantage out of it. 245 246 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 247 VMRegPair *regs, 248 int total_args_passed, 249 int is_outgoing) { 250 251 // Create the mapping between argument positions and 252 // registers. 253 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { 254 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7 255 }; 256 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { 257 j_farg0, j_farg1, j_farg2, j_farg3, 258 j_farg4, j_farg5, j_farg6, j_farg7 259 }; 260 261 262 uint int_args = 0; 263 uint fp_args = 0; 264 uint stk_args = 0; // inc by 2 each time 265 266 for (int i = 0; i < total_args_passed; i++) { 267 switch (sig_bt[i]) { 268 case T_BOOLEAN: 269 case T_CHAR: 270 case T_BYTE: 271 case T_SHORT: 272 case T_INT: 273 if (int_args < Argument::n_int_register_parameters_j) { 274 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 275 } else { 276 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 277 stk_args += 2; 278 } 279 break; 280 case T_VOID: 281 // halves of T_LONG or T_DOUBLE 282 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 283 regs[i].set_bad(); 284 break; 285 case T_LONG: 286 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 287 // fall through 288 case T_OBJECT: 289 case T_ARRAY: 290 case T_ADDRESS: 291 if (int_args < Argument::n_int_register_parameters_j) { 292 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 293 } else { 294 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 295 stk_args += 2; 296 } 297 break; 298 case T_FLOAT: 299 if (fp_args < Argument::n_float_register_parameters_j) { 300 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 301 } else { 302 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 303 stk_args += 2; 304 } 305 break; 306 case T_DOUBLE: 307 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 308 if (fp_args < Argument::n_float_register_parameters_j) { 309 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 310 } else { 311 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 312 stk_args += 2; 313 } 314 break; 315 default: 316 ShouldNotReachHere(); 317 break; 318 } 319 } 320 321 return align_up(stk_args, 2); 322 } 323 324 // Patch the callers callsite with entry to compiled code if it exists. 325 static void patch_callers_callsite(MacroAssembler *masm) { 326 Label L; 327 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 328 __ cbz(rscratch1, L); 329 330 __ enter(); 331 __ push_CPU_state(); 332 333 // VM needs caller's callsite 334 // VM needs target method 335 // This needs to be a long call since we will relocate this adapter to 336 // the codeBuffer and it may not reach 337 338 #ifndef PRODUCT 339 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 340 #endif 341 342 __ mov(c_rarg0, rmethod); 343 __ mov(c_rarg1, lr); 344 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 345 __ blrt(rscratch1, 2, 0, 0); 346 __ maybe_isb(); 347 348 __ pop_CPU_state(); 349 // restore sp 350 __ leave(); 351 __ bind(L); 352 } 353 354 static void gen_c2i_adapter(MacroAssembler *masm, 355 int total_args_passed, 356 int comp_args_on_stack, 357 const BasicType *sig_bt, 358 const VMRegPair *regs, 359 Label& skip_fixup) { 360 // Before we get into the guts of the C2I adapter, see if we should be here 361 // at all. We've come from compiled code and are attempting to jump to the 362 // interpreter, which means the caller made a static call to get here 363 // (vcalls always get a compiled target if there is one). Check for a 364 // compiled target. If there is one, we need to patch the caller's call. 365 patch_callers_callsite(masm); 366 367 __ bind(skip_fixup); 368 369 int words_pushed = 0; 370 371 // Since all args are passed on the stack, total_args_passed * 372 // Interpreter::stackElementSize is the space we need. 373 374 int extraspace = total_args_passed * Interpreter::stackElementSize; 375 376 __ mov(r13, sp); 377 378 // stack is aligned, keep it that way 379 extraspace = align_up(extraspace, 2*wordSize); 380 381 if (extraspace) 382 __ sub(sp, sp, extraspace); 383 384 // Now write the args into the outgoing interpreter space 385 for (int i = 0; i < total_args_passed; i++) { 386 if (sig_bt[i] == T_VOID) { 387 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 388 continue; 389 } 390 391 // offset to start parameters 392 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize; 393 int next_off = st_off - Interpreter::stackElementSize; 394 395 // Say 4 args: 396 // i st_off 397 // 0 32 T_LONG 398 // 1 24 T_VOID 399 // 2 16 T_OBJECT 400 // 3 8 T_BOOL 401 // - 0 return address 402 // 403 // However to make thing extra confusing. Because we can fit a long/double in 404 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 405 // leaves one slot empty and only stores to a single slot. In this case the 406 // slot that is occupied is the T_VOID slot. See I said it was confusing. 407 408 VMReg r_1 = regs[i].first(); 409 VMReg r_2 = regs[i].second(); 410 if (!r_1->is_valid()) { 411 assert(!r_2->is_valid(), ""); 412 continue; 413 } 414 if (r_1->is_stack()) { 415 // memory to memory use rscratch1 416 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size 417 + extraspace 418 + words_pushed * wordSize); 419 if (!r_2->is_valid()) { 420 // sign extend?? 421 __ ldrw(rscratch1, Address(sp, ld_off)); 422 __ str(rscratch1, Address(sp, st_off)); 423 424 } else { 425 426 __ ldr(rscratch1, Address(sp, ld_off)); 427 428 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 429 // T_DOUBLE and T_LONG use two slots in the interpreter 430 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 431 // ld_off == LSW, ld_off+wordSize == MSW 432 // st_off == MSW, next_off == LSW 433 __ str(rscratch1, Address(sp, next_off)); 434 #ifdef ASSERT 435 // Overwrite the unused slot with known junk 436 __ mov(rscratch1, 0xdeadffffdeadaaaaul); 437 __ str(rscratch1, Address(sp, st_off)); 438 #endif /* ASSERT */ 439 } else { 440 __ str(rscratch1, Address(sp, st_off)); 441 } 442 } 443 } else if (r_1->is_Register()) { 444 Register r = r_1->as_Register(); 445 if (!r_2->is_valid()) { 446 // must be only an int (or less ) so move only 32bits to slot 447 // why not sign extend?? 448 __ str(r, Address(sp, st_off)); 449 } else { 450 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 451 // T_DOUBLE and T_LONG use two slots in the interpreter 452 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 453 // long/double in gpr 454 #ifdef ASSERT 455 // Overwrite the unused slot with known junk 456 __ mov(rscratch1, 0xdeadffffdeadaaabul); 457 __ str(rscratch1, Address(sp, st_off)); 458 #endif /* ASSERT */ 459 __ str(r, Address(sp, next_off)); 460 } else { 461 __ str(r, Address(sp, st_off)); 462 } 463 } 464 } else { 465 assert(r_1->is_FloatRegister(), ""); 466 if (!r_2->is_valid()) { 467 // only a float use just part of the slot 468 __ strs(r_1->as_FloatRegister(), Address(sp, st_off)); 469 } else { 470 #ifdef ASSERT 471 // Overwrite the unused slot with known junk 472 __ mov(rscratch1, 0xdeadffffdeadaaacul); 473 __ str(rscratch1, Address(sp, st_off)); 474 #endif /* ASSERT */ 475 __ strd(r_1->as_FloatRegister(), Address(sp, next_off)); 476 } 477 } 478 } 479 480 __ mov(esp, sp); // Interp expects args on caller's expression stack 481 482 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset()))); 483 __ br(rscratch1); 484 } 485 486 487 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 488 int total_args_passed, 489 int comp_args_on_stack, 490 const BasicType *sig_bt, 491 const VMRegPair *regs) { 492 493 // Note: r13 contains the senderSP on entry. We must preserve it since 494 // we may do a i2c -> c2i transition if we lose a race where compiled 495 // code goes non-entrant while we get args ready. 496 497 // In addition we use r13 to locate all the interpreter args because 498 // we must align the stack to 16 bytes. 499 500 // Adapters are frameless. 501 502 // An i2c adapter is frameless because the *caller* frame, which is 503 // interpreted, routinely repairs its own esp (from 504 // interpreter_frame_last_sp), even if a callee has modified the 505 // stack pointer. It also recalculates and aligns sp. 506 507 // A c2i adapter is frameless because the *callee* frame, which is 508 // interpreted, routinely repairs its caller's sp (from sender_sp, 509 // which is set up via the senderSP register). 510 511 // In other words, if *either* the caller or callee is interpreted, we can 512 // get the stack pointer repaired after a call. 513 514 // This is why c2i and i2c adapters cannot be indefinitely composed. 515 // In particular, if a c2i adapter were to somehow call an i2c adapter, 516 // both caller and callee would be compiled methods, and neither would 517 // clean up the stack pointer changes performed by the two adapters. 518 // If this happens, control eventually transfers back to the compiled 519 // caller, but with an uncorrected stack, causing delayed havoc. 520 521 if (VerifyAdapterCalls && 522 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { 523 #if 0 524 // So, let's test for cascading c2i/i2c adapters right now. 525 // assert(Interpreter::contains($return_addr) || 526 // StubRoutines::contains($return_addr), 527 // "i2c adapter must return to an interpreter frame"); 528 __ block_comment("verify_i2c { "); 529 Label L_ok; 530 if (Interpreter::code() != NULL) 531 range_check(masm, rax, r11, 532 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 533 L_ok); 534 if (StubRoutines::code1() != NULL) 535 range_check(masm, rax, r11, 536 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), 537 L_ok); 538 if (StubRoutines::code2() != NULL) 539 range_check(masm, rax, r11, 540 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), 541 L_ok); 542 const char* msg = "i2c adapter must return to an interpreter frame"; 543 __ block_comment(msg); 544 __ stop(msg); 545 __ bind(L_ok); 546 __ block_comment("} verify_i2ce "); 547 #endif 548 } 549 550 // Cut-out for having no stack args. 551 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; 552 if (comp_args_on_stack) { 553 __ sub(rscratch1, sp, comp_words_on_stack * wordSize); 554 __ andr(sp, rscratch1, -16); 555 } 556 557 // Will jump to the compiled code just as if compiled code was doing it. 558 // Pre-load the register-jump target early, to schedule it better. 559 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset()))); 560 561 #if INCLUDE_JVMCI 562 if (EnableJVMCI || UseAOT) { 563 // check if this call should be routed towards a specific entry point 564 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 565 Label no_alternative_target; 566 __ cbz(rscratch2, no_alternative_target); 567 __ mov(rscratch1, rscratch2); 568 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 569 __ bind(no_alternative_target); 570 } 571 #endif // INCLUDE_JVMCI 572 573 // Now generate the shuffle code. 574 for (int i = 0; i < total_args_passed; i++) { 575 if (sig_bt[i] == T_VOID) { 576 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 577 continue; 578 } 579 580 // Pick up 0, 1 or 2 words from SP+offset. 581 582 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 583 "scrambled load targets?"); 584 // Load in argument order going down. 585 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize; 586 // Point to interpreter value (vs. tag) 587 int next_off = ld_off - Interpreter::stackElementSize; 588 // 589 // 590 // 591 VMReg r_1 = regs[i].first(); 592 VMReg r_2 = regs[i].second(); 593 if (!r_1->is_valid()) { 594 assert(!r_2->is_valid(), ""); 595 continue; 596 } 597 if (r_1->is_stack()) { 598 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 599 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size; 600 if (!r_2->is_valid()) { 601 // sign extend??? 602 __ ldrsw(rscratch2, Address(esp, ld_off)); 603 __ str(rscratch2, Address(sp, st_off)); 604 } else { 605 // 606 // We are using two optoregs. This can be either T_OBJECT, 607 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 608 // two slots but only uses one for thr T_LONG or T_DOUBLE case 609 // So we must adjust where to pick up the data to match the 610 // interpreter. 611 // 612 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 613 // are accessed as negative so LSW is at LOW address 614 615 // ld_off is MSW so get LSW 616 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 617 next_off : ld_off; 618 __ ldr(rscratch2, Address(esp, offset)); 619 // st_off is LSW (i.e. reg.first()) 620 __ str(rscratch2, Address(sp, st_off)); 621 } 622 } else if (r_1->is_Register()) { // Register argument 623 Register r = r_1->as_Register(); 624 if (r_2->is_valid()) { 625 // 626 // We are using two VMRegs. This can be either T_OBJECT, 627 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 628 // two slots but only uses one for thr T_LONG or T_DOUBLE case 629 // So we must adjust where to pick up the data to match the 630 // interpreter. 631 632 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 633 next_off : ld_off; 634 635 // this can be a misaligned move 636 __ ldr(r, Address(esp, offset)); 637 } else { 638 // sign extend and use a full word? 639 __ ldrw(r, Address(esp, ld_off)); 640 } 641 } else { 642 if (!r_2->is_valid()) { 643 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off)); 644 } else { 645 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off)); 646 } 647 } 648 } 649 650 // 6243940 We might end up in handle_wrong_method if 651 // the callee is deoptimized as we race thru here. If that 652 // happens we don't want to take a safepoint because the 653 // caller frame will look interpreted and arguments are now 654 // "compiled" so it is much better to make this transition 655 // invisible to the stack walking code. Unfortunately if 656 // we try and find the callee by normal means a safepoint 657 // is possible. So we stash the desired callee in the thread 658 // and the vm will find there should this case occur. 659 660 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset())); 661 662 __ br(rscratch1); 663 } 664 665 #ifdef BUILTIN_SIM 666 static void generate_i2c_adapter_name(char *result, int total_args_passed, const BasicType *sig_bt) 667 { 668 strcpy(result, "i2c("); 669 int idx = 4; 670 for (int i = 0; i < total_args_passed; i++) { 671 switch(sig_bt[i]) { 672 case T_BOOLEAN: 673 result[idx++] = 'Z'; 674 break; 675 case T_CHAR: 676 result[idx++] = 'C'; 677 break; 678 case T_FLOAT: 679 result[idx++] = 'F'; 680 break; 681 case T_DOUBLE: 682 assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID), 683 "double must be followed by void"); 684 i++; 685 result[idx++] = 'D'; 686 break; 687 case T_BYTE: 688 result[idx++] = 'B'; 689 break; 690 case T_SHORT: 691 result[idx++] = 'S'; 692 break; 693 case T_INT: 694 result[idx++] = 'I'; 695 break; 696 case T_LONG: 697 assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID), 698 "long must be followed by void"); 699 i++; 700 result[idx++] = 'L'; 701 break; 702 case T_OBJECT: 703 result[idx++] = 'O'; 704 break; 705 case T_ARRAY: 706 result[idx++] = '['; 707 break; 708 case T_ADDRESS: 709 result[idx++] = 'P'; 710 break; 711 case T_NARROWOOP: 712 result[idx++] = 'N'; 713 break; 714 case T_METADATA: 715 result[idx++] = 'M'; 716 break; 717 case T_NARROWKLASS: 718 result[idx++] = 'K'; 719 break; 720 default: 721 result[idx++] = '?'; 722 break; 723 } 724 } 725 result[idx++] = ')'; 726 result[idx] = '\0'; 727 } 728 #endif 729 730 // --------------------------------------------------------------- 731 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 732 int total_args_passed, 733 int comp_args_on_stack, 734 const BasicType *sig_bt, 735 const VMRegPair *regs, 736 AdapterFingerPrint* fingerprint) { 737 address i2c_entry = __ pc(); 738 #ifdef BUILTIN_SIM 739 char *name = NULL; 740 AArch64Simulator *sim = NULL; 741 size_t len = 65536; 742 if (NotifySimulator) { 743 name = NEW_C_HEAP_ARRAY(char, len, mtInternal); 744 } 745 746 if (name) { 747 generate_i2c_adapter_name(name, total_args_passed, sig_bt); 748 sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 749 sim->notifyCompile(name, i2c_entry); 750 } 751 #endif 752 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 753 754 address c2i_unverified_entry = __ pc(); 755 Label skip_fixup; 756 757 Label ok; 758 759 Register holder = rscratch2; 760 Register receiver = j_rarg0; 761 Register tmp = r10; // A call-clobbered register not used for arg passing 762 763 // ------------------------------------------------------------------------- 764 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls 765 // to the interpreter. The args start out packed in the compiled layout. They 766 // need to be unpacked into the interpreter layout. This will almost always 767 // require some stack space. We grow the current (compiled) stack, then repack 768 // the args. We finally end in a jump to the generic interpreter entry point. 769 // On exit from the interpreter, the interpreter will restore our SP (lest the 770 // compiled code, which relys solely on SP and not FP, get sick). 771 772 { 773 __ block_comment("c2i_unverified_entry {"); 774 __ load_klass(rscratch1, receiver); 775 __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset())); 776 __ cmp(rscratch1, tmp); 777 __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset())); 778 __ br(Assembler::EQ, ok); 779 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 780 781 __ bind(ok); 782 // Method might have been compiled since the call site was patched to 783 // interpreted; if that is the case treat it as a miss so we can get 784 // the call site corrected. 785 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 786 __ cbz(rscratch1, skip_fixup); 787 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 788 __ block_comment("} c2i_unverified_entry"); 789 } 790 791 address c2i_entry = __ pc(); 792 793 #ifdef BUILTIN_SIM 794 if (name) { 795 name[0] = 'c'; 796 name[2] = 'i'; 797 sim->notifyCompile(name, c2i_entry); 798 FREE_C_HEAP_ARRAY(char, name, mtInternal); 799 } 800 #endif 801 802 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 803 804 __ flush(); 805 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 806 } 807 808 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 809 VMRegPair *regs, 810 VMRegPair *regs2, 811 int total_args_passed) { 812 assert(regs2 == NULL, "not needed on AArch64"); 813 814 // We return the amount of VMRegImpl stack slots we need to reserve for all 815 // the arguments NOT counting out_preserve_stack_slots. 816 817 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 818 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7 819 }; 820 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 821 c_farg0, c_farg1, c_farg2, c_farg3, 822 c_farg4, c_farg5, c_farg6, c_farg7 823 }; 824 825 uint int_args = 0; 826 uint fp_args = 0; 827 uint stk_args = 0; // inc by 2 each time 828 829 for (int i = 0; i < total_args_passed; i++) { 830 switch (sig_bt[i]) { 831 case T_BOOLEAN: 832 case T_CHAR: 833 case T_BYTE: 834 case T_SHORT: 835 case T_INT: 836 if (int_args < Argument::n_int_register_parameters_c) { 837 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 838 } else { 839 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 840 stk_args += 2; 841 } 842 break; 843 case T_LONG: 844 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 845 // fall through 846 case T_OBJECT: 847 case T_ARRAY: 848 case T_ADDRESS: 849 case T_METADATA: 850 if (int_args < Argument::n_int_register_parameters_c) { 851 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 852 } else { 853 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 854 stk_args += 2; 855 } 856 break; 857 case T_FLOAT: 858 if (fp_args < Argument::n_float_register_parameters_c) { 859 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 860 } else { 861 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 862 stk_args += 2; 863 } 864 break; 865 case T_DOUBLE: 866 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 867 if (fp_args < Argument::n_float_register_parameters_c) { 868 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 869 } else { 870 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 871 stk_args += 2; 872 } 873 break; 874 case T_VOID: // Halves of longs and doubles 875 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 876 regs[i].set_bad(); 877 break; 878 default: 879 ShouldNotReachHere(); 880 break; 881 } 882 } 883 884 return stk_args; 885 } 886 887 // On 64 bit we will store integer like items to the stack as 888 // 64 bits items (sparc abi) even though java would only store 889 // 32bits for a parameter. On 32bit it will simply be 32 bits 890 // So this routine will do 32->32 on 32bit and 32->64 on 64bit 891 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 892 if (src.first()->is_stack()) { 893 if (dst.first()->is_stack()) { 894 // stack to stack 895 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 896 __ str(rscratch1, Address(sp, reg2offset_out(dst.first()))); 897 } else { 898 // stack to reg 899 __ ldrsw(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first()))); 900 } 901 } else if (dst.first()->is_stack()) { 902 // reg to stack 903 // Do we really have to sign extend??? 904 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); 905 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first()))); 906 } else { 907 if (dst.first() != src.first()) { 908 __ sxtw(dst.first()->as_Register(), src.first()->as_Register()); 909 } 910 } 911 } 912 913 // An oop arg. Must pass a handle not the oop itself 914 static void object_move(MacroAssembler* masm, 915 OopMap* map, 916 int oop_handle_offset, 917 int framesize_in_slots, 918 VMRegPair src, 919 VMRegPair dst, 920 bool is_receiver, 921 int* receiver_offset) { 922 923 // must pass a handle. First figure out the location we use as a handle 924 925 Register rHandle = dst.first()->is_stack() ? rscratch2 : dst.first()->as_Register(); 926 927 // See if oop is NULL if it is we need no handle 928 929 if (src.first()->is_stack()) { 930 931 // Oop is already on the stack as an argument 932 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 933 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 934 if (is_receiver) { 935 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 936 } 937 938 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 939 __ lea(rHandle, Address(rfp, reg2offset_in(src.first()))); 940 // conditionally move a NULL 941 __ cmp(rscratch1, zr); 942 __ csel(rHandle, zr, rHandle, Assembler::EQ); 943 } else { 944 945 // Oop is in an a register we must store it to the space we reserve 946 // on the stack for oop_handles and pass a handle if oop is non-NULL 947 948 const Register rOop = src.first()->as_Register(); 949 int oop_slot; 950 if (rOop == j_rarg0) 951 oop_slot = 0; 952 else if (rOop == j_rarg1) 953 oop_slot = 1; 954 else if (rOop == j_rarg2) 955 oop_slot = 2; 956 else if (rOop == j_rarg3) 957 oop_slot = 3; 958 else if (rOop == j_rarg4) 959 oop_slot = 4; 960 else if (rOop == j_rarg5) 961 oop_slot = 5; 962 else if (rOop == j_rarg6) 963 oop_slot = 6; 964 else { 965 assert(rOop == j_rarg7, "wrong register"); 966 oop_slot = 7; 967 } 968 969 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; 970 int offset = oop_slot*VMRegImpl::stack_slot_size; 971 972 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 973 // Store oop in handle area, may be NULL 974 __ str(rOop, Address(sp, offset)); 975 if (is_receiver) { 976 *receiver_offset = offset; 977 } 978 979 __ cmp(rOop, zr); 980 __ lea(rHandle, Address(sp, offset)); 981 // conditionally move a NULL 982 __ csel(rHandle, zr, rHandle, Assembler::EQ); 983 } 984 985 // If arg is on the stack then place it otherwise it is already in correct reg. 986 if (dst.first()->is_stack()) { 987 __ str(rHandle, Address(sp, reg2offset_out(dst.first()))); 988 } 989 } 990 991 // A float arg may have to do float reg int reg conversion 992 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 993 assert(src.first()->is_stack() && dst.first()->is_stack() || 994 src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error"); 995 if (src.first()->is_stack()) { 996 if (dst.first()->is_stack()) { 997 __ ldrw(rscratch1, Address(rfp, reg2offset_in(src.first()))); 998 __ strw(rscratch1, Address(sp, reg2offset_out(dst.first()))); 999 } else { 1000 ShouldNotReachHere(); 1001 } 1002 } else if (src.first() != dst.first()) { 1003 if (src.is_single_phys_reg() && dst.is_single_phys_reg()) 1004 __ fmovs(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 1005 else 1006 ShouldNotReachHere(); 1007 } 1008 } 1009 1010 // A long move 1011 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1012 if (src.first()->is_stack()) { 1013 if (dst.first()->is_stack()) { 1014 // stack to stack 1015 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 1016 __ str(rscratch1, Address(sp, reg2offset_out(dst.first()))); 1017 } else { 1018 // stack to reg 1019 __ ldr(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first()))); 1020 } 1021 } else if (dst.first()->is_stack()) { 1022 // reg to stack 1023 // Do we really have to sign extend??? 1024 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); 1025 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first()))); 1026 } else { 1027 if (dst.first() != src.first()) { 1028 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1029 } 1030 } 1031 } 1032 1033 1034 // A double move 1035 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1036 assert(src.first()->is_stack() && dst.first()->is_stack() || 1037 src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error"); 1038 if (src.first()->is_stack()) { 1039 if (dst.first()->is_stack()) { 1040 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 1041 __ str(rscratch1, Address(sp, reg2offset_out(dst.first()))); 1042 } else { 1043 ShouldNotReachHere(); 1044 } 1045 } else if (src.first() != dst.first()) { 1046 if (src.is_single_phys_reg() && dst.is_single_phys_reg()) 1047 __ fmovd(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 1048 else 1049 ShouldNotReachHere(); 1050 } 1051 } 1052 1053 1054 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1055 // We always ignore the frame_slots arg and just use the space just below frame pointer 1056 // which by this time is free to use 1057 switch (ret_type) { 1058 case T_FLOAT: 1059 __ strs(v0, Address(rfp, -wordSize)); 1060 break; 1061 case T_DOUBLE: 1062 __ strd(v0, Address(rfp, -wordSize)); 1063 break; 1064 case T_VOID: break; 1065 default: { 1066 __ str(r0, Address(rfp, -wordSize)); 1067 } 1068 } 1069 } 1070 1071 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1072 // We always ignore the frame_slots arg and just use the space just below frame pointer 1073 // which by this time is free to use 1074 switch (ret_type) { 1075 case T_FLOAT: 1076 __ ldrs(v0, Address(rfp, -wordSize)); 1077 break; 1078 case T_DOUBLE: 1079 __ ldrd(v0, Address(rfp, -wordSize)); 1080 break; 1081 case T_VOID: break; 1082 default: { 1083 __ ldr(r0, Address(rfp, -wordSize)); 1084 } 1085 } 1086 } 1087 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1088 RegSet x; 1089 for ( int i = first_arg ; i < arg_count ; i++ ) { 1090 if (args[i].first()->is_Register()) { 1091 x = x + args[i].first()->as_Register(); 1092 } else if (args[i].first()->is_FloatRegister()) { 1093 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize))); 1094 } 1095 } 1096 __ push(x, sp); 1097 } 1098 1099 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1100 RegSet x; 1101 for ( int i = first_arg ; i < arg_count ; i++ ) { 1102 if (args[i].first()->is_Register()) { 1103 x = x + args[i].first()->as_Register(); 1104 } else { 1105 ; 1106 } 1107 } 1108 __ pop(x, sp); 1109 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { 1110 if (args[i].first()->is_Register()) { 1111 ; 1112 } else if (args[i].first()->is_FloatRegister()) { 1113 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize))); 1114 } 1115 } 1116 } 1117 1118 1119 // Check GCLocker::needs_gc and enter the runtime if it's true. This 1120 // keeps a new JNI critical region from starting until a GC has been 1121 // forced. Save down any oops in registers and describe them in an 1122 // OopMap. 1123 static void check_needs_gc_for_critical_native(MacroAssembler* masm, 1124 int stack_slots, 1125 int total_c_args, 1126 int total_in_args, 1127 int arg_save_area, 1128 OopMapSet* oop_maps, 1129 VMRegPair* in_regs, 1130 BasicType* in_sig_bt) { Unimplemented(); } 1131 1132 // Unpack an array argument into a pointer to the body and the length 1133 // if the array is non-null, otherwise pass 0 for both. 1134 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { Unimplemented(); } 1135 1136 1137 class ComputeMoveOrder: public StackObj { 1138 class MoveOperation: public ResourceObj { 1139 friend class ComputeMoveOrder; 1140 private: 1141 VMRegPair _src; 1142 VMRegPair _dst; 1143 int _src_index; 1144 int _dst_index; 1145 bool _processed; 1146 MoveOperation* _next; 1147 MoveOperation* _prev; 1148 1149 static int get_id(VMRegPair r) { Unimplemented(); return 0; } 1150 1151 public: 1152 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): 1153 _src(src) 1154 , _dst(dst) 1155 , _src_index(src_index) 1156 , _dst_index(dst_index) 1157 , _processed(false) 1158 , _next(NULL) 1159 , _prev(NULL) { Unimplemented(); } 1160 1161 VMRegPair src() const { Unimplemented(); return _src; } 1162 int src_id() const { Unimplemented(); return 0; } 1163 int src_index() const { Unimplemented(); return 0; } 1164 VMRegPair dst() const { Unimplemented(); return _src; } 1165 void set_dst(int i, VMRegPair dst) { Unimplemented(); } 1166 int dst_index() const { Unimplemented(); return 0; } 1167 int dst_id() const { Unimplemented(); return 0; } 1168 MoveOperation* next() const { Unimplemented(); return 0; } 1169 MoveOperation* prev() const { Unimplemented(); return 0; } 1170 void set_processed() { Unimplemented(); } 1171 bool is_processed() const { Unimplemented(); return 0; } 1172 1173 // insert 1174 void break_cycle(VMRegPair temp_register) { Unimplemented(); } 1175 1176 void link(GrowableArray<MoveOperation*>& killer) { Unimplemented(); } 1177 }; 1178 1179 private: 1180 GrowableArray<MoveOperation*> edges; 1181 1182 public: 1183 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, 1184 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { Unimplemented(); } 1185 1186 // Collected all the move operations 1187 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { Unimplemented(); } 1188 1189 // Walk the edges breaking cycles between moves. The result list 1190 // can be walked in order to produce the proper set of loads 1191 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { Unimplemented(); return 0; } 1192 }; 1193 1194 1195 static void rt_call(MacroAssembler* masm, address dest, int gpargs, int fpargs, int type) { 1196 CodeBlob *cb = CodeCache::find_blob(dest); 1197 if (cb) { 1198 __ far_call(RuntimeAddress(dest)); 1199 } else { 1200 assert((unsigned)gpargs < 256, "eek!"); 1201 assert((unsigned)fpargs < 32, "eek!"); 1202 __ lea(rscratch1, RuntimeAddress(dest)); 1203 if (UseBuiltinSim) __ mov(rscratch2, (gpargs << 6) | (fpargs << 2) | type); 1204 __ blrt(rscratch1, rscratch2); 1205 __ maybe_isb(); 1206 } 1207 } 1208 1209 static void verify_oop_args(MacroAssembler* masm, 1210 const methodHandle& method, 1211 const BasicType* sig_bt, 1212 const VMRegPair* regs) { 1213 Register temp_reg = r19; // not part of any compiled calling seq 1214 if (VerifyOops) { 1215 for (int i = 0; i < method->size_of_parameters(); i++) { 1216 if (sig_bt[i] == T_OBJECT || 1217 sig_bt[i] == T_ARRAY) { 1218 VMReg r = regs[i].first(); 1219 assert(r->is_valid(), "bad oop arg"); 1220 if (r->is_stack()) { 1221 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1222 __ verify_oop(temp_reg); 1223 } else { 1224 __ verify_oop(r->as_Register()); 1225 } 1226 } 1227 } 1228 } 1229 } 1230 1231 static void gen_special_dispatch(MacroAssembler* masm, 1232 const methodHandle& method, 1233 const BasicType* sig_bt, 1234 const VMRegPair* regs) { 1235 verify_oop_args(masm, method, sig_bt, regs); 1236 vmIntrinsics::ID iid = method->intrinsic_id(); 1237 1238 // Now write the args into the outgoing interpreter space 1239 bool has_receiver = false; 1240 Register receiver_reg = noreg; 1241 int member_arg_pos = -1; 1242 Register member_reg = noreg; 1243 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1244 if (ref_kind != 0) { 1245 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1246 member_reg = r19; // known to be free at this point 1247 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1248 } else if (iid == vmIntrinsics::_invokeBasic) { 1249 has_receiver = true; 1250 } else { 1251 fatal("unexpected intrinsic id %d", iid); 1252 } 1253 1254 if (member_reg != noreg) { 1255 // Load the member_arg into register, if necessary. 1256 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1257 VMReg r = regs[member_arg_pos].first(); 1258 if (r->is_stack()) { 1259 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1260 } else { 1261 // no data motion is needed 1262 member_reg = r->as_Register(); 1263 } 1264 } 1265 1266 if (has_receiver) { 1267 // Make sure the receiver is loaded into a register. 1268 assert(method->size_of_parameters() > 0, "oob"); 1269 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1270 VMReg r = regs[0].first(); 1271 assert(r->is_valid(), "bad receiver arg"); 1272 if (r->is_stack()) { 1273 // Porting note: This assumes that compiled calling conventions always 1274 // pass the receiver oop in a register. If this is not true on some 1275 // platform, pick a temp and load the receiver from stack. 1276 fatal("receiver always in a register"); 1277 receiver_reg = r2; // known to be free at this point 1278 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1279 } else { 1280 // no data motion is needed 1281 receiver_reg = r->as_Register(); 1282 } 1283 } 1284 1285 // Figure out which address we are really jumping to: 1286 MethodHandles::generate_method_handle_dispatch(masm, iid, 1287 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1288 } 1289 1290 // --------------------------------------------------------------------------- 1291 // Generate a native wrapper for a given method. The method takes arguments 1292 // in the Java compiled code convention, marshals them to the native 1293 // convention (handlizes oops, etc), transitions to native, makes the call, 1294 // returns to java state (possibly blocking), unhandlizes any result and 1295 // returns. 1296 // 1297 // Critical native functions are a shorthand for the use of 1298 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1299 // functions. The wrapper is expected to unpack the arguments before 1300 // passing them to the callee and perform checks before and after the 1301 // native call to ensure that they GCLocker 1302 // lock_critical/unlock_critical semantics are followed. Some other 1303 // parts of JNI setup are skipped like the tear down of the JNI handle 1304 // block and the check for pending exceptions it's impossible for them 1305 // to be thrown. 1306 // 1307 // They are roughly structured like this: 1308 // if (GCLocker::needs_gc()) 1309 // SharedRuntime::block_for_jni_critical(); 1310 // tranistion to thread_in_native 1311 // unpack arrray arguments and call native entry point 1312 // check for safepoint in progress 1313 // check if any thread suspend flags are set 1314 // call into JVM and possible unlock the JNI critical 1315 // if a GC was suppressed while in the critical native. 1316 // transition back to thread_in_Java 1317 // return to caller 1318 // 1319 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1320 const methodHandle& method, 1321 int compile_id, 1322 BasicType* in_sig_bt, 1323 VMRegPair* in_regs, 1324 BasicType ret_type) { 1325 #ifdef BUILTIN_SIM 1326 if (NotifySimulator) { 1327 // Names are up to 65536 chars long. UTF8-coded strings are up to 1328 // 3 bytes per character. We concatenate three such strings. 1329 // Yes, I know this is ridiculous, but it's debug code and glibc 1330 // allocates large arrays very efficiently. 1331 size_t len = (65536 * 3) * 3; 1332 char *name = new char[len]; 1333 1334 strncpy(name, method()->method_holder()->name()->as_utf8(), len); 1335 strncat(name, ".", len); 1336 strncat(name, method()->name()->as_utf8(), len); 1337 strncat(name, method()->signature()->as_utf8(), len); 1338 AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck)->notifyCompile(name, __ pc()); 1339 delete[] name; 1340 } 1341 #endif 1342 1343 if (method->is_method_handle_intrinsic()) { 1344 vmIntrinsics::ID iid = method->intrinsic_id(); 1345 intptr_t start = (intptr_t)__ pc(); 1346 int vep_offset = ((intptr_t)__ pc()) - start; 1347 1348 // First instruction must be a nop as it may need to be patched on deoptimisation 1349 __ nop(); 1350 gen_special_dispatch(masm, 1351 method, 1352 in_sig_bt, 1353 in_regs); 1354 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1355 __ flush(); 1356 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1357 return nmethod::new_native_nmethod(method, 1358 compile_id, 1359 masm->code(), 1360 vep_offset, 1361 frame_complete, 1362 stack_slots / VMRegImpl::slots_per_word, 1363 in_ByteSize(-1), 1364 in_ByteSize(-1), 1365 (OopMapSet*)NULL); 1366 } 1367 bool is_critical_native = true; 1368 address native_func = method->critical_native_function(); 1369 if (native_func == NULL) { 1370 native_func = method->native_function(); 1371 is_critical_native = false; 1372 } 1373 assert(native_func != NULL, "must have function"); 1374 1375 // An OopMap for lock (and class if static) 1376 OopMapSet *oop_maps = new OopMapSet(); 1377 intptr_t start = (intptr_t)__ pc(); 1378 1379 // We have received a description of where all the java arg are located 1380 // on entry to the wrapper. We need to convert these args to where 1381 // the jni function will expect them. To figure out where they go 1382 // we convert the java signature to a C signature by inserting 1383 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1384 1385 const int total_in_args = method->size_of_parameters(); 1386 int total_c_args = total_in_args; 1387 if (!is_critical_native) { 1388 total_c_args += 1; 1389 if (method->is_static()) { 1390 total_c_args++; 1391 } 1392 } else { 1393 for (int i = 0; i < total_in_args; i++) { 1394 if (in_sig_bt[i] == T_ARRAY) { 1395 total_c_args++; 1396 } 1397 } 1398 } 1399 1400 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1401 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1402 BasicType* in_elem_bt = NULL; 1403 1404 int argc = 0; 1405 if (!is_critical_native) { 1406 out_sig_bt[argc++] = T_ADDRESS; 1407 if (method->is_static()) { 1408 out_sig_bt[argc++] = T_OBJECT; 1409 } 1410 1411 for (int i = 0; i < total_in_args ; i++ ) { 1412 out_sig_bt[argc++] = in_sig_bt[i]; 1413 } 1414 } else { 1415 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); 1416 SignatureStream ss(method->signature()); 1417 for (int i = 0; i < total_in_args ; i++ ) { 1418 if (in_sig_bt[i] == T_ARRAY) { 1419 // Arrays are passed as int, elem* pair 1420 out_sig_bt[argc++] = T_INT; 1421 out_sig_bt[argc++] = T_ADDRESS; 1422 Symbol* atype = ss.as_symbol(); 1423 const char* at = atype->as_C_string(); 1424 if (strlen(at) == 2) { 1425 assert(at[0] == '[', "must be"); 1426 switch (at[1]) { 1427 case 'B': in_elem_bt[i] = T_BYTE; break; 1428 case 'C': in_elem_bt[i] = T_CHAR; break; 1429 case 'D': in_elem_bt[i] = T_DOUBLE; break; 1430 case 'F': in_elem_bt[i] = T_FLOAT; break; 1431 case 'I': in_elem_bt[i] = T_INT; break; 1432 case 'J': in_elem_bt[i] = T_LONG; break; 1433 case 'S': in_elem_bt[i] = T_SHORT; break; 1434 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; 1435 default: ShouldNotReachHere(); 1436 } 1437 } 1438 } else { 1439 out_sig_bt[argc++] = in_sig_bt[i]; 1440 in_elem_bt[i] = T_VOID; 1441 } 1442 if (in_sig_bt[i] != T_VOID) { 1443 assert(in_sig_bt[i] == ss.type(), "must match"); 1444 ss.next(); 1445 } 1446 } 1447 } 1448 1449 // Now figure out where the args must be stored and how much stack space 1450 // they require. 1451 int out_arg_slots; 1452 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); 1453 1454 // Compute framesize for the wrapper. We need to handlize all oops in 1455 // incoming registers 1456 1457 // Calculate the total number of stack slots we will need. 1458 1459 // First count the abi requirement plus all of the outgoing args 1460 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1461 1462 // Now the space for the inbound oop handle area 1463 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers 1464 if (is_critical_native) { 1465 // Critical natives may have to call out so they need a save area 1466 // for register arguments. 1467 int double_slots = 0; 1468 int single_slots = 0; 1469 for ( int i = 0; i < total_in_args; i++) { 1470 if (in_regs[i].first()->is_Register()) { 1471 const Register reg = in_regs[i].first()->as_Register(); 1472 switch (in_sig_bt[i]) { 1473 case T_BOOLEAN: 1474 case T_BYTE: 1475 case T_SHORT: 1476 case T_CHAR: 1477 case T_INT: single_slots++; break; 1478 case T_ARRAY: // specific to LP64 (7145024) 1479 case T_LONG: double_slots++; break; 1480 default: ShouldNotReachHere(); 1481 } 1482 } else if (in_regs[i].first()->is_FloatRegister()) { 1483 ShouldNotReachHere(); 1484 } 1485 } 1486 total_save_slots = double_slots * 2 + single_slots; 1487 // align the save area 1488 if (double_slots != 0) { 1489 stack_slots = align_up(stack_slots, 2); 1490 } 1491 } 1492 1493 int oop_handle_offset = stack_slots; 1494 stack_slots += total_save_slots; 1495 1496 // Now any space we need for handlizing a klass if static method 1497 1498 int klass_slot_offset = 0; 1499 int klass_offset = -1; 1500 int lock_slot_offset = 0; 1501 bool is_static = false; 1502 1503 if (method->is_static()) { 1504 klass_slot_offset = stack_slots; 1505 stack_slots += VMRegImpl::slots_per_word; 1506 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1507 is_static = true; 1508 } 1509 1510 // Plus a lock if needed 1511 1512 if (method->is_synchronized()) { 1513 lock_slot_offset = stack_slots; 1514 stack_slots += VMRegImpl::slots_per_word; 1515 } 1516 1517 // Now a place (+2) to save return values or temp during shuffling 1518 // + 4 for return address (which we own) and saved rfp 1519 stack_slots += 6; 1520 1521 // Ok The space we have allocated will look like: 1522 // 1523 // 1524 // FP-> | | 1525 // |---------------------| 1526 // | 2 slots for moves | 1527 // |---------------------| 1528 // | lock box (if sync) | 1529 // |---------------------| <- lock_slot_offset 1530 // | klass (if static) | 1531 // |---------------------| <- klass_slot_offset 1532 // | oopHandle area | 1533 // |---------------------| <- oop_handle_offset (8 java arg registers) 1534 // | outbound memory | 1535 // | based arguments | 1536 // | | 1537 // |---------------------| 1538 // | | 1539 // SP-> | out_preserved_slots | 1540 // 1541 // 1542 1543 1544 // Now compute actual number of stack words we need rounding to make 1545 // stack properly aligned. 1546 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1547 1548 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1549 1550 // First thing make an ic check to see if we should even be here 1551 1552 // We are free to use all registers as temps without saving them and 1553 // restoring them except rfp. rfp is the only callee save register 1554 // as far as the interpreter and the compiler(s) are concerned. 1555 1556 1557 const Register ic_reg = rscratch2; 1558 const Register receiver = j_rarg0; 1559 1560 Label hit; 1561 Label exception_pending; 1562 1563 assert_different_registers(ic_reg, receiver, rscratch1); 1564 __ verify_oop(receiver); 1565 __ cmp_klass(receiver, ic_reg, rscratch1); 1566 __ br(Assembler::EQ, hit); 1567 1568 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 1569 1570 // Verified entry point must be aligned 1571 __ align(8); 1572 1573 __ bind(hit); 1574 1575 int vep_offset = ((intptr_t)__ pc()) - start; 1576 1577 // If we have to make this method not-entrant we'll overwrite its 1578 // first instruction with a jump. For this action to be legal we 1579 // must ensure that this first instruction is a B, BL, NOP, BKPT, 1580 // SVC, HVC, or SMC. Make it a NOP. 1581 __ nop(); 1582 1583 // Generate stack overflow check 1584 if (UseStackBanging) { 1585 __ bang_stack_with_offset(JavaThread::stack_shadow_zone_size()); 1586 } else { 1587 Unimplemented(); 1588 } 1589 1590 // Generate a new frame for the wrapper. 1591 __ enter(); 1592 // -2 because return address is already present and so is saved rfp 1593 __ sub(sp, sp, stack_size - 2*wordSize); 1594 1595 // Frame is now completed as far as size and linkage. 1596 int frame_complete = ((intptr_t)__ pc()) - start; 1597 1598 // record entry into native wrapper code 1599 if (NotifySimulator) { 1600 __ notify(Assembler::method_entry); 1601 } 1602 1603 // We use r20 as the oop handle for the receiver/klass 1604 // It is callee save so it survives the call to native 1605 1606 const Register oop_handle_reg = r20; 1607 1608 if (is_critical_native) { 1609 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, 1610 oop_handle_offset, oop_maps, in_regs, in_sig_bt); 1611 } 1612 1613 // 1614 // We immediately shuffle the arguments so that any vm call we have to 1615 // make from here on out (sync slow path, jvmti, etc.) we will have 1616 // captured the oops from our caller and have a valid oopMap for 1617 // them. 1618 1619 // ----------------- 1620 // The Grand Shuffle 1621 1622 // The Java calling convention is either equal (linux) or denser (win64) than the 1623 // c calling convention. However the because of the jni_env argument the c calling 1624 // convention always has at least one more (and two for static) arguments than Java. 1625 // Therefore if we move the args from java -> c backwards then we will never have 1626 // a register->register conflict and we don't have to build a dependency graph 1627 // and figure out how to break any cycles. 1628 // 1629 1630 // Record esp-based slot for receiver on stack for non-static methods 1631 int receiver_offset = -1; 1632 1633 // This is a trick. We double the stack slots so we can claim 1634 // the oops in the caller's frame. Since we are sure to have 1635 // more args than the caller doubling is enough to make 1636 // sure we can capture all the incoming oop args from the 1637 // caller. 1638 // 1639 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1640 1641 // Mark location of rfp (someday) 1642 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp)); 1643 1644 1645 int float_args = 0; 1646 int int_args = 0; 1647 1648 #ifdef ASSERT 1649 bool reg_destroyed[RegisterImpl::number_of_registers]; 1650 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; 1651 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { 1652 reg_destroyed[r] = false; 1653 } 1654 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { 1655 freg_destroyed[f] = false; 1656 } 1657 1658 #endif /* ASSERT */ 1659 1660 // This may iterate in two different directions depending on the 1661 // kind of native it is. The reason is that for regular JNI natives 1662 // the incoming and outgoing registers are offset upwards and for 1663 // critical natives they are offset down. 1664 GrowableArray<int> arg_order(2 * total_in_args); 1665 VMRegPair tmp_vmreg; 1666 tmp_vmreg.set2(r19->as_VMReg()); 1667 1668 if (!is_critical_native) { 1669 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 1670 arg_order.push(i); 1671 arg_order.push(c_arg); 1672 } 1673 } else { 1674 // Compute a valid move order, using tmp_vmreg to break any cycles 1675 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); 1676 } 1677 1678 int temploc = -1; 1679 for (int ai = 0; ai < arg_order.length(); ai += 2) { 1680 int i = arg_order.at(ai); 1681 int c_arg = arg_order.at(ai + 1); 1682 __ block_comment(err_msg("move %d -> %d", i, c_arg)); 1683 if (c_arg == -1) { 1684 assert(is_critical_native, "should only be required for critical natives"); 1685 // This arg needs to be moved to a temporary 1686 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); 1687 in_regs[i] = tmp_vmreg; 1688 temploc = i; 1689 continue; 1690 } else if (i == -1) { 1691 assert(is_critical_native, "should only be required for critical natives"); 1692 // Read from the temporary location 1693 assert(temploc != -1, "must be valid"); 1694 i = temploc; 1695 temploc = -1; 1696 } 1697 #ifdef ASSERT 1698 if (in_regs[i].first()->is_Register()) { 1699 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); 1700 } else if (in_regs[i].first()->is_FloatRegister()) { 1701 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!"); 1702 } 1703 if (out_regs[c_arg].first()->is_Register()) { 1704 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1705 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1706 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1707 } 1708 #endif /* ASSERT */ 1709 switch (in_sig_bt[i]) { 1710 case T_ARRAY: 1711 if (is_critical_native) { 1712 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); 1713 c_arg++; 1714 #ifdef ASSERT 1715 if (out_regs[c_arg].first()->is_Register()) { 1716 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1717 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1718 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1719 } 1720 #endif 1721 int_args++; 1722 break; 1723 } 1724 case T_OBJECT: 1725 assert(!is_critical_native, "no oop arguments"); 1726 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1727 ((i == 0) && (!is_static)), 1728 &receiver_offset); 1729 int_args++; 1730 break; 1731 case T_VOID: 1732 break; 1733 1734 case T_FLOAT: 1735 float_move(masm, in_regs[i], out_regs[c_arg]); 1736 float_args++; 1737 break; 1738 1739 case T_DOUBLE: 1740 assert( i + 1 < total_in_args && 1741 in_sig_bt[i + 1] == T_VOID && 1742 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1743 double_move(masm, in_regs[i], out_regs[c_arg]); 1744 float_args++; 1745 break; 1746 1747 case T_LONG : 1748 long_move(masm, in_regs[i], out_regs[c_arg]); 1749 int_args++; 1750 break; 1751 1752 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1753 1754 default: 1755 move32_64(masm, in_regs[i], out_regs[c_arg]); 1756 int_args++; 1757 } 1758 } 1759 1760 // point c_arg at the first arg that is already loaded in case we 1761 // need to spill before we call out 1762 int c_arg = total_c_args - total_in_args; 1763 1764 // Pre-load a static method's oop into c_rarg1. 1765 if (method->is_static() && !is_critical_native) { 1766 1767 // load oop into a register 1768 __ movoop(c_rarg1, 1769 JNIHandles::make_local(method->method_holder()->java_mirror()), 1770 /*immediate*/true); 1771 1772 // Now handlize the static class mirror it's known not-null. 1773 __ str(c_rarg1, Address(sp, klass_offset)); 1774 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 1775 1776 // Now get the handle 1777 __ lea(c_rarg1, Address(sp, klass_offset)); 1778 // and protect the arg if we must spill 1779 c_arg--; 1780 } 1781 1782 // Change state to native (we save the return address in the thread, since it might not 1783 // be pushed on the stack when we do a stack traversal). 1784 // We use the same pc/oopMap repeatedly when we call out 1785 1786 Label native_return; 1787 __ set_last_Java_frame(sp, noreg, native_return, rscratch1); 1788 1789 Label dtrace_method_entry, dtrace_method_entry_done; 1790 { 1791 unsigned long offset; 1792 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset); 1793 __ ldrb(rscratch1, Address(rscratch1, offset)); 1794 __ cbnzw(rscratch1, dtrace_method_entry); 1795 __ bind(dtrace_method_entry_done); 1796 } 1797 1798 // RedefineClasses() tracing support for obsolete method entry 1799 if (log_is_enabled(Trace, redefine, class, obsolete)) { 1800 // protect the args we've loaded 1801 save_args(masm, total_c_args, c_arg, out_regs); 1802 __ mov_metadata(c_rarg1, method()); 1803 __ call_VM_leaf( 1804 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 1805 rthread, c_rarg1); 1806 restore_args(masm, total_c_args, c_arg, out_regs); 1807 } 1808 1809 // Lock a synchronized method 1810 1811 // Register definitions used by locking and unlocking 1812 1813 const Register swap_reg = r0; 1814 const Register obj_reg = r19; // Will contain the oop 1815 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) 1816 const Register old_hdr = r13; // value of old header at unlock time 1817 const Register tmp = lr; 1818 1819 Label slow_path_lock; 1820 Label lock_done; 1821 1822 if (method->is_synchronized()) { 1823 assert(!is_critical_native, "unhandled"); 1824 1825 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 1826 1827 // Get the handle (the 2nd argument) 1828 __ mov(oop_handle_reg, c_rarg1); 1829 1830 // Get address of the box 1831 1832 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 1833 1834 // Load the oop from the handle 1835 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 1836 1837 __ resolve(IS_NOT_NULL, obj_reg); 1838 1839 if (UseBiasedLocking) { 1840 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, tmp, false, lock_done, &slow_path_lock); 1841 } 1842 1843 // Load (object->mark() | 1) into swap_reg %r0 1844 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1845 __ orr(swap_reg, rscratch1, 1); 1846 1847 // Save (object->mark() | 1) into BasicLock's displaced header 1848 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 1849 1850 // src -> dest iff dest == r0 else r0 <- dest 1851 { Label here; 1852 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL); 1853 } 1854 1855 // Hmm should this move to the slow path code area??? 1856 1857 // Test if the oopMark is an obvious stack pointer, i.e., 1858 // 1) (mark & 3) == 0, and 1859 // 2) sp <= mark < mark + os::pagesize() 1860 // These 3 tests can be done by evaluating the following 1861 // expression: ((mark - sp) & (3 - os::vm_page_size())), 1862 // assuming both stack pointer and pagesize have their 1863 // least significant 2 bits clear. 1864 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg 1865 1866 __ sub(swap_reg, sp, swap_reg); 1867 __ neg(swap_reg, swap_reg); 1868 __ ands(swap_reg, swap_reg, 3 - os::vm_page_size()); 1869 1870 // Save the test result, for recursive case, the result is zero 1871 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 1872 __ br(Assembler::NE, slow_path_lock); 1873 1874 // Slow path will re-enter here 1875 1876 __ bind(lock_done); 1877 } 1878 1879 1880 // Finally just about ready to make the JNI call 1881 1882 // get JNIEnv* which is first argument to native 1883 if (!is_critical_native) { 1884 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset()))); 1885 } 1886 1887 // Now set thread in native 1888 __ mov(rscratch1, _thread_in_native); 1889 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 1890 __ stlrw(rscratch1, rscratch2); 1891 1892 { 1893 int return_type = 0; 1894 switch (ret_type) { 1895 case T_VOID: break; 1896 return_type = 0; break; 1897 case T_CHAR: 1898 case T_BYTE: 1899 case T_SHORT: 1900 case T_INT: 1901 case T_BOOLEAN: 1902 case T_LONG: 1903 return_type = 1; break; 1904 case T_ARRAY: 1905 case T_OBJECT: 1906 return_type = 1; break; 1907 case T_FLOAT: 1908 return_type = 2; break; 1909 case T_DOUBLE: 1910 return_type = 3; break; 1911 default: 1912 ShouldNotReachHere(); 1913 } 1914 rt_call(masm, native_func, 1915 int_args + 2, // AArch64 passes up to 8 args in int registers 1916 float_args, // and up to 8 float args 1917 return_type); 1918 } 1919 1920 __ bind(native_return); 1921 1922 intptr_t return_pc = (intptr_t) __ pc(); 1923 oop_maps->add_gc_map(return_pc - start, map); 1924 1925 // Unpack native results. 1926 switch (ret_type) { 1927 case T_BOOLEAN: __ c2bool(r0); break; 1928 case T_CHAR : __ ubfx(r0, r0, 0, 16); break; 1929 case T_BYTE : __ sbfx(r0, r0, 0, 8); break; 1930 case T_SHORT : __ sbfx(r0, r0, 0, 16); break; 1931 case T_INT : __ sbfx(r0, r0, 0, 32); break; 1932 case T_DOUBLE : 1933 case T_FLOAT : 1934 // Result is in v0 we'll save as needed 1935 break; 1936 case T_ARRAY: // Really a handle 1937 case T_OBJECT: // Really a handle 1938 break; // can't de-handlize until after safepoint check 1939 case T_VOID: break; 1940 case T_LONG: break; 1941 default : ShouldNotReachHere(); 1942 } 1943 1944 // Switch thread to "native transition" state before reading the synchronization state. 1945 // This additional state is necessary because reading and testing the synchronization 1946 // state is not atomic w.r.t. GC, as this scenario demonstrates: 1947 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 1948 // VM thread changes sync state to synchronizing and suspends threads for GC. 1949 // Thread A is resumed to finish this native method, but doesn't block here since it 1950 // didn't see any synchronization is progress, and escapes. 1951 __ mov(rscratch1, _thread_in_native_trans); 1952 1953 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); 1954 1955 // Force this write out before the read below 1956 __ dmb(Assembler::ISH); 1957 1958 // check for safepoint operation in progress and/or pending suspend requests 1959 Label safepoint_in_progress, safepoint_in_progress_done; 1960 { 1961 __ safepoint_poll_acquire(safepoint_in_progress); 1962 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset())); 1963 __ cbnzw(rscratch1, safepoint_in_progress); 1964 __ bind(safepoint_in_progress_done); 1965 } 1966 1967 // change thread state 1968 Label after_transition; 1969 __ mov(rscratch1, _thread_in_Java); 1970 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 1971 __ stlrw(rscratch1, rscratch2); 1972 __ bind(after_transition); 1973 1974 Label reguard; 1975 Label reguard_done; 1976 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset())); 1977 __ cmpw(rscratch1, JavaThread::stack_guard_yellow_reserved_disabled); 1978 __ br(Assembler::EQ, reguard); 1979 __ bind(reguard_done); 1980 1981 // native result if any is live 1982 1983 // Unlock 1984 Label unlock_done; 1985 Label slow_path_unlock; 1986 if (method->is_synchronized()) { 1987 1988 // Get locked oop from the handle we passed to jni 1989 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 1990 1991 __ resolve(IS_NOT_NULL, obj_reg); 1992 1993 Label done; 1994 1995 if (UseBiasedLocking) { 1996 __ biased_locking_exit(obj_reg, old_hdr, done); 1997 } 1998 1999 // Simple recursive lock? 2000 2001 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2002 __ cbz(rscratch1, done); 2003 2004 // Must save r0 if if it is live now because cmpxchg must use it 2005 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2006 save_native_result(masm, ret_type, stack_slots); 2007 } 2008 2009 2010 // get address of the stack lock 2011 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2012 // get old displaced header 2013 __ ldr(old_hdr, Address(r0, 0)); 2014 2015 // Atomic swap old header if oop still contains the stack lock 2016 Label succeed; 2017 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock); 2018 __ bind(succeed); 2019 2020 // slow path re-enters here 2021 __ bind(unlock_done); 2022 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2023 restore_native_result(masm, ret_type, stack_slots); 2024 } 2025 2026 __ bind(done); 2027 } 2028 2029 Label dtrace_method_exit, dtrace_method_exit_done; 2030 { 2031 unsigned long offset; 2032 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset); 2033 __ ldrb(rscratch1, Address(rscratch1, offset)); 2034 __ cbnzw(rscratch1, dtrace_method_exit); 2035 __ bind(dtrace_method_exit_done); 2036 } 2037 2038 __ reset_last_Java_frame(false); 2039 2040 // Unbox oop result, e.g. JNIHandles::resolve result. 2041 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { 2042 __ resolve_jobject(r0, rthread, rscratch2); 2043 } 2044 2045 if (CheckJNICalls) { 2046 // clear_pending_jni_exception_check 2047 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset())); 2048 } 2049 2050 if (!is_critical_native) { 2051 // reset handle block 2052 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset())); 2053 __ str(zr, Address(r2, JNIHandleBlock::top_offset_in_bytes())); 2054 } 2055 2056 __ leave(); 2057 2058 if (!is_critical_native) { 2059 // Any exception pending? 2060 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2061 __ cbnz(rscratch1, exception_pending); 2062 } 2063 2064 // record exit from native wrapper code 2065 if (NotifySimulator) { 2066 __ notify(Assembler::method_reentry); 2067 } 2068 2069 // We're done 2070 __ ret(lr); 2071 2072 // Unexpected paths are out of line and go here 2073 2074 if (!is_critical_native) { 2075 // forward the exception 2076 __ bind(exception_pending); 2077 2078 // and forward the exception 2079 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2080 } 2081 2082 // Slow path locking & unlocking 2083 if (method->is_synchronized()) { 2084 2085 __ block_comment("Slow path lock {"); 2086 __ bind(slow_path_lock); 2087 2088 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2089 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2090 2091 // protect the args we've loaded 2092 save_args(masm, total_c_args, c_arg, out_regs); 2093 2094 __ mov(c_rarg0, obj_reg); 2095 __ mov(c_rarg1, lock_reg); 2096 __ mov(c_rarg2, rthread); 2097 2098 // Not a leaf but we have last_Java_frame setup as we want 2099 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); 2100 restore_args(masm, total_c_args, c_arg, out_regs); 2101 2102 #ifdef ASSERT 2103 { Label L; 2104 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2105 __ cbz(rscratch1, L); 2106 __ stop("no pending exception allowed on exit from monitorenter"); 2107 __ bind(L); 2108 } 2109 #endif 2110 __ b(lock_done); 2111 2112 __ block_comment("} Slow path lock"); 2113 2114 __ block_comment("Slow path unlock {"); 2115 __ bind(slow_path_unlock); 2116 2117 // If we haven't already saved the native result we must save it now as xmm registers 2118 // are still exposed. 2119 2120 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2121 save_native_result(masm, ret_type, stack_slots); 2122 } 2123 2124 __ mov(c_rarg2, rthread); 2125 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2126 __ mov(c_rarg0, obj_reg); 2127 2128 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2129 // NOTE that obj_reg == r19 currently 2130 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2131 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2132 2133 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), 3, 0, 1); 2134 2135 #ifdef ASSERT 2136 { 2137 Label L; 2138 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2139 __ cbz(rscratch1, L); 2140 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2141 __ bind(L); 2142 } 2143 #endif /* ASSERT */ 2144 2145 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2146 2147 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2148 restore_native_result(masm, ret_type, stack_slots); 2149 } 2150 __ b(unlock_done); 2151 2152 __ block_comment("} Slow path unlock"); 2153 2154 } // synchronized 2155 2156 // SLOW PATH Reguard the stack if needed 2157 2158 __ bind(reguard); 2159 save_native_result(masm, ret_type, stack_slots); 2160 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages), 0, 0, 0); 2161 restore_native_result(masm, ret_type, stack_slots); 2162 // and continue 2163 __ b(reguard_done); 2164 2165 // SLOW PATH safepoint 2166 { 2167 __ block_comment("safepoint {"); 2168 __ bind(safepoint_in_progress); 2169 2170 // Don't use call_VM as it will see a possible pending exception and forward it 2171 // and never return here preventing us from clearing _last_native_pc down below. 2172 // 2173 save_native_result(masm, ret_type, stack_slots); 2174 __ mov(c_rarg0, rthread); 2175 #ifndef PRODUCT 2176 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2177 #endif 2178 if (!is_critical_native) { 2179 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); 2180 } else { 2181 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); 2182 } 2183 __ blrt(rscratch1, 1, 0, 1); 2184 __ maybe_isb(); 2185 // Restore any method result value 2186 restore_native_result(masm, ret_type, stack_slots); 2187 2188 if (is_critical_native) { 2189 // The call above performed the transition to thread_in_Java so 2190 // skip the transition logic above. 2191 __ b(after_transition); 2192 } 2193 2194 __ b(safepoint_in_progress_done); 2195 __ block_comment("} safepoint"); 2196 } 2197 2198 // SLOW PATH dtrace support 2199 { 2200 __ block_comment("dtrace entry {"); 2201 __ bind(dtrace_method_entry); 2202 2203 // We have all of the arguments setup at this point. We must not touch any register 2204 // argument registers at this point (what if we save/restore them there are no oop? 2205 2206 save_args(masm, total_c_args, c_arg, out_regs); 2207 __ mov_metadata(c_rarg1, method()); 2208 __ call_VM_leaf( 2209 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2210 rthread, c_rarg1); 2211 restore_args(masm, total_c_args, c_arg, out_regs); 2212 __ b(dtrace_method_entry_done); 2213 __ block_comment("} dtrace entry"); 2214 } 2215 2216 { 2217 __ block_comment("dtrace exit {"); 2218 __ bind(dtrace_method_exit); 2219 save_native_result(masm, ret_type, stack_slots); 2220 __ mov_metadata(c_rarg1, method()); 2221 __ call_VM_leaf( 2222 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2223 rthread, c_rarg1); 2224 restore_native_result(masm, ret_type, stack_slots); 2225 __ b(dtrace_method_exit_done); 2226 __ block_comment("} dtrace exit"); 2227 } 2228 2229 2230 __ flush(); 2231 2232 nmethod *nm = nmethod::new_native_nmethod(method, 2233 compile_id, 2234 masm->code(), 2235 vep_offset, 2236 frame_complete, 2237 stack_slots / VMRegImpl::slots_per_word, 2238 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2239 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2240 oop_maps); 2241 2242 if (is_critical_native) { 2243 nm->set_lazy_critical_native(true); 2244 } 2245 2246 return nm; 2247 2248 } 2249 2250 // this function returns the adjust size (in number of words) to a c2i adapter 2251 // activation for use during deoptimization 2252 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2253 assert(callee_locals >= callee_parameters, 2254 "test and remove; got more parms than locals"); 2255 if (callee_locals < callee_parameters) 2256 return 0; // No adjustment for negative locals 2257 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2258 // diff is counted in stack words 2259 return align_up(diff, 2); 2260 } 2261 2262 2263 //------------------------------generate_deopt_blob---------------------------- 2264 void SharedRuntime::generate_deopt_blob() { 2265 // Allocate space for the code 2266 ResourceMark rm; 2267 // Setup code generation tools 2268 int pad = 0; 2269 #if INCLUDE_JVMCI 2270 if (EnableJVMCI || UseAOT) { 2271 pad += 512; // Increase the buffer size when compiling for JVMCI 2272 } 2273 #endif 2274 CodeBuffer buffer("deopt_blob", 2048+pad, 1024); 2275 MacroAssembler* masm = new MacroAssembler(&buffer); 2276 int frame_size_in_words; 2277 OopMap* map = NULL; 2278 OopMapSet *oop_maps = new OopMapSet(); 2279 2280 #ifdef BUILTIN_SIM 2281 AArch64Simulator *simulator; 2282 if (NotifySimulator) { 2283 simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 2284 simulator->notifyCompile(const_cast<char*>("SharedRuntime::deopt_blob"), __ pc()); 2285 } 2286 #endif 2287 2288 // ------------- 2289 // This code enters when returning to a de-optimized nmethod. A return 2290 // address has been pushed on the the stack, and return values are in 2291 // registers. 2292 // If we are doing a normal deopt then we were called from the patched 2293 // nmethod from the point we returned to the nmethod. So the return 2294 // address on the stack is wrong by NativeCall::instruction_size 2295 // We will adjust the value so it looks like we have the original return 2296 // address on the stack (like when we eagerly deoptimized). 2297 // In the case of an exception pending when deoptimizing, we enter 2298 // with a return address on the stack that points after the call we patched 2299 // into the exception handler. We have the following register state from, 2300 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). 2301 // r0: exception oop 2302 // r19: exception handler 2303 // r3: throwing pc 2304 // So in this case we simply jam r3 into the useless return address and 2305 // the stack looks just like we want. 2306 // 2307 // At this point we need to de-opt. We save the argument return 2308 // registers. We call the first C routine, fetch_unroll_info(). This 2309 // routine captures the return values and returns a structure which 2310 // describes the current frame size and the sizes of all replacement frames. 2311 // The current frame is compiled code and may contain many inlined 2312 // functions, each with their own JVM state. We pop the current frame, then 2313 // push all the new frames. Then we call the C routine unpack_frames() to 2314 // populate these frames. Finally unpack_frames() returns us the new target 2315 // address. Notice that callee-save registers are BLOWN here; they have 2316 // already been captured in the vframeArray at the time the return PC was 2317 // patched. 2318 address start = __ pc(); 2319 Label cont; 2320 2321 // Prolog for non exception case! 2322 2323 // Save everything in sight. 2324 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2325 2326 // Normal deoptimization. Save exec mode for unpack_frames. 2327 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved 2328 __ b(cont); 2329 2330 int reexecute_offset = __ pc() - start; 2331 #if INCLUDE_JVMCI && !defined(COMPILER1) 2332 if (EnableJVMCI && UseJVMCICompiler) { 2333 // JVMCI does not use this kind of deoptimization 2334 __ should_not_reach_here(); 2335 } 2336 #endif 2337 2338 // Reexecute case 2339 // return address is the pc describes what bci to do re-execute at 2340 2341 // No need to update map as each call to save_live_registers will produce identical oopmap 2342 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2343 2344 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved 2345 __ b(cont); 2346 2347 #if INCLUDE_JVMCI 2348 Label after_fetch_unroll_info_call; 2349 int implicit_exception_uncommon_trap_offset = 0; 2350 int uncommon_trap_offset = 0; 2351 2352 if (EnableJVMCI || UseAOT) { 2353 implicit_exception_uncommon_trap_offset = __ pc() - start; 2354 2355 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2356 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2357 2358 uncommon_trap_offset = __ pc() - start; 2359 2360 // Save everything in sight. 2361 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2362 // fetch_unroll_info needs to call last_java_frame() 2363 Label retaddr; 2364 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2365 2366 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2367 __ movw(rscratch1, -1); 2368 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2369 2370 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute); 2371 __ mov(c_rarg0, rthread); 2372 __ movw(c_rarg2, rcpool); // exec mode 2373 __ lea(rscratch1, 2374 RuntimeAddress(CAST_FROM_FN_PTR(address, 2375 Deoptimization::uncommon_trap))); 2376 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2377 __ bind(retaddr); 2378 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); 2379 2380 __ reset_last_Java_frame(false); 2381 2382 __ b(after_fetch_unroll_info_call); 2383 } // EnableJVMCI 2384 #endif // INCLUDE_JVMCI 2385 2386 int exception_offset = __ pc() - start; 2387 2388 // Prolog for exception case 2389 2390 // all registers are dead at this entry point, except for r0, and 2391 // r3 which contain the exception oop and exception pc 2392 // respectively. Set them in TLS and fall thru to the 2393 // unpack_with_exception_in_tls entry point. 2394 2395 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 2396 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 2397 2398 int exception_in_tls_offset = __ pc() - start; 2399 2400 // new implementation because exception oop is now passed in JavaThread 2401 2402 // Prolog for exception case 2403 // All registers must be preserved because they might be used by LinearScan 2404 // Exceptiop oop and throwing PC are passed in JavaThread 2405 // tos: stack at point of call to method that threw the exception (i.e. only 2406 // args are on the stack, no return address) 2407 2408 // The return address pushed by save_live_registers will be patched 2409 // later with the throwing pc. The correct value is not available 2410 // now because loading it from memory would destroy registers. 2411 2412 // NB: The SP at this point must be the SP of the method that is 2413 // being deoptimized. Deoptimization assumes that the frame created 2414 // here by save_live_registers is immediately below the method's SP. 2415 // This is a somewhat fragile mechanism. 2416 2417 // Save everything in sight. 2418 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2419 2420 // Now it is safe to overwrite any register 2421 2422 // Deopt during an exception. Save exec mode for unpack_frames. 2423 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved 2424 2425 // load throwing pc from JavaThread and patch it as the return address 2426 // of the current frame. Then clear the field in JavaThread 2427 2428 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2429 __ str(r3, Address(rfp, wordSize)); 2430 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2431 2432 #ifdef ASSERT 2433 // verify that there is really an exception oop in JavaThread 2434 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2435 __ verify_oop(r0); 2436 2437 // verify that there is no pending exception 2438 Label no_pending_exception; 2439 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2440 __ cbz(rscratch1, no_pending_exception); 2441 __ stop("must not have pending exception here"); 2442 __ bind(no_pending_exception); 2443 #endif 2444 2445 __ bind(cont); 2446 2447 // Call C code. Need thread and this frame, but NOT official VM entry 2448 // crud. We cannot block on this call, no GC can happen. 2449 // 2450 // UnrollBlock* fetch_unroll_info(JavaThread* thread) 2451 2452 // fetch_unroll_info needs to call last_java_frame(). 2453 2454 Label retaddr; 2455 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2456 #ifdef ASSERT0 2457 { Label L; 2458 __ ldr(rscratch1, Address(rthread, 2459 JavaThread::last_Java_fp_offset())); 2460 __ cbz(rscratch1, L); 2461 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2462 __ bind(L); 2463 } 2464 #endif // ASSERT 2465 __ mov(c_rarg0, rthread); 2466 __ mov(c_rarg1, rcpool); 2467 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2468 __ blrt(rscratch1, 1, 0, 1); 2469 __ bind(retaddr); 2470 2471 // Need to have an oopmap that tells fetch_unroll_info where to 2472 // find any register it might need. 2473 oop_maps->add_gc_map(__ pc() - start, map); 2474 2475 __ reset_last_Java_frame(false); 2476 2477 #if INCLUDE_JVMCI 2478 if (EnableJVMCI || UseAOT) { 2479 __ bind(after_fetch_unroll_info_call); 2480 } 2481 #endif 2482 2483 // Load UnrollBlock* into r5 2484 __ mov(r5, r0); 2485 2486 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes())); 2487 Label noException; 2488 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending? 2489 __ br(Assembler::NE, noException); 2490 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2491 // QQQ this is useless it was NULL above 2492 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2493 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 2494 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2495 2496 __ verify_oop(r0); 2497 2498 // Overwrite the result registers with the exception results. 2499 __ str(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2500 // I think this is useless 2501 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2502 2503 __ bind(noException); 2504 2505 // Only register save data is on the stack. 2506 // Now restore the result registers. Everything else is either dead 2507 // or captured in the vframeArray. 2508 RegisterSaver::restore_result_registers(masm); 2509 2510 // All of the register save area has been popped of the stack. Only the 2511 // return address remains. 2512 2513 // Pop all the frames we must move/replace. 2514 // 2515 // Frame picture (youngest to oldest) 2516 // 1: self-frame (no frame link) 2517 // 2: deopting frame (no frame link) 2518 // 3: caller of deopting frame (could be compiled/interpreted). 2519 // 2520 // Note: by leaving the return address of self-frame on the stack 2521 // and using the size of frame 2 to adjust the stack 2522 // when we are done the return to frame 3 will still be on the stack. 2523 2524 // Pop deoptimized frame 2525 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); 2526 __ sub(r2, r2, 2 * wordSize); 2527 __ add(sp, sp, r2); 2528 __ ldp(rfp, lr, __ post(sp, 2 * wordSize)); 2529 // LR should now be the return address to the caller (3) 2530 2531 #ifdef ASSERT 2532 // Compilers generate code that bang the stack by as much as the 2533 // interpreter would need. So this stack banging should never 2534 // trigger a fault. Verify that it does not on non product builds. 2535 if (UseStackBanging) { 2536 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 2537 __ bang_stack_size(r19, r2); 2538 } 2539 #endif 2540 // Load address of array of frame pcs into r2 2541 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2542 2543 // Trash the old pc 2544 // __ addptr(sp, wordSize); FIXME ???? 2545 2546 // Load address of array of frame sizes into r4 2547 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); 2548 2549 // Load counter into r3 2550 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); 2551 2552 // Now adjust the caller's stack to make up for the extra locals 2553 // but record the original sp so that we can save it in the skeletal interpreter 2554 // frame and the stack walking of interpreter_sender will get the unextended sp 2555 // value and not the "real" sp value. 2556 2557 const Register sender_sp = r6; 2558 2559 __ mov(sender_sp, sp); 2560 __ ldrw(r19, Address(r5, 2561 Deoptimization::UnrollBlock:: 2562 caller_adjustment_offset_in_bytes())); 2563 __ sub(sp, sp, r19); 2564 2565 // Push interpreter frames in a loop 2566 __ mov(rscratch1, (address)0xDEADDEAD); // Make a recognizable pattern 2567 __ mov(rscratch2, rscratch1); 2568 Label loop; 2569 __ bind(loop); 2570 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size 2571 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand 2572 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc 2573 __ enter(); // Save old & set new fp 2574 __ sub(sp, sp, r19); // Prolog 2575 // This value is corrected by layout_activation_impl 2576 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2577 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2578 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2579 __ sub(r3, r3, 1); // Decrement counter 2580 __ cbnz(r3, loop); 2581 2582 // Re-push self-frame 2583 __ ldr(lr, Address(r2)); 2584 __ enter(); 2585 2586 // Allocate a full sized register save area. We subtract 2 because 2587 // enter() just pushed 2 words 2588 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize); 2589 2590 // Restore frame locals after moving the frame 2591 __ strd(v0, Address(sp, RegisterSaver::v0_offset_in_bytes())); 2592 __ str(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2593 2594 // Call C code. Need thread but NOT official VM entry 2595 // crud. We cannot block on this call, no GC can happen. Call should 2596 // restore return values to their stack-slots with the new SP. 2597 // 2598 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) 2599 2600 // Use rfp because the frames look interpreted now 2601 // Don't need the precise return PC here, just precise enough to point into this code blob. 2602 address the_pc = __ pc(); 2603 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2604 2605 __ mov(c_rarg0, rthread); 2606 __ movw(c_rarg1, rcpool); // second arg: exec_mode 2607 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2608 __ blrt(rscratch1, 2, 0, 0); 2609 2610 // Set an oopmap for the call site 2611 // Use the same PC we used for the last java frame 2612 oop_maps->add_gc_map(the_pc - start, 2613 new OopMap( frame_size_in_words, 0 )); 2614 2615 // Clear fp AND pc 2616 __ reset_last_Java_frame(true); 2617 2618 // Collect return values 2619 __ ldrd(v0, Address(sp, RegisterSaver::v0_offset_in_bytes())); 2620 __ ldr(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2621 // I think this is useless (throwing pc?) 2622 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2623 2624 // Pop self-frame. 2625 __ leave(); // Epilog 2626 2627 // Jump to interpreter 2628 __ ret(lr); 2629 2630 // Make sure all code is generated 2631 masm->flush(); 2632 2633 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2634 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2635 #if INCLUDE_JVMCI 2636 if (EnableJVMCI || UseAOT) { 2637 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); 2638 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); 2639 } 2640 #endif 2641 #ifdef BUILTIN_SIM 2642 if (NotifySimulator) { 2643 unsigned char *base = _deopt_blob->code_begin(); 2644 simulator->notifyRelocate(start, base - start); 2645 } 2646 #endif 2647 } 2648 2649 uint SharedRuntime::out_preserve_stack_slots() { 2650 return 0; 2651 } 2652 2653 #if COMPILER2_OR_JVMCI 2654 //------------------------------generate_uncommon_trap_blob-------------------- 2655 void SharedRuntime::generate_uncommon_trap_blob() { 2656 // Allocate space for the code 2657 ResourceMark rm; 2658 // Setup code generation tools 2659 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); 2660 MacroAssembler* masm = new MacroAssembler(&buffer); 2661 2662 #ifdef BUILTIN_SIM 2663 AArch64Simulator *simulator; 2664 if (NotifySimulator) { 2665 simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 2666 simulator->notifyCompile(const_cast<char*>("SharedRuntime:uncommon_trap_blob"), __ pc()); 2667 } 2668 #endif 2669 2670 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 2671 2672 address start = __ pc(); 2673 2674 // Push self-frame. We get here with a return address in LR 2675 // and sp should be 16 byte aligned 2676 // push rfp and retaddr by hand 2677 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize))); 2678 // we don't expect an arg reg save area 2679 #ifndef PRODUCT 2680 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2681 #endif 2682 // compiler left unloaded_class_index in j_rarg0 move to where the 2683 // runtime expects it. 2684 if (c_rarg1 != j_rarg0) { 2685 __ movw(c_rarg1, j_rarg0); 2686 } 2687 2688 // we need to set the past SP to the stack pointer of the stub frame 2689 // and the pc to the address where this runtime call will return 2690 // although actually any pc in this code blob will do). 2691 Label retaddr; 2692 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2693 2694 // Call C code. Need thread but NOT official VM entry 2695 // crud. We cannot block on this call, no GC can happen. Call should 2696 // capture callee-saved registers as well as return values. 2697 // Thread is in rdi already. 2698 // 2699 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); 2700 // 2701 // n.b. 2 gp args, 0 fp args, integral return type 2702 2703 __ mov(c_rarg0, rthread); 2704 __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap); 2705 __ lea(rscratch1, 2706 RuntimeAddress(CAST_FROM_FN_PTR(address, 2707 Deoptimization::uncommon_trap))); 2708 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2709 __ bind(retaddr); 2710 2711 // Set an oopmap for the call site 2712 OopMapSet* oop_maps = new OopMapSet(); 2713 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); 2714 2715 // location of rfp is known implicitly by the frame sender code 2716 2717 oop_maps->add_gc_map(__ pc() - start, map); 2718 2719 __ reset_last_Java_frame(false); 2720 2721 // move UnrollBlock* into r4 2722 __ mov(r4, r0); 2723 2724 #ifdef ASSERT 2725 { Label L; 2726 __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes())); 2727 __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap); 2728 __ br(Assembler::EQ, L); 2729 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2730 __ bind(L); 2731 } 2732 #endif 2733 2734 // Pop all the frames we must move/replace. 2735 // 2736 // Frame picture (youngest to oldest) 2737 // 1: self-frame (no frame link) 2738 // 2: deopting frame (no frame link) 2739 // 3: caller of deopting frame (could be compiled/interpreted). 2740 2741 // Pop self-frame. We have no frame, and must rely only on r0 and sp. 2742 __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog! 2743 2744 // Pop deoptimized frame (int) 2745 __ ldrw(r2, Address(r4, 2746 Deoptimization::UnrollBlock:: 2747 size_of_deoptimized_frame_offset_in_bytes())); 2748 __ sub(r2, r2, 2 * wordSize); 2749 __ add(sp, sp, r2); 2750 __ ldp(rfp, lr, __ post(sp, 2 * wordSize)); 2751 // LR should now be the return address to the caller (3) frame 2752 2753 #ifdef ASSERT 2754 // Compilers generate code that bang the stack by as much as the 2755 // interpreter would need. So this stack banging should never 2756 // trigger a fault. Verify that it does not on non product builds. 2757 if (UseStackBanging) { 2758 __ ldrw(r1, Address(r4, 2759 Deoptimization::UnrollBlock:: 2760 total_frame_sizes_offset_in_bytes())); 2761 __ bang_stack_size(r1, r2); 2762 } 2763 #endif 2764 2765 // Load address of array of frame pcs into r2 (address*) 2766 __ ldr(r2, Address(r4, 2767 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2768 2769 // Load address of array of frame sizes into r5 (intptr_t*) 2770 __ ldr(r5, Address(r4, 2771 Deoptimization::UnrollBlock:: 2772 frame_sizes_offset_in_bytes())); 2773 2774 // Counter 2775 __ ldrw(r3, Address(r4, 2776 Deoptimization::UnrollBlock:: 2777 number_of_frames_offset_in_bytes())); // (int) 2778 2779 // Now adjust the caller's stack to make up for the extra locals but 2780 // record the original sp so that we can save it in the skeletal 2781 // interpreter frame and the stack walking of interpreter_sender 2782 // will get the unextended sp value and not the "real" sp value. 2783 2784 const Register sender_sp = r8; 2785 2786 __ mov(sender_sp, sp); 2787 __ ldrw(r1, Address(r4, 2788 Deoptimization::UnrollBlock:: 2789 caller_adjustment_offset_in_bytes())); // (int) 2790 __ sub(sp, sp, r1); 2791 2792 // Push interpreter frames in a loop 2793 Label loop; 2794 __ bind(loop); 2795 __ ldr(r1, Address(r5, 0)); // Load frame size 2796 __ sub(r1, r1, 2 * wordSize); // We'll push pc and rfp by hand 2797 __ ldr(lr, Address(r2, 0)); // Save return address 2798 __ enter(); // and old rfp & set new rfp 2799 __ sub(sp, sp, r1); // Prolog 2800 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2801 // This value is corrected by layout_activation_impl 2802 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2803 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2804 __ add(r5, r5, wordSize); // Bump array pointer (sizes) 2805 __ add(r2, r2, wordSize); // Bump array pointer (pcs) 2806 __ subsw(r3, r3, 1); // Decrement counter 2807 __ br(Assembler::GT, loop); 2808 __ ldr(lr, Address(r2, 0)); // save final return address 2809 // Re-push self-frame 2810 __ enter(); // & old rfp & set new rfp 2811 2812 // Use rfp because the frames look interpreted now 2813 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. 2814 // Don't need the precise return PC here, just precise enough to point into this code blob. 2815 address the_pc = __ pc(); 2816 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2817 2818 // Call C code. Need thread but NOT official VM entry 2819 // crud. We cannot block on this call, no GC can happen. Call should 2820 // restore return values to their stack-slots with the new SP. 2821 // Thread is in rdi already. 2822 // 2823 // BasicType unpack_frames(JavaThread* thread, int exec_mode); 2824 // 2825 // n.b. 2 gp args, 0 fp args, integral return type 2826 2827 // sp should already be aligned 2828 __ mov(c_rarg0, rthread); 2829 __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap); 2830 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2831 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2832 2833 // Set an oopmap for the call site 2834 // Use the same PC we used for the last java frame 2835 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 2836 2837 // Clear fp AND pc 2838 __ reset_last_Java_frame(true); 2839 2840 // Pop self-frame. 2841 __ leave(); // Epilog 2842 2843 // Jump to interpreter 2844 __ ret(lr); 2845 2846 // Make sure all code is generated 2847 masm->flush(); 2848 2849 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, 2850 SimpleRuntimeFrame::framesize >> 1); 2851 2852 #ifdef BUILTIN_SIM 2853 if (NotifySimulator) { 2854 unsigned char *base = _deopt_blob->code_begin(); 2855 simulator->notifyRelocate(start, base - start); 2856 } 2857 #endif 2858 } 2859 #endif // COMPILER2_OR_JVMCI 2860 2861 2862 //------------------------------generate_handler_blob------ 2863 // 2864 // Generate a special Compile2Runtime blob that saves all registers, 2865 // and setup oopmap. 2866 // 2867 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 2868 ResourceMark rm; 2869 OopMapSet *oop_maps = new OopMapSet(); 2870 OopMap* map; 2871 2872 // Allocate space for the code. Setup code generation tools. 2873 CodeBuffer buffer("handler_blob", 2048, 1024); 2874 MacroAssembler* masm = new MacroAssembler(&buffer); 2875 2876 address start = __ pc(); 2877 address call_pc = NULL; 2878 int frame_size_in_words; 2879 bool cause_return = (poll_type == POLL_AT_RETURN); 2880 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); 2881 2882 // Save Integer and Float registers. 2883 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); 2884 2885 // The following is basically a call_VM. However, we need the precise 2886 // address of the call in order to generate an oopmap. Hence, we do all the 2887 // work outselves. 2888 2889 Label retaddr; 2890 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2891 2892 // The return address must always be correct so that frame constructor never 2893 // sees an invalid pc. 2894 2895 if (!cause_return) { 2896 // overwrite the return address pushed by save_live_registers 2897 // Additionally, r20 is a callee-saved register so we can look at 2898 // it later to determine if someone changed the return address for 2899 // us! 2900 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset())); 2901 __ str(r20, Address(rfp, wordSize)); 2902 } 2903 2904 // Do the call 2905 __ mov(c_rarg0, rthread); 2906 __ lea(rscratch1, RuntimeAddress(call_ptr)); 2907 __ blrt(rscratch1, 1, 0, 1); 2908 __ bind(retaddr); 2909 2910 // Set an oopmap for the call site. This oopmap will map all 2911 // oop-registers and debug-info registers as callee-saved. This 2912 // will allow deoptimization at this safepoint to find all possible 2913 // debug-info recordings, as well as let GC find all oops. 2914 2915 oop_maps->add_gc_map( __ pc() - start, map); 2916 2917 Label noException; 2918 2919 __ reset_last_Java_frame(false); 2920 2921 __ maybe_isb(); 2922 __ membar(Assembler::LoadLoad | Assembler::LoadStore); 2923 2924 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2925 __ cbz(rscratch1, noException); 2926 2927 // Exception pending 2928 2929 RegisterSaver::restore_live_registers(masm, save_vectors); 2930 2931 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2932 2933 // No exception case 2934 __ bind(noException); 2935 2936 Label no_adjust, bail; 2937 if (SafepointMechanism::uses_thread_local_poll() && !cause_return) { 2938 // If our stashed return pc was modified by the runtime we avoid touching it 2939 __ ldr(rscratch1, Address(rfp, wordSize)); 2940 __ cmp(r20, rscratch1); 2941 __ br(Assembler::NE, no_adjust); 2942 2943 #ifdef ASSERT 2944 // Verify the correct encoding of the poll we're about to skip. 2945 // See NativeInstruction::is_ldrw_to_zr() 2946 __ ldrw(rscratch1, Address(r20)); 2947 __ ubfx(rscratch2, rscratch1, 22, 10); 2948 __ cmpw(rscratch2, 0b1011100101); 2949 __ br(Assembler::NE, bail); 2950 __ ubfx(rscratch2, rscratch1, 0, 5); 2951 __ cmpw(rscratch2, 0b11111); 2952 __ br(Assembler::NE, bail); 2953 #endif 2954 // Adjust return pc forward to step over the safepoint poll instruction 2955 __ add(r20, r20, NativeInstruction::instruction_size); 2956 __ str(r20, Address(rfp, wordSize)); 2957 } 2958 2959 __ bind(no_adjust); 2960 // Normal exit, restore registers and exit. 2961 RegisterSaver::restore_live_registers(masm, save_vectors); 2962 2963 __ ret(lr); 2964 2965 #ifdef ASSERT 2966 __ bind(bail); 2967 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 2968 #endif 2969 2970 // Make sure all code is generated 2971 masm->flush(); 2972 2973 // Fill-out other meta info 2974 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2975 } 2976 2977 // 2978 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2979 // 2980 // Generate a stub that calls into vm to find out the proper destination 2981 // of a java call. All the argument registers are live at this point 2982 // but since this is generic code we don't know what they are and the caller 2983 // must do any gc of the args. 2984 // 2985 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 2986 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); 2987 2988 // allocate space for the code 2989 ResourceMark rm; 2990 2991 CodeBuffer buffer(name, 1000, 512); 2992 MacroAssembler* masm = new MacroAssembler(&buffer); 2993 2994 int frame_size_in_words; 2995 2996 OopMapSet *oop_maps = new OopMapSet(); 2997 OopMap* map = NULL; 2998 2999 int start = __ offset(); 3000 3001 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 3002 3003 int frame_complete = __ offset(); 3004 3005 { 3006 Label retaddr; 3007 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 3008 3009 __ mov(c_rarg0, rthread); 3010 __ lea(rscratch1, RuntimeAddress(destination)); 3011 3012 __ blrt(rscratch1, 1, 0, 1); 3013 __ bind(retaddr); 3014 } 3015 3016 // Set an oopmap for the call site. 3017 // We need this not only for callee-saved registers, but also for volatile 3018 // registers that the compiler might be keeping live across a safepoint. 3019 3020 oop_maps->add_gc_map( __ offset() - start, map); 3021 3022 __ maybe_isb(); 3023 3024 // r0 contains the address we are going to jump to assuming no exception got installed 3025 3026 // clear last_Java_sp 3027 __ reset_last_Java_frame(false); 3028 // check for pending exceptions 3029 Label pending; 3030 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 3031 __ cbnz(rscratch1, pending); 3032 3033 // get the returned Method* 3034 __ get_vm_result_2(rmethod, rthread); 3035 __ str(rmethod, Address(sp, RegisterSaver::reg_offset_in_bytes(rmethod))); 3036 3037 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch 3038 __ str(r0, Address(sp, RegisterSaver::rscratch1_offset_in_bytes())); 3039 RegisterSaver::restore_live_registers(masm); 3040 3041 // We are back the the original state on entry and ready to go. 3042 3043 __ br(rscratch1); 3044 3045 // Pending exception after the safepoint 3046 3047 __ bind(pending); 3048 3049 RegisterSaver::restore_live_registers(masm); 3050 3051 // exception pending => remove activation and forward to exception handler 3052 3053 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 3054 3055 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 3056 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3057 3058 // ------------- 3059 // make sure all code is generated 3060 masm->flush(); 3061 3062 // return the blob 3063 // frame_size_words or bytes?? 3064 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); 3065 } 3066 3067 #if COMPILER2_OR_JVMCI 3068 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame 3069 // 3070 //------------------------------generate_exception_blob--------------------------- 3071 // creates exception blob at the end 3072 // Using exception blob, this code is jumped from a compiled method. 3073 // (see emit_exception_handler in x86_64.ad file) 3074 // 3075 // Given an exception pc at a call we call into the runtime for the 3076 // handler in this method. This handler might merely restore state 3077 // (i.e. callee save registers) unwind the frame and jump to the 3078 // exception handler for the nmethod if there is no Java level handler 3079 // for the nmethod. 3080 // 3081 // This code is entered with a jmp. 3082 // 3083 // Arguments: 3084 // r0: exception oop 3085 // r3: exception pc 3086 // 3087 // Results: 3088 // r0: exception oop 3089 // r3: exception pc in caller or ??? 3090 // destination: exception handler of caller 3091 // 3092 // Note: the exception pc MUST be at a call (precise debug information) 3093 // Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved. 3094 // 3095 3096 void OptoRuntime::generate_exception_blob() { 3097 assert(!OptoRuntime::is_callee_saved_register(R3_num), ""); 3098 assert(!OptoRuntime::is_callee_saved_register(R0_num), ""); 3099 assert(!OptoRuntime::is_callee_saved_register(R2_num), ""); 3100 3101 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 3102 3103 // Allocate space for the code 3104 ResourceMark rm; 3105 // Setup code generation tools 3106 CodeBuffer buffer("exception_blob", 2048, 1024); 3107 MacroAssembler* masm = new MacroAssembler(&buffer); 3108 3109 // TODO check various assumptions made here 3110 // 3111 // make sure we do so before running this 3112 3113 address start = __ pc(); 3114 3115 // push rfp and retaddr by hand 3116 // Exception pc is 'return address' for stack walker 3117 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize))); 3118 // there are no callee save registers and we don't expect an 3119 // arg reg save area 3120 #ifndef PRODUCT 3121 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 3122 #endif 3123 // Store exception in Thread object. We cannot pass any arguments to the 3124 // handle_exception call, since we do not want to make any assumption 3125 // about the size of the frame where the exception happened in. 3126 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 3127 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 3128 3129 // This call does all the hard work. It checks if an exception handler 3130 // exists in the method. 3131 // If so, it returns the handler address. 3132 // If not, it prepares for stack-unwinding, restoring the callee-save 3133 // registers of the frame being removed. 3134 // 3135 // address OptoRuntime::handle_exception_C(JavaThread* thread) 3136 // 3137 // n.b. 1 gp arg, 0 fp args, integral return type 3138 3139 // the stack should always be aligned 3140 address the_pc = __ pc(); 3141 __ set_last_Java_frame(sp, noreg, the_pc, rscratch1); 3142 __ mov(c_rarg0, rthread); 3143 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); 3144 __ blrt(rscratch1, 1, 0, MacroAssembler::ret_type_integral); 3145 __ maybe_isb(); 3146 3147 // Set an oopmap for the call site. This oopmap will only be used if we 3148 // are unwinding the stack. Hence, all locations will be dead. 3149 // Callee-saved registers will be the same as the frame above (i.e., 3150 // handle_exception_stub), since they were restored when we got the 3151 // exception. 3152 3153 OopMapSet* oop_maps = new OopMapSet(); 3154 3155 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 3156 3157 __ reset_last_Java_frame(false); 3158 3159 // Restore callee-saved registers 3160 3161 // rfp is an implicitly saved callee saved register (i.e. the calling 3162 // convention will save restore it in prolog/epilog) Other than that 3163 // there are no callee save registers now that adapter frames are gone. 3164 // and we dont' expect an arg reg save area 3165 __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize))); 3166 3167 // r0: exception handler 3168 3169 // We have a handler in r0 (could be deopt blob). 3170 __ mov(r8, r0); 3171 3172 // Get the exception oop 3173 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 3174 // Get the exception pc in case we are deoptimized 3175 __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset())); 3176 #ifdef ASSERT 3177 __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset())); 3178 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 3179 #endif 3180 // Clear the exception oop so GC no longer processes it as a root. 3181 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 3182 3183 // r0: exception oop 3184 // r8: exception handler 3185 // r4: exception pc 3186 // Jump to handler 3187 3188 __ br(r8); 3189 3190 // Make sure all code is generated 3191 masm->flush(); 3192 3193 // Set exception blob 3194 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); 3195 } 3196 #endif // COMPILER2_OR_JVMCI