--- old/src/os/solaris/vm/os_solaris.inline.hpp 2017-06-08 14:41:11.235007940 +0200 +++ new/src/os/solaris/vm/os_solaris.inline.hpp 2017-06-08 14:41:11.095007945 +0200 @@ -80,18 +80,15 @@ inline struct dirent* os::readdir(DIR* dirp, dirent* dbuf) { assert(dirp != NULL, "just checking"); -#if defined(_LP64) || defined(_GNU_SOURCE) || _FILE_OFFSET_BITS==64 dirent* p; int status; if((status = ::readdir_r(dirp, dbuf, &p)) != 0) { errno = status; return NULL; - } else + } else { return p; -#else // defined(_LP64) || defined(_GNU_SOURCE) || _FILE_OFFSET_BITS==64 - return ::readdir_r(dirp, dbuf); -#endif // defined(_LP64) || defined(_GNU_SOURCE) || _FILE_OFFSET_BITS==64 + } } inline int os::closedir(DIR *dirp) { --- old/src/os_cpu/solaris_sparc/vm/atomic_solaris_sparc.hpp 2017-06-08 14:41:12.103007910 +0200 +++ new/src/os_cpu/solaris_sparc/vm/atomic_solaris_sparc.hpp 2017-06-08 14:41:11.963007915 +0200 @@ -54,114 +54,6 @@ inline void Atomic::store(jlong store_value, volatile jlong* dest) { *dest = store_value; } inline jlong Atomic::load(const volatile jlong* src) { return *src; } -#ifdef _GNU_SOURCE - -inline jint Atomic::add (jint add_value, volatile jint* dest) { - intptr_t rv; - __asm__ volatile( - "1: \n\t" - " ld [%2], %%o2\n\t" - " add %1, %%o2, %%o3\n\t" - " cas [%2], %%o2, %%o3\n\t" - " cmp %%o2, %%o3\n\t" - " bne 1b\n\t" - " nop\n\t" - " add %1, %%o2, %0\n\t" - : "=r" (rv) - : "r" (add_value), "r" (dest) - : "memory", "o2", "o3"); - return rv; -} - -inline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) { - intptr_t rv; - __asm__ volatile( - "1: \n\t" - " ldx [%2], %%o2\n\t" - " add %0, %%o2, %%o3\n\t" - " casx [%2], %%o2, %%o3\n\t" - " cmp %%o2, %%o3\n\t" - " bne %%xcc, 1b\n\t" - " nop\n\t" - " add %0, %%o2, %0\n\t" - : "=r" (rv) - : "r" (add_value), "r" (dest) - : "memory", "o2", "o3"); - return rv; -} - -inline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) { - return (void*)add_ptr((intptr_t)add_value, (volatile intptr_t*)dest); -} - - -inline jint Atomic::xchg (jint exchange_value, volatile jint* dest) { - intptr_t rv = exchange_value; - __asm__ volatile( - " swap [%2],%1\n\t" - : "=r" (rv) - : "0" (exchange_value) /* we use same register as for return value */, "r" (dest) - : "memory"); - return rv; -} - -inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest) { - intptr_t rv = exchange_value; - __asm__ volatile( - "1:\n\t" - " mov %1, %%o3\n\t" - " ldx [%2], %%o2\n\t" - " casx [%2], %%o2, %%o3\n\t" - " cmp %%o2, %%o3\n\t" - " bne %%xcc, 1b\n\t" - " nop\n\t" - " mov %%o2, %0\n\t" - : "=r" (rv) - : "r" (exchange_value), "r" (dest) - : "memory", "o2", "o3"); - return rv; -} - -inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) { - return (void*)xchg_ptr((intptr_t)exchange_value, (volatile intptr_t*)dest); -} - - -inline jint Atomic::cmpxchg (jint exchange_value, volatile jint* dest, jint compare_value, cmpxchg_memory_order order) { - jint rv; - __asm__ volatile( - " cas [%2], %3, %0" - : "=r" (rv) - : "0" (exchange_value), "r" (dest), "r" (compare_value) - : "memory"); - return rv; -} - -inline jlong Atomic::cmpxchg (jlong exchange_value, volatile jlong* dest, jlong compare_value, cmpxchg_memory_order order) { - jlong rv; - __asm__ volatile( - " casx [%2], %3, %0" - : "=r" (rv) - : "0" (exchange_value), "r" (dest), "r" (compare_value) - : "memory"); - return rv; -} - -inline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value, cmpxchg_memory_order order) { - intptr_t rv; - __asm__ volatile( - " casx [%2], %3, %0" - : "=r" (rv) - : "0" (exchange_value), "r" (dest), "r" (compare_value) - : "memory"); - return rv; -} - -inline void* Atomic::cmpxchg_ptr(void* exchange_value, volatile void* dest, void* compare_value, cmpxchg_memory_order order) { - return (void*)cmpxchg_ptr((intptr_t)exchange_value, (volatile intptr_t*)dest, (intptr_t)compare_value, order); -} - -#else // _GNU_SOURCE // This is the interface to the atomic instructions in solaris_sparc.il. // It's very messy because we need to support v8 and these instructions @@ -223,6 +115,4 @@ return (void*)cmpxchg_ptr((intptr_t)exchange_value, (volatile intptr_t*)dest, (intptr_t)compare_value, order); } -#endif // _GNU_SOURCE - #endif // OS_CPU_SOLARIS_SPARC_VM_ATOMIC_SOLARIS_SPARC_HPP --- old/src/os_cpu/solaris_sparc/vm/prefetch_solaris_sparc.inline.hpp 2017-06-08 14:41:12.751007887 +0200 +++ new/src/os_cpu/solaris_sparc/vm/prefetch_solaris_sparc.inline.hpp 2017-06-08 14:41:12.591007893 +0200 @@ -40,17 +40,4 @@ _Prefetch_write(loc, interval); } -#ifdef _GNU_SOURCE -extern "C" { - inline void _Prefetch_read (void *loc, intx interval) { - __asm__ volatile - ("prefetch [%0+%1], 0" : : "r" (loc), "r" (interval) : "memory" ); - } - inline void _Prefetch_write(void *loc, intx interval) { - __asm__ volatile - ("prefetch [%0+%1], 2" : : "r" (loc), "r" (interval) : "memory" ); - } -} -#endif // _GNU_SOURCE - #endif // OS_CPU_SOLARIS_SPARC_VM_PREFETCH_SOLARIS_SPARC_INLINE_HPP --- old/src/os_cpu/solaris_x86/vm/atomic_solaris_x86.hpp 2017-06-08 14:41:13.511007861 +0200 +++ new/src/os_cpu/solaris_x86/vm/atomic_solaris_x86.hpp 2017-06-08 14:41:13.339007867 +0200 @@ -161,100 +161,5 @@ #endif // AMD64 -#ifdef _GNU_SOURCE - -extern "C" { - inline jint _Atomic_add(jint add_value, volatile jint* dest) { - jint addend = add_value; - __asm__ volatile ("lock xaddl %0,(%2)" - : "=r" (addend) - : "0" (addend), "r" (dest) - : "cc", "memory"); - return addend + add_value; - } - -#ifdef AMD64 - inline jlong _Atomic_add_long(jlong add_value, volatile jlong* dest) { - intptr_t addend = add_value; - __asm__ __volatile__ ("lock xaddq %0,(%2)" - : "=r" (addend) - : "0" (addend), "r" (dest) - : "cc", "memory"); - return addend + add_value; - } - - inline jlong _Atomic_xchg_long(jlong exchange_value, volatile jlong* dest) { - __asm__ __volatile__ ("xchgq (%2),%0" - : "=r" (exchange_value) - : "0" (exchange_value), "r" (dest) - : "memory"); - return exchange_value; - } - -#endif // AMD64 - - inline jint _Atomic_xchg(jint exchange_value, volatile jint* dest) { - __asm__ __volatile__ ("xchgl (%2),%0" - : "=r" (exchange_value) - : "0" (exchange_value), "r" (dest) - : "memory"); - return exchange_value; - } - - inline jint _Atomic_cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value) { - __asm__ volatile ("lock cmpxchgl %1,(%3)" - : "=a" (exchange_value) - : "r" (exchange_value), "a" (compare_value), "r" (dest) - : "cc", "memory"); - return exchange_value; - } - - - inline jbyte _Atomic_cmpxchg_byte(jbyte exchange_value, volatile jbyte* dest, jbyte compare_value) { - __asm__ volatile ("lock cmpxchgb %1,(%3)" - : "=a" (exchange_value) - : "q" (exchange_value), "a" (compare_value), "r" (dest) - : "cc", "memory"); - return exchange_value; - } - - // This is the interface to the atomic instruction in solaris_i486.s. - jlong _Atomic_cmpxchg_long_gcc(jlong exchange_value, volatile jlong* dest, jlong compare_value); - - inline jlong _Atomic_cmpxchg_long(jlong exchange_value, volatile jlong* dest, jlong compare_value) { -#ifdef AMD64 - __asm__ __volatile__ ("lock cmpxchgq %1,(%3)" - : "=a" (exchange_value) - : "r" (exchange_value), "a" (compare_value), "r" (dest) - : "cc", "memory"); - return exchange_value; -#else - return _Atomic_cmpxchg_long_gcc(exchange_value, dest, compare_value); - - #if 0 - // The code below does not work presumably because of the bug in gcc - // The error message says: - // can't find a register in class BREG while reloading asm - // However I want to save this code and later replace _Atomic_cmpxchg_long_gcc - // with such inline asm code: - - volatile jlong_accessor evl, cvl, rv; - evl.long_value = exchange_value; - cvl.long_value = compare_value; - - __asm__ volatile ( - "lock cmpxchg8b (%%edi)\n\t" - : "=a"(cvl.words[0]), "=d"(cvl.words[1]) - : "a"(cvl.words[0]), "d"(cvl.words[1]), - "b"(evl.words[0]), "c"(evl.words[1]), - "D"(dest) - : "cc", "memory"); - return cvl.long_value; - #endif // if 0 -#endif // AMD64 - } -} - -#endif // _GNU_SOURCE #endif // OS_CPU_SOLARIS_X86_VM_ATOMIC_SOLARIS_X86_HPP --- old/src/os_cpu/solaris_x86/vm/bytes_solaris_x86.inline.hpp 2017-06-08 14:41:14.183007837 +0200 +++ new/src/os_cpu/solaris_x86/vm/bytes_solaris_x86.inline.hpp 2017-06-08 14:41:14.043007842 +0200 @@ -61,56 +61,4 @@ } #endif // !AMD64 - -#ifdef _GNU_SOURCE - -extern "C" { -#ifdef AMD64 - inline u2 _raw_swap_u2(u2 x) { - register unsigned short int __dest; - __asm__ ("rorw $8, %w0": "=r" (__dest): "0" (x): "cc"); - return __dest; - } - inline u4 _raw_swap_u4(u4 x) { - register unsigned int __dest; - __asm__ ("bswap %0" : "=r" (__dest) : "0" (x)); - return __dest; - } - inline u8 _raw_swap_u8(u8 x) { - register unsigned long __dest; - __asm__ ("bswap %q0" : "=r" (__dest) : "0" (x)); - return __dest; - } -#else - inline u2 _raw_swap_u2(u2 x) { - u2 ret; - __asm__ __volatile__ ( - "movw %0, %%ax;" - "xchg %%al, %%ah;" - "movw %%ax, %0" - :"=r" (ret) // output : register 0 => ret - :"0" (x) // input : x => register 0 - :"ax", "0" // clobbered registers - ); - return ret; - } - - inline u4 _raw_swap_u4(u4 x) { - u4 ret; - __asm__ __volatile__ ( - "bswap %0" - :"=r" (ret) // output : register 0 => ret - :"0" (x) // input : x => register 0 - :"0" // clobbered register - ); - return ret; - } - - inline u8 _raw_swap_u8(u4 x, u4 y) { - return (((u8)_raw_swap_u4(x))<<32) | _raw_swap_u4(y); - } -#endif // AMD64 -} -#endif //_GNU_SOURCE - #endif // OS_CPU_SOLARIS_X86_VM_BYTES_SOLARIS_X86_INLINE_HPP