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src/cpu/x86/vm/assembler_x86.hpp

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rev 8802 : G1 performance improvements: card batching, joining, sorting, prefetching and write barrier fence elision and simplification based on a global syncrhonization using handshakes piggybacking on thread-local safepoints.


1801 
1802   void subq(Address dst, int32_t imm32);
1803   void subq(Address dst, Register src);
1804   void subq(Register dst, int32_t imm32);
1805   void subq(Register dst, Address src);
1806   void subq(Register dst, Register src);
1807 
1808   // Force generation of a 4 byte immediate value even if it fits into 8bit
1809   void subl_imm32(Register dst, int32_t imm32);
1810   void subq_imm32(Register dst, int32_t imm32);
1811 
1812   // Subtract Scalar Double-Precision Floating-Point Values
1813   void subsd(XMMRegister dst, Address src);
1814   void subsd(XMMRegister dst, XMMRegister src);
1815 
1816   // Subtract Scalar Single-Precision Floating-Point Values
1817   void subss(XMMRegister dst, Address src);
1818   void subss(XMMRegister dst, XMMRegister src);
1819 
1820   void testb(Register dst, int imm8);

1821 
1822   void testl(Register dst, int32_t imm32);
1823   void testl(Register dst, Register src);
1824   void testl(Register dst, Address src);
1825 
1826   void testq(Register dst, int32_t imm32);
1827   void testq(Register dst, Register src);
1828 
1829   // BMI - count trailing zeros
1830   void tzcntl(Register dst, Register src);
1831   void tzcntq(Register dst, Register src);
1832 
1833   // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1834   void ucomisd(XMMRegister dst, Address src);
1835   void ucomisd(XMMRegister dst, XMMRegister src);
1836 
1837   // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1838   void ucomiss(XMMRegister dst, Address src);
1839   void ucomiss(XMMRegister dst, XMMRegister src);
1840 




1801 
1802   void subq(Address dst, int32_t imm32);
1803   void subq(Address dst, Register src);
1804   void subq(Register dst, int32_t imm32);
1805   void subq(Register dst, Address src);
1806   void subq(Register dst, Register src);
1807 
1808   // Force generation of a 4 byte immediate value even if it fits into 8bit
1809   void subl_imm32(Register dst, int32_t imm32);
1810   void subq_imm32(Register dst, int32_t imm32);
1811 
1812   // Subtract Scalar Double-Precision Floating-Point Values
1813   void subsd(XMMRegister dst, Address src);
1814   void subsd(XMMRegister dst, XMMRegister src);
1815 
1816   // Subtract Scalar Single-Precision Floating-Point Values
1817   void subss(XMMRegister dst, Address src);
1818   void subss(XMMRegister dst, XMMRegister src);
1819 
1820   void testb(Register dst, int imm8);
1821   void testb(Address dst, int8_t imm8);
1822 
1823   void testl(Register dst, int32_t imm32);
1824   void testl(Register dst, Register src);
1825   void testl(Register dst, Address src);
1826 
1827   void testq(Register dst, int32_t imm32);
1828   void testq(Register dst, Register src);
1829 
1830   // BMI - count trailing zeros
1831   void tzcntl(Register dst, Register src);
1832   void tzcntq(Register dst, Register src);
1833 
1834   // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1835   void ucomisd(XMMRegister dst, Address src);
1836   void ucomisd(XMMRegister dst, XMMRegister src);
1837 
1838   // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1839   void ucomiss(XMMRegister dst, Address src);
1840   void ucomiss(XMMRegister dst, XMMRegister src);
1841
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