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src/share/vm/c1/c1_LIR.hpp

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rev 8802 : G1 performance improvements: card batching, joining, sorting, prefetching and write barrier fence elision and simplification based on a global syncrhonization using handshakes piggybacking on thread-local safepoints.

*** 34,43 **** --- 34,44 ---- class LIR_Assembler; class CodeEmitInfo; class CodeStub; class CodeStubList; class ArrayCopyStub; + class C1ThreadLocalSafepoint; class LIR_Op; class ciType; class ValueType; class LIR_OpVisitState; class FpuStackSim;
*** 871,880 **** --- 872,882 ---- class LIR_Op; class LIR_Op0; class LIR_OpLabel; class LIR_Op1; class LIR_OpBranch; + class LIR_Op1Safepoint; class LIR_OpConvert; class LIR_OpAllocObj; class LIR_OpRoundFP; class LIR_Op2; class LIR_OpDelay;
*** 1140,1149 **** --- 1142,1152 ---- virtual LIR_OpLock* as_OpLock() { return NULL; } virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } virtual LIR_OpBranch* as_OpBranch() { return NULL; } + virtual LIR_Op1Safepoint* as_Op1Safepoint() { return NULL; } virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } virtual LIR_OpConvert* as_OpConvert() { return NULL; } virtual LIR_Op0* as_Op0() { return NULL; } virtual LIR_Op1* as_Op1() { return NULL; } virtual LIR_Op2* as_Op2() { return NULL; }
*** 1466,1475 **** --- 1469,1491 ---- virtual void emit_code(LIR_Assembler* masm); virtual LIR_OpBranch* as_OpBranch() { return this; } virtual void print_instr(outputStream* out) const PRODUCT_RETURN; }; + class LIR_Op1Safepoint: public LIR_Op1 { + friend class LIR_OpVisitState; + + private: + C1ThreadLocalSafepoint* _tls_stub; + + public: + LIR_Op1Safepoint(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info); + + C1ThreadLocalSafepoint* tls_stub() const { return _tls_stub; } + + virtual LIR_Op1Safepoint* as_Op1Safepoint() { return this; } + }; class ConversionStub; class LIR_OpConvert: public LIR_Op1 { friend class LIR_OpVisitState;
*** 2138,2150 **** void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); ! void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } ! void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } #ifdef PPC void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } #endif void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } --- 2154,2166 ---- void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); ! void return_op(LIR_Opr result) { append(new LIR_Op1Safepoint(lir_return, result, NULL)); } ! void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1Safepoint(lir_safepoint, tmp, info)); } #ifdef PPC void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } #endif void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
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