src/share/vm/c1/c1_LIRAssembler.hpp

rev 8802 : G1 performance improvements: card batching, joining, sorting, prefetching and write barrier fence elision and simplification based on a global syncrhonization using handshakes piggybacking on thread-local safepoints.

*** 159,174 ****
  
    // any last minute peephole optimizations are performed here.  In
    // particular sparc uses this for delay slot filling.
    void peephole(LIR_List* list);
  
!   void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info);
  
!   void return_op(LIR_Opr result);
  
    // returns offset of poll instruction
!   int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
  
    void const2reg  (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
    void const2stack(LIR_Opr src, LIR_Opr dest);
    void const2mem  (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
    void reg2stack  (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
--- 159,174 ----
  
    // any last minute peephole optimizations are performed here.  In
    // particular sparc uses this for delay slot filling.
    void peephole(LIR_List* list);
  
!   void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, C1ThreadLocalSafepoint *tls_stub, CodeEmitInfo* info);
  
!   void return_op(LIR_Opr result, C1ThreadLocalSafepoint *code_stub);
  
    // returns offset of poll instruction
!   int safepoint_poll(LIR_Opr result, C1ThreadLocalSafepoint *tls_stub, CodeEmitInfo* info);
  
    void const2reg  (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
    void const2stack(LIR_Opr src, LIR_Opr dest);
    void const2mem  (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
    void reg2stack  (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);