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src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
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rev 12906 : [mq]: gc_interface
*** 34,46 ****
#include "runtime/sharedRuntime.hpp"
#include "runtime/signature.hpp"
#include "runtime/vframeArray.hpp"
#include "utilities/macros.hpp"
#include "vmreg_sparc.inline.hpp"
- #if INCLUDE_ALL_GCS
- #include "gc/g1/g1SATBCardTableModRefBS.hpp"
- #endif
// Implementation of StubAssembler
int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
// for sparc changing the number of arguments doesn't change
--- 34,43 ----
*** 137,158 ****
mov(arg2, O2); assert(arg2 != O1, "smashed argument");
mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
return call_RT(oop_result1, metadata_result, entry, 3);
}
// Implementation of Runtime1
- #define __ sasm->
static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
static int reg_save_size_in_words;
static int frame_size_in_bytes = -1;
static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
! assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
"mismatch in calculation");
sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
--- 134,161 ----
mov(arg2, O2); assert(arg2 != O1, "smashed argument");
mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
return call_RT(oop_result1, metadata_result, entry, 3);
}
+ void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
+ set_info(name, must_gc_arguments);
+ }
+
+ void StubAssembler::epilogue() {
+ delayed()->restore();
+ }
// Implementation of Runtime1
static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
static int reg_save_size_in_words;
static int frame_size_in_bytes = -1;
static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
! assert(frame_size_in_bytes == sasm->total_frame_size_in_bytes(reg_save_size_in_words),
"mismatch in calculation");
sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
*** 175,185 ****
}
}
return oop_map;
}
! static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
"mismatch in calculation");
__ save_frame_c1(frame_size_in_bytes);
// Record volatile registers as callee-save values in an OopMap so their save locations will be
--- 178,190 ----
}
}
return oop_map;
}
! #define __ this->
!
! void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
"mismatch in calculation");
__ save_frame_c1(frame_size_in_bytes);
// Record volatile registers as callee-save values in an OopMap so their save locations will be
*** 203,217 ****
FloatRegister r = as_FloatRegister(i);
int sp_offset = fpu_reg_save_offsets[i];
__ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
}
}
-
- return generate_oop_map(sasm, save_fpu_registers);
}
! static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
Register r = as_Register(i);
if (r == G1 || r == G3 || r == G4 || r == G5) {
__ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
}
--- 208,220 ----
FloatRegister r = as_FloatRegister(i);
int sp_offset = fpu_reg_save_offsets[i];
__ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
}
}
}
! void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
Register r = as_Register(i);
if (r == G1 || r == G3 || r == G4 || r == G5) {
__ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
}
*** 223,232 ****
--- 226,247 ----
__ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
}
}
}
+ #undef __
+ #define __ sasm->
+
+ static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
+ sasm->save_live_registers_no_oop_map(save_fpu_registers);
+ return generate_oop_map(sasm, save_fpu_registers);
+ }
+
+ static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
+ sasm->restore_live_registers(restore_fpu_registers);
+ }
+
void Runtime1::initialize_pd() {
// compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
//
// A stub routine will have a frame that is at least large enough to hold
*** 835,1013 ****
__ ret();
__ delayed()->restore();
}
break;
- #if INCLUDE_ALL_GCS
- case g1_pre_barrier_slow_id:
- { // G4: previous value of memory
- BarrierSet* bs = Universe::heap()->barrier_set();
- if (bs->kind() != BarrierSet::G1SATBCTLogging) {
- __ save_frame(0);
- __ set((int)id, O1);
- __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
- __ should_not_reach_here();
- break;
- }
-
- __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
-
- Register pre_val = G4;
- Register tmp = G1_scratch;
- Register tmp2 = G3_scratch;
-
- Label refill, restart;
- int satb_q_active_byte_offset =
- in_bytes(JavaThread::satb_mark_queue_offset() +
- SATBMarkQueue::byte_offset_of_active());
- int satb_q_index_byte_offset =
- in_bytes(JavaThread::satb_mark_queue_offset() +
- SATBMarkQueue::byte_offset_of_index());
- int satb_q_buf_byte_offset =
- in_bytes(JavaThread::satb_mark_queue_offset() +
- SATBMarkQueue::byte_offset_of_buf());
-
- // Is marking still active?
- if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
- __ ld(G2_thread, satb_q_active_byte_offset, tmp);
- } else {
- assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
- __ ldsb(G2_thread, satb_q_active_byte_offset, tmp);
- }
- __ cmp_and_br_short(tmp, G0, Assembler::notEqual, Assembler::pt, restart);
- __ retl();
- __ delayed()->nop();
-
- __ bind(restart);
- // Load the index into the SATB buffer. SATBMarkQueue::_index is a
- // size_t so ld_ptr is appropriate
- __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
-
- // index == 0?
- __ cmp_and_brx_short(tmp, G0, Assembler::equal, Assembler::pn, refill);
-
- __ ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
- __ sub(tmp, oopSize, tmp);
-
- __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
- // Use return-from-leaf
- __ retl();
- __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
-
- __ bind(refill);
-
- save_live_registers(sasm);
-
- __ call_VM_leaf(L7_thread_cache,
- CAST_FROM_FN_PTR(address,
- SATBMarkQueueSet::handle_zero_index_for_thread),
- G2_thread);
-
- restore_live_registers(sasm);
-
- __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
- __ delayed()->restore();
- }
- break;
-
- case g1_post_barrier_slow_id:
- {
- BarrierSet* bs = Universe::heap()->barrier_set();
- if (bs->kind() != BarrierSet::G1SATBCTLogging) {
- __ save_frame(0);
- __ set((int)id, O1);
- __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
- __ should_not_reach_here();
- break;
- }
-
- __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
-
- Register addr = G4;
- Register cardtable = G5;
- Register tmp = G1_scratch;
- Register tmp2 = G3_scratch;
- jbyte* byte_map_base = barrier_set_cast<CardTableModRefBS>(bs)->byte_map_base;
-
- Label not_already_dirty, restart, refill, young_card;
-
- __ srlx(addr, CardTableModRefBS::card_shift, addr);
-
- AddressLiteral rs(byte_map_base);
- __ set(rs, cardtable); // cardtable := <card table base>
- __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
-
- __ cmp_and_br_short(tmp, G1SATBCardTableModRefBS::g1_young_card_val(), Assembler::equal, Assembler::pt, young_card);
-
- __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
- __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
-
- assert(CardTableModRefBS::dirty_card_val() == 0, "otherwise check this code");
- __ cmp_and_br_short(tmp, G0, Assembler::notEqual, Assembler::pt, not_already_dirty);
-
- __ bind(young_card);
- // We didn't take the branch, so we're already dirty: return.
- // Use return-from-leaf
- __ retl();
- __ delayed()->nop();
-
- // Not dirty.
- __ bind(not_already_dirty);
-
- // Get cardtable + tmp into a reg by itself
- __ add(addr, cardtable, tmp2);
-
- // First, dirty it.
- __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
-
- Register tmp3 = cardtable;
- Register tmp4 = tmp;
-
- // these registers are now dead
- addr = cardtable = tmp = noreg;
-
- int dirty_card_q_index_byte_offset =
- in_bytes(JavaThread::dirty_card_queue_offset() +
- DirtyCardQueue::byte_offset_of_index());
- int dirty_card_q_buf_byte_offset =
- in_bytes(JavaThread::dirty_card_queue_offset() +
- DirtyCardQueue::byte_offset_of_buf());
-
- __ bind(restart);
-
- // Get the index into the update buffer. DirtyCardQueue::_index is
- // a size_t so ld_ptr is appropriate here.
- __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
-
- // index == 0?
- __ cmp_and_brx_short(tmp3, G0, Assembler::equal, Assembler::pn, refill);
-
- __ ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
- __ sub(tmp3, oopSize, tmp3);
-
- __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
- // Use return-from-leaf
- __ retl();
- __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
-
- __ bind(refill);
-
- save_live_registers(sasm);
-
- __ call_VM_leaf(L7_thread_cache,
- CAST_FROM_FN_PTR(address,
- DirtyCardQueueSet::handle_zero_index_for_thread),
- G2_thread);
-
- restore_live_registers(sasm);
-
- __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
- __ delayed()->restore();
- }
- break;
- #endif // INCLUDE_ALL_GCS
-
case predicate_failed_trap_id:
{
__ set_info("predicate_failed_trap", dont_gc_arguments);
OopMap* oop_map = save_live_registers(sasm);
--- 850,859 ----
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