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src/cpu/sparc/vm/macroAssembler_sparc.cpp

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rev 12906 : [mq]: gc_interface


  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.inline.hpp"
  27 #include "compiler/disassembler.hpp"
  28 #include "gc/shared/cardTableModRefBS.hpp"
  29 #include "gc/shared/collectedHeap.inline.hpp"


  30 #include "interpreter/interpreter.hpp"
  31 #include "memory/resourceArea.hpp"
  32 #include "memory/universe.hpp"
  33 #include "oops/klass.inline.hpp"
  34 #include "prims/methodHandles.hpp"
  35 #include "runtime/biasedLocking.hpp"
  36 #include "runtime/interfaceSupport.hpp"
  37 #include "runtime/objectMonitor.hpp"
  38 #include "runtime/os.inline.hpp"
  39 #include "runtime/sharedRuntime.hpp"
  40 #include "runtime/stubRoutines.hpp"
  41 #include "utilities/macros.hpp"
  42 #if INCLUDE_ALL_GCS
  43 #include "gc/g1/g1CollectedHeap.inline.hpp"
  44 #include "gc/g1/g1SATBCardTableModRefBS.hpp"
  45 #include "gc/g1/heapRegion.hpp"
  46 #endif // INCLUDE_ALL_GCS
  47 #ifdef COMPILER2
  48 #include "opto/intrinsicnode.hpp"
  49 #endif
  50 
  51 #ifdef PRODUCT
  52 #define BLOCK_COMMENT(str) /* nothing */
  53 #define STOP(error) stop(error)
  54 #else
  55 #define BLOCK_COMMENT(str) block_comment(str)
  56 #define STOP(error) block_comment(error); stop(error)
  57 #endif
  58 
  59 // Convert the raw encoding form into the form expected by the
  60 // constructor for Address.
  61 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) {
  62   assert(scale == 0, "not supported");
  63   RelocationHolder rspec;
  64   if (disp_reloc != relocInfo::none) {
  65     rspec = Relocation::spec_simple(disp_reloc);
  66   }


 150   case branch_op:
 151     switch (inv_op2(inst)) {
 152       case fbp_op2:    r = inv_wdisp(  inst, pos, 19);  break;
 153       case bp_op2:     r = inv_wdisp(  inst, pos, 19);  break;
 154       case fb_op2:     r = inv_wdisp(  inst, pos, 22);  break;
 155       case br_op2:     r = inv_wdisp(  inst, pos, 22);  break;
 156       case bpr_op2: {
 157         if (is_cbcond(inst)) {
 158           r = inv_wdisp10(inst, pos);
 159         } else {
 160           r = inv_wdisp16(inst, pos);
 161         }
 162         break;
 163       }
 164       default: ShouldNotReachHere();
 165     }
 166   }
 167   return r;
 168 }
 169 




















 170 void MacroAssembler::null_check(Register reg, int offset) {
 171   if (needs_explicit_null_check((intptr_t)offset)) {
 172     // provoke OS NULL exception if reg = NULL by
 173     // accessing M[reg] w/o changing any registers
 174     ld_ptr(reg, 0, G0);
 175   }
 176   else {
 177     // nothing to do, (later) access of M[reg + offset]
 178     // will provoke OS NULL exception if reg = NULL
 179   }
 180 }
 181 
 182 // Ring buffer jumps
 183 
 184 
 185 void MacroAssembler::jmp2(Register r1, Register r2, const char* file, int line ) {
 186   assert_not_delayed();
 187   jmpl(r1, r2, G0);
 188 }
 189 void MacroAssembler::jmp(Register r1, int offset, const char* file, int line ) {


 621     tst(L0);
 622     restore();
 623     breakpoint_trap(notZero, Assembler::ptr_cc);
 624     // }
 625 # endif
 626 
 627   st_ptr(oop_result, vm_result_addr);
 628 }
 629 
 630 
 631 void MacroAssembler::ic_call(address entry, bool emit_delay, jint method_index) {
 632   RelocationHolder rspec = virtual_call_Relocation::spec(pc(), method_index);
 633   patchable_set((intptr_t)Universe::non_oop_word(), G5_inline_cache_reg);
 634   relocate(rspec);
 635   call(entry, relocInfo::none);
 636   if (emit_delay) {
 637     delayed()->nop();
 638   }
 639 }
 640 
 641 void MacroAssembler::card_table_write(jbyte* byte_map_base,
 642                                       Register tmp, Register obj) {
 643   srlx(obj, CardTableModRefBS::card_shift, obj);
 644   assert(tmp != obj, "need separate temp reg");
 645   set((address) byte_map_base, tmp);
 646   stb(G0, tmp, obj);
 647 }
 648 
 649 
 650 void MacroAssembler::internal_sethi(const AddressLiteral& addrlit, Register d, bool ForceRelocatable) {
 651   address save_pc;
 652   int shiftcnt;
 653 # ifdef CHECK_DELAY
 654   assert_not_delayed((char*) "cannot put two instructions in delay slot");
 655 # endif
 656   v9_dep();
 657   save_pc = pc();
 658 
 659   int msb32 = (int) (addrlit.value() >> 32);
 660   int lsb32 = (int) (addrlit.value());
 661 
 662   if (msb32 == 0 && lsb32 >= 0) {
 663     Assembler::sethi(lsb32, d, addrlit.rspec());
 664   }
 665   else if (msb32 == -1) {
 666     Assembler::sethi(~lsb32, d, addrlit.rspec());
 667     xor3(d, ~low10(~0), d);
 668   }
 669   else {


3437     st(G0, Rtsp, Rscratch);
3438   }
3439 }
3440 
3441 void MacroAssembler::reserved_stack_check() {
3442   // testing if reserved zone needs to be enabled
3443   Label no_reserved_zone_enabling;
3444 
3445   ld_ptr(G2_thread, JavaThread::reserved_stack_activation_offset(), G4_scratch);
3446   cmp_and_brx_short(SP, G4_scratch, Assembler::lessUnsigned, Assembler::pt, no_reserved_zone_enabling);
3447 
3448   call_VM_leaf(L0, CAST_FROM_FN_PTR(address, SharedRuntime::enable_stack_reserved_zone), G2_thread);
3449 
3450   AddressLiteral stub(StubRoutines::throw_delayed_StackOverflowError_entry());
3451   jump_to(stub, G4_scratch);
3452   delayed()->restore();
3453 
3454   should_not_reach_here();
3455 
3456   bind(no_reserved_zone_enabling);
3457 }
3458 
3459 ///////////////////////////////////////////////////////////////////////////////////
3460 #if INCLUDE_ALL_GCS
3461 
3462 static address satb_log_enqueue_with_frame = NULL;
3463 static u_char* satb_log_enqueue_with_frame_end = NULL;
3464 
3465 static address satb_log_enqueue_frameless = NULL;
3466 static u_char* satb_log_enqueue_frameless_end = NULL;
3467 
3468 static int EnqueueCodeSize = 128 DEBUG_ONLY( + 256); // Instructions?
3469 
3470 static void generate_satb_log_enqueue(bool with_frame) {
3471   BufferBlob* bb = BufferBlob::create("enqueue_with_frame", EnqueueCodeSize);
3472   CodeBuffer buf(bb);
3473   MacroAssembler masm(&buf);
3474 
3475 #define __ masm.
3476 
3477   address start = __ pc();
3478   Register pre_val;
3479 
3480   Label refill, restart;
3481   if (with_frame) {
3482     __ save_frame(0);
3483     pre_val = I0;  // Was O0 before the save.
3484   } else {
3485     pre_val = O0;
3486   }
3487 
3488   int satb_q_index_byte_offset =
3489     in_bytes(JavaThread::satb_mark_queue_offset() +
3490              SATBMarkQueue::byte_offset_of_index());
3491 
3492   int satb_q_buf_byte_offset =
3493     in_bytes(JavaThread::satb_mark_queue_offset() +
3494              SATBMarkQueue::byte_offset_of_buf());
3495 
3496   assert(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t) &&
3497          in_bytes(SATBMarkQueue::byte_width_of_buf()) == sizeof(intptr_t),
3498          "check sizes in assembly below");
3499 
3500   __ bind(restart);
3501 
3502   // Load the index into the SATB buffer. SATBMarkQueue::_index is a size_t
3503   // so ld_ptr is appropriate.
3504   __ ld_ptr(G2_thread, satb_q_index_byte_offset, L0);
3505 
3506   // index == 0?
3507   __ cmp_and_brx_short(L0, G0, Assembler::equal, Assembler::pn, refill);
3508 
3509   __ ld_ptr(G2_thread, satb_q_buf_byte_offset, L1);
3510   __ sub(L0, oopSize, L0);
3511 
3512   __ st_ptr(pre_val, L1, L0);  // [_buf + index] := I0
3513   if (!with_frame) {
3514     // Use return-from-leaf
3515     __ retl();
3516     __ delayed()->st_ptr(L0, G2_thread, satb_q_index_byte_offset);
3517   } else {
3518     // Not delayed.
3519     __ st_ptr(L0, G2_thread, satb_q_index_byte_offset);
3520   }
3521   if (with_frame) {
3522     __ ret();
3523     __ delayed()->restore();
3524   }
3525   __ bind(refill);
3526 
3527   address handle_zero =
3528     CAST_FROM_FN_PTR(address,
3529                      &SATBMarkQueueSet::handle_zero_index_for_thread);
3530   // This should be rare enough that we can afford to save all the
3531   // scratch registers that the calling context might be using.
3532   __ mov(G1_scratch, L0);
3533   __ mov(G3_scratch, L1);
3534   __ mov(G4, L2);
3535   // We need the value of O0 above (for the write into the buffer), so we
3536   // save and restore it.
3537   __ mov(O0, L3);
3538   // Since the call will overwrite O7, we save and restore that, as well.
3539   __ mov(O7, L4);
3540   __ call_VM_leaf(L5, handle_zero, G2_thread);
3541   __ mov(L0, G1_scratch);
3542   __ mov(L1, G3_scratch);
3543   __ mov(L2, G4);
3544   __ mov(L3, O0);
3545   __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
3546   __ delayed()->mov(L4, O7);
3547 
3548   if (with_frame) {
3549     satb_log_enqueue_with_frame = start;
3550     satb_log_enqueue_with_frame_end = __ pc();
3551   } else {
3552     satb_log_enqueue_frameless = start;
3553     satb_log_enqueue_frameless_end = __ pc();
3554   }
3555 
3556 #undef __
3557 }
3558 
3559 static inline void generate_satb_log_enqueue_if_necessary(bool with_frame) {
3560   if (with_frame) {
3561     if (satb_log_enqueue_with_frame == 0) {
3562       generate_satb_log_enqueue(with_frame);
3563       assert(satb_log_enqueue_with_frame != 0, "postcondition.");
3564     }
3565   } else {
3566     if (satb_log_enqueue_frameless == 0) {
3567       generate_satb_log_enqueue(with_frame);
3568       assert(satb_log_enqueue_frameless != 0, "postcondition.");
3569     }
3570   }
3571 }
3572 
3573 void MacroAssembler::g1_write_barrier_pre(Register obj,
3574                                           Register index,
3575                                           int offset,
3576                                           Register pre_val,
3577                                           Register tmp,
3578                                           bool preserve_o_regs) {
3579   Label filtered;
3580 
3581   if (obj == noreg) {
3582     // We are not loading the previous value so make
3583     // sure that we don't trash the value in pre_val
3584     // with the code below.
3585     assert_different_registers(pre_val, tmp);
3586   } else {
3587     // We will be loading the previous value
3588     // in this code so...
3589     assert(offset == 0 || index == noreg, "choose one");
3590     assert(pre_val == noreg, "check this code");
3591   }
3592 
3593   // Is marking active?
3594   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
3595     ld(G2,
3596        in_bytes(JavaThread::satb_mark_queue_offset() +
3597                 SATBMarkQueue::byte_offset_of_active()),
3598        tmp);
3599   } else {
3600     guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1,
3601               "Assumption");
3602     ldsb(G2,
3603          in_bytes(JavaThread::satb_mark_queue_offset() +
3604                   SATBMarkQueue::byte_offset_of_active()),
3605          tmp);
3606   }
3607 
3608   // Is marking active?
3609   cmp_and_br_short(tmp, G0, Assembler::equal, Assembler::pt, filtered);
3610 
3611   // Do we need to load the previous value?
3612   if (obj != noreg) {
3613     // Load the previous value...
3614     if (index == noreg) {
3615       if (Assembler::is_simm13(offset)) {
3616         load_heap_oop(obj, offset, tmp);
3617       } else {
3618         set(offset, tmp);
3619         load_heap_oop(obj, tmp, tmp);
3620       }
3621     } else {
3622       load_heap_oop(obj, index, tmp);
3623     }
3624     // Previous value has been loaded into tmp
3625     pre_val = tmp;
3626   }
3627 
3628   assert(pre_val != noreg, "must have a real register");
3629 
3630   // Is the previous value null?
3631   cmp_and_brx_short(pre_val, G0, Assembler::equal, Assembler::pt, filtered);
3632 
3633   // OK, it's not filtered, so we'll need to call enqueue.  In the normal
3634   // case, pre_val will be a scratch G-reg, but there are some cases in
3635   // which it's an O-reg.  In the first case, do a normal call.  In the
3636   // latter, do a save here and call the frameless version.
3637 
3638   guarantee(pre_val->is_global() || pre_val->is_out(),
3639             "Or we need to think harder.");
3640 
3641   if (pre_val->is_global() && !preserve_o_regs) {
3642     generate_satb_log_enqueue_if_necessary(true); // with frame
3643 
3644     call(satb_log_enqueue_with_frame);
3645     delayed()->mov(pre_val, O0);
3646   } else {
3647     generate_satb_log_enqueue_if_necessary(false); // frameless
3648 
3649     save_frame(0);
3650     call(satb_log_enqueue_frameless);
3651     delayed()->mov(pre_val->after_save(), O0);
3652     restore();
3653   }
3654 
3655   bind(filtered);
3656 }
3657 
3658 static address dirty_card_log_enqueue = 0;
3659 static u_char* dirty_card_log_enqueue_end = 0;
3660 
3661 // This gets to assume that o0 contains the object address.
3662 static void generate_dirty_card_log_enqueue(jbyte* byte_map_base) {
3663   BufferBlob* bb = BufferBlob::create("dirty_card_enqueue", EnqueueCodeSize*2);
3664   CodeBuffer buf(bb);
3665   MacroAssembler masm(&buf);
3666 #define __ masm.
3667   address start = __ pc();
3668 
3669   Label not_already_dirty, restart, refill, young_card;
3670 
3671   __ srlx(O0, CardTableModRefBS::card_shift, O0);
3672   AddressLiteral addrlit(byte_map_base);
3673   __ set(addrlit, O1); // O1 := <card table base>
3674   __ ldub(O0, O1, O2); // O2 := [O0 + O1]
3675 
3676   __ cmp_and_br_short(O2, G1SATBCardTableModRefBS::g1_young_card_val(), Assembler::equal, Assembler::pt, young_card);
3677 
3678   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
3679   __ ldub(O0, O1, O2); // O2 := [O0 + O1]
3680 
3681   assert(CardTableModRefBS::dirty_card_val() == 0, "otherwise check this code");
3682   __ cmp_and_br_short(O2, G0, Assembler::notEqual, Assembler::pt, not_already_dirty);
3683 
3684   __ bind(young_card);
3685   // We didn't take the branch, so we're already dirty: return.
3686   // Use return-from-leaf
3687   __ retl();
3688   __ delayed()->nop();
3689 
3690   // Not dirty.
3691   __ bind(not_already_dirty);
3692 
3693   // Get O0 + O1 into a reg by itself
3694   __ add(O0, O1, O3);
3695 
3696   // First, dirty it.
3697   __ stb(G0, O3, G0);  // [cardPtr] := 0  (i.e., dirty).
3698 
3699   int dirty_card_q_index_byte_offset =
3700     in_bytes(JavaThread::dirty_card_queue_offset() +
3701              DirtyCardQueue::byte_offset_of_index());
3702   int dirty_card_q_buf_byte_offset =
3703     in_bytes(JavaThread::dirty_card_queue_offset() +
3704              DirtyCardQueue::byte_offset_of_buf());
3705   __ bind(restart);
3706 
3707   // Load the index into the update buffer. DirtyCardQueue::_index is
3708   // a size_t so ld_ptr is appropriate here.
3709   __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, L0);
3710 
3711   // index == 0?
3712   __ cmp_and_brx_short(L0, G0, Assembler::equal, Assembler::pn, refill);
3713 
3714   __ ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, L1);
3715   __ sub(L0, oopSize, L0);
3716 
3717   __ st_ptr(O3, L1, L0);  // [_buf + index] := I0
3718   // Use return-from-leaf
3719   __ retl();
3720   __ delayed()->st_ptr(L0, G2_thread, dirty_card_q_index_byte_offset);
3721 
3722   __ bind(refill);
3723   address handle_zero =
3724     CAST_FROM_FN_PTR(address,
3725                      &DirtyCardQueueSet::handle_zero_index_for_thread);
3726   // This should be rare enough that we can afford to save all the
3727   // scratch registers that the calling context might be using.
3728   __ mov(G1_scratch, L3);
3729   __ mov(G3_scratch, L5);
3730   // We need the value of O3 above (for the write into the buffer), so we
3731   // save and restore it.
3732   __ mov(O3, L6);
3733   // Since the call will overwrite O7, we save and restore that, as well.
3734   __ mov(O7, L4);
3735 
3736   __ call_VM_leaf(L7_thread_cache, handle_zero, G2_thread);
3737   __ mov(L3, G1_scratch);
3738   __ mov(L5, G3_scratch);
3739   __ mov(L6, O3);
3740   __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
3741   __ delayed()->mov(L4, O7);
3742 
3743   dirty_card_log_enqueue = start;
3744   dirty_card_log_enqueue_end = __ pc();
3745   // XXX Should have a guarantee here about not going off the end!
3746   // Does it already do so?  Do an experiment...
3747 
3748 #undef __
3749 
3750 }
3751 
3752 static inline void
3753 generate_dirty_card_log_enqueue_if_necessary(jbyte* byte_map_base) {
3754   if (dirty_card_log_enqueue == 0) {
3755     generate_dirty_card_log_enqueue(byte_map_base);
3756     assert(dirty_card_log_enqueue != 0, "postcondition.");
3757   }
3758 }
3759 
3760 
3761 void MacroAssembler::g1_write_barrier_post(Register store_addr, Register new_val, Register tmp) {
3762 
3763   Label filtered;
3764   MacroAssembler* post_filter_masm = this;
3765 
3766   if (new_val == G0) return;
3767 
3768   G1SATBCardTableLoggingModRefBS* bs =
3769     barrier_set_cast<G1SATBCardTableLoggingModRefBS>(Universe::heap()->barrier_set());
3770 
3771   if (G1RSBarrierRegionFilter) {
3772     xor3(store_addr, new_val, tmp);
3773     srlx(tmp, HeapRegion::LogOfHRGrainBytes, tmp);
3774 
3775     // XXX Should I predict this taken or not?  Does it matter?
3776     cmp_and_brx_short(tmp, G0, Assembler::equal, Assembler::pt, filtered);
3777   }
3778 
3779   // If the "store_addr" register is an "in" or "local" register, move it to
3780   // a scratch reg so we can pass it as an argument.
3781   bool use_scr = !(store_addr->is_global() || store_addr->is_out());
3782   // Pick a scratch register different from "tmp".
3783   Register scr = (tmp == G1_scratch ? G3_scratch : G1_scratch);
3784   // Make sure we use up the delay slot!
3785   if (use_scr) {
3786     post_filter_masm->mov(store_addr, scr);
3787   } else {
3788     post_filter_masm->nop();
3789   }
3790   generate_dirty_card_log_enqueue_if_necessary(bs->byte_map_base);
3791   save_frame(0);
3792   call(dirty_card_log_enqueue);
3793   if (use_scr) {
3794     delayed()->mov(scr, O0);
3795   } else {
3796     delayed()->mov(store_addr->after_save(), O0);
3797   }
3798   restore();
3799 
3800   bind(filtered);
3801 }
3802 
3803 #endif // INCLUDE_ALL_GCS
3804 ///////////////////////////////////////////////////////////////////////////////////
3805 
3806 void MacroAssembler::card_write_barrier_post(Register store_addr, Register new_val, Register tmp) {
3807   // If we're writing constant NULL, we can skip the write barrier.
3808   if (new_val == G0) return;
3809   CardTableModRefBS* bs =
3810     barrier_set_cast<CardTableModRefBS>(Universe::heap()->barrier_set());
3811   assert(bs->kind() == BarrierSet::CardTableForRS ||
3812          bs->kind() == BarrierSet::CardTableExtension, "wrong barrier");
3813   card_table_write(bs->byte_map_base, tmp, store_addr);
3814 }
3815 
3816 void MacroAssembler::load_mirror(Register mirror, Register method) {
3817   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
3818   ld_ptr(method, in_bytes(Method::const_offset()), mirror);
3819   ld_ptr(mirror, in_bytes(ConstMethod::constants_offset()), mirror);
3820   ld_ptr(mirror, ConstantPool::pool_holder_offset_in_bytes(), mirror);
3821   ld_ptr(mirror, mirror_offset, mirror);
3822 }
3823 
3824 void MacroAssembler::load_klass(Register src_oop, Register klass) {
3825   // The number of bytes in this code is used by
3826   // MachCallDynamicJavaNode::ret_addr_offset()
3827   // if this changes, change that.
3828   if (UseCompressedClassPointers) {
3829     lduw(src_oop, oopDesc::klass_offset_in_bytes(), klass);
3830     decode_klass_not_null(klass);
3831   } else {
3832     ld_ptr(src_oop, oopDesc::klass_offset_in_bytes(), klass);
3833   }




  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.inline.hpp"
  27 #include "compiler/disassembler.hpp"
  28 #include "gc/shared/cardTableModRefBS.hpp"
  29 #include "gc/shared/collectedHeap.inline.hpp"
  30 #include "gc/shared/barrierSet.hpp"
  31 #include "gc/shared/barrierSetCodeGen.hpp"
  32 #include "interpreter/interpreter.hpp"
  33 #include "memory/resourceArea.hpp"
  34 #include "memory/universe.hpp"
  35 #include "oops/klass.inline.hpp"
  36 #include "prims/methodHandles.hpp"
  37 #include "runtime/biasedLocking.hpp"
  38 #include "runtime/interfaceSupport.hpp"
  39 #include "runtime/objectMonitor.hpp"
  40 #include "runtime/os.inline.hpp"
  41 #include "runtime/sharedRuntime.hpp"
  42 #include "runtime/stubRoutines.hpp"
  43 #include "utilities/macros.hpp"





  44 #ifdef COMPILER2
  45 #include "opto/intrinsicnode.hpp"
  46 #endif
  47 
  48 #ifdef PRODUCT
  49 #define BLOCK_COMMENT(str) /* nothing */
  50 #define STOP(error) stop(error)
  51 #else
  52 #define BLOCK_COMMENT(str) block_comment(str)
  53 #define STOP(error) block_comment(error); stop(error)
  54 #endif
  55 
  56 // Convert the raw encoding form into the form expected by the
  57 // constructor for Address.
  58 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) {
  59   assert(scale == 0, "not supported");
  60   RelocationHolder rspec;
  61   if (disp_reloc != relocInfo::none) {
  62     rspec = Relocation::spec_simple(disp_reloc);
  63   }


 147   case branch_op:
 148     switch (inv_op2(inst)) {
 149       case fbp_op2:    r = inv_wdisp(  inst, pos, 19);  break;
 150       case bp_op2:     r = inv_wdisp(  inst, pos, 19);  break;
 151       case fb_op2:     r = inv_wdisp(  inst, pos, 22);  break;
 152       case br_op2:     r = inv_wdisp(  inst, pos, 22);  break;
 153       case bpr_op2: {
 154         if (is_cbcond(inst)) {
 155           r = inv_wdisp10(inst, pos);
 156         } else {
 157           r = inv_wdisp16(inst, pos);
 158         }
 159         break;
 160       }
 161       default: ShouldNotReachHere();
 162     }
 163   }
 164   return r;
 165 }
 166 
 167 void MacroAssembler::resolve_jobject(Register value,
 168                                      Register tmp) {
 169   BarrierSetCodeGen* code_gen = Universe::heap()->barrier_set()->code_gen();
 170   Label done, not_weak;
 171   br_null(value, true, Assembler::pn, done); // Use NULL as-is.
 172   delayed()->andcc(value, JNIHandles::weak_tag_mask, G0); // Test for jweak
 173   br(Assembler::zero, false, Assembler::pt, not_weak);
 174   delayed()->nop();
 175   code_gen->load_at(this, ACCESS_ON_ROOT | GC_ACCESS_ON_PHANTOM, T_OBJECT,
 176                     value, noreg, 0, value, tmp);
 177   verify_oop(value);
 178   br(Assembler::always, false, Assembler::pt, done);
 179   delayed()->nop();
 180   bind(not_weak);
 181   code_gen->load_at(this, ACCESS_ON_ROOT | GC_ACCESS_ON_STRONG, T_OBJECT,
 182                     value, noreg, -JNIHandles::weak_tag_value, value, tmp);
 183   verify_oop(value);
 184   bind(done);
 185 }
 186 
 187 void MacroAssembler::null_check(Register reg, int offset) {
 188   if (needs_explicit_null_check((intptr_t)offset)) {
 189     // provoke OS NULL exception if reg = NULL by
 190     // accessing M[reg] w/o changing any registers
 191     ld_ptr(reg, 0, G0);
 192   }
 193   else {
 194     // nothing to do, (later) access of M[reg + offset]
 195     // will provoke OS NULL exception if reg = NULL
 196   }
 197 }
 198 
 199 // Ring buffer jumps
 200 
 201 
 202 void MacroAssembler::jmp2(Register r1, Register r2, const char* file, int line ) {
 203   assert_not_delayed();
 204   jmpl(r1, r2, G0);
 205 }
 206 void MacroAssembler::jmp(Register r1, int offset, const char* file, int line ) {


 638     tst(L0);
 639     restore();
 640     breakpoint_trap(notZero, Assembler::ptr_cc);
 641     // }
 642 # endif
 643 
 644   st_ptr(oop_result, vm_result_addr);
 645 }
 646 
 647 
 648 void MacroAssembler::ic_call(address entry, bool emit_delay, jint method_index) {
 649   RelocationHolder rspec = virtual_call_Relocation::spec(pc(), method_index);
 650   patchable_set((intptr_t)Universe::non_oop_word(), G5_inline_cache_reg);
 651   relocate(rspec);
 652   call(entry, relocInfo::none);
 653   if (emit_delay) {
 654     delayed()->nop();
 655   }
 656 }
 657 









 658 void MacroAssembler::internal_sethi(const AddressLiteral& addrlit, Register d, bool ForceRelocatable) {
 659   address save_pc;
 660   int shiftcnt;
 661 # ifdef CHECK_DELAY
 662   assert_not_delayed((char*) "cannot put two instructions in delay slot");
 663 # endif
 664   v9_dep();
 665   save_pc = pc();
 666 
 667   int msb32 = (int) (addrlit.value() >> 32);
 668   int lsb32 = (int) (addrlit.value());
 669 
 670   if (msb32 == 0 && lsb32 >= 0) {
 671     Assembler::sethi(lsb32, d, addrlit.rspec());
 672   }
 673   else if (msb32 == -1) {
 674     Assembler::sethi(~lsb32, d, addrlit.rspec());
 675     xor3(d, ~low10(~0), d);
 676   }
 677   else {


3445     st(G0, Rtsp, Rscratch);
3446   }
3447 }
3448 
3449 void MacroAssembler::reserved_stack_check() {
3450   // testing if reserved zone needs to be enabled
3451   Label no_reserved_zone_enabling;
3452 
3453   ld_ptr(G2_thread, JavaThread::reserved_stack_activation_offset(), G4_scratch);
3454   cmp_and_brx_short(SP, G4_scratch, Assembler::lessUnsigned, Assembler::pt, no_reserved_zone_enabling);
3455 
3456   call_VM_leaf(L0, CAST_FROM_FN_PTR(address, SharedRuntime::enable_stack_reserved_zone), G2_thread);
3457 
3458   AddressLiteral stub(StubRoutines::throw_delayed_StackOverflowError_entry());
3459   jump_to(stub, G4_scratch);
3460   delayed()->restore();
3461 
3462   should_not_reach_here();
3463 
3464   bind(no_reserved_zone_enabling);





































































































































































































































































































































































3465 }
3466 
3467 void MacroAssembler::load_mirror(Register mirror, Register method) {
3468   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
3469   ld_ptr(method, in_bytes(Method::const_offset()), mirror);
3470   ld_ptr(mirror, in_bytes(ConstMethod::constants_offset()), mirror);
3471   ld_ptr(mirror, ConstantPool::pool_holder_offset_in_bytes(), mirror);
3472   ld_ptr(mirror, mirror_offset, mirror);
3473 }
3474 
3475 void MacroAssembler::load_klass(Register src_oop, Register klass) {
3476   // The number of bytes in this code is used by
3477   // MachCallDynamicJavaNode::ret_addr_offset()
3478   // if this changes, change that.
3479   if (UseCompressedClassPointers) {
3480     lduw(src_oop, oopDesc::klass_offset_in_bytes(), klass);
3481     decode_klass_not_null(klass);
3482   } else {
3483     ld_ptr(src_oop, oopDesc::klass_offset_in_bytes(), klass);
3484   }


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